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GB923770A - Data storage system - Google Patents

Data storage system

Info

Publication number
GB923770A
GB923770A GB44810/61A GB4481061A GB923770A GB 923770 A GB923770 A GB 923770A GB 44810/61 A GB44810/61 A GB 44810/61A GB 4481061 A GB4481061 A GB 4481061A GB 923770 A GB923770 A GB 923770A
Authority
GB
United Kingdom
Prior art keywords
line
tree
current
resistive
steered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB44810/61A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB923770A publication Critical patent/GB923770A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/02Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
    • H03M7/12Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word having two radices, e.g. binary-coded-decimal code
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06EOPTICAL COMPUTING DEVICES; COMPUTING DEVICES USING OTHER RADIATIONS WITH SIMILAR PROPERTIES
    • G06E1/00Devices for processing exclusively digital data
    • G06E1/02Devices for processing exclusively digital data operating upon the order or content of the data handled
    • G06E1/04Devices for processing exclusively digital data operating upon the order or content of the data handled for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/381Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using cryogenic components, e.g. Josephson gates
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/44Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/825Apparatus per se, device per se, or process of making or operating same
    • Y10S505/829Electrical computer or data processing system
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/825Apparatus per se, device per se, or process of making or operating same
    • Y10S505/83Electrical pulse counter, pulse divider, or shift register

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Shaping By String And By Release Of Stress In Plastics And The Like (AREA)
  • Complex Calculations (AREA)
  • Lighting Device Outwards From Vehicle And Optical Signal (AREA)
  • Logic Circuits (AREA)
  • Instructional Devices (AREA)

Abstract

923,770. Digital electric-calculating. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 14, 1961 [Dec. 30, 1960], No. 44810/61. Class 106 (1). Corresponding orders of selected words in a memory are added directly without removing the words from memory. A bit is stored in a cell 20 by steering current on a line 80, by means of cryotron gates (not shown) to either the right-hand or left-hand path 86, 82, to indicate 0 or 1, respectively. To add all or some of the contents of the cells 20, 22 . . . 36 together with carries from two lower orders, a current is applied to terminal 90 and it is steered through a cryotron gate tree to mark one out of seven lines 60. The value of the line marked is converted into binary form as a sum signal to be applied to a second tree for the next four words in memory, and as carry signals to the next higher orders. Since in the embodiment described only two carries are to be allowed for, each tree has a maximum of seven levels. As shown, to add nine words, two trees are necessary. The upper tree has five inputs from storage cells and two in-carries; the lower tree has the sum input from the coded output of the tree, four inputs from storage cells and two in-carries. The sum output of the lower tree is stored by steering current to either the upper or lower path of a loop in a register 12. If cell 20 is storing 0, cryotron gate 88 is resistive and current on line 90 is steered on to line 91. This sends gate 100 resistive and current from terminal 96 is steered to the righthand branch of the tree. Words to be added are selected by energizing a select or suppress li ne such as 74 associated with each word. If the select line is energized cryotron 93 is resistive and the contents of cell 20 control the setting of the cryotron tree. If the suppress line is energized, gate 94 is resistive and the contents of cell 20 are treated as if they were 0. Thus, current on line 92 representing 1 is switched through gate 93 on to line 91 where its significance is 0. The generation of sum and carry signals takes place in circuit 62. If an odd number representing line is marked, one of cryotrons 111, 113, 115 or 117 is resistive and current on line 109 is steered to the 1 representing sum line. If lines representing 2, 3, 6 or 7 are marked, cryotrons 120 or 128 are resistive and current is steered from line 124 to the 1 incarry line of the next higher order. If lines representing 4, 5, 6 or 7 are marked, the current on these lines is led away as the 1 in-carry line to the next higher order but one. It is stated that photo-resistors and lamps may be used instead of cryotrons. Other arrangements of the in-carries are described. Specification 862,178 is referred to.
GB44810/61A 1960-12-30 1961-12-14 Data storage system Expired GB923770A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US79823A US3141964A (en) 1960-12-30 1960-12-30 Calculating memory
US148346A US3191014A (en) 1960-12-30 1961-10-30 Mixed code calculator

Publications (1)

Publication Number Publication Date
GB923770A true GB923770A (en) 1963-04-18

Family

ID=26762468

Family Applications (2)

Application Number Title Priority Date Filing Date
GB44810/61A Expired GB923770A (en) 1960-12-30 1961-12-14 Data storage system
GB40721/62A Expired GB978659A (en) 1960-12-30 1962-10-29 Electrical adder

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB40721/62A Expired GB978659A (en) 1960-12-30 1962-10-29 Electrical adder

Country Status (4)

Country Link
US (2) US3141964A (en)
DE (1) DE1174541B (en)
FR (1) FR83308E (en)
GB (2) GB923770A (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3257548A (en) * 1961-12-13 1966-06-21 Ibm Division techniques
US3234369A (en) * 1961-12-13 1966-02-08 Ibm Square root device employing converging approximations
US3308282A (en) * 1961-12-22 1967-03-07 Ibm Serial cryogenic binary multiplier system
US3265875A (en) * 1962-11-19 1966-08-09 Richard K Richards Electronic calculator
US3391390A (en) * 1964-09-09 1968-07-02 Bell Telephone Labor Inc Information storage and processing system utilizing associative memory
US3576436A (en) * 1968-10-16 1971-04-27 Ibm Method and apparatus for adding or subtracting in an associative memory
US3603776A (en) * 1969-01-15 1971-09-07 Ibm Binary batch adder utilizing threshold counters
US3746839A (en) * 1971-10-29 1973-07-17 Ibm Accumulator for a key entry device
US4281391A (en) * 1979-01-15 1981-07-28 Leland Stanford Junior University Number theoretic processor

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE414686A (en) * 1936-03-27
FR1040913A (en) * 1951-07-23 1953-10-20 Electronique & Automatisme Sa Electrical pulse code train analyzer devices
US2923471A (en) * 1953-01-12 1960-02-02 North American Aviation Inc Binary-to-decimal converter and adder
BE533122A (en) * 1953-11-06
NL113771C (en) * 1955-07-27
US2860327A (en) * 1956-04-27 1958-11-11 Charles A Campbell Binary-to-binary decimal converter
US2907526A (en) * 1956-11-02 1959-10-06 Ibm Electronic accumulator
NL225541A (en) * 1957-04-10 1900-01-01

Also Published As

Publication number Publication date
US3141964A (en) 1964-07-21
US3191014A (en) 1965-06-22
DE1174541B (en) 1964-07-23
FR83308E (en) 1964-11-25
GB978659A (en) 1964-12-23

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