GB8613484D0 - Clock delay for microprocessor - Google Patents
Clock delay for microprocessorInfo
- Publication number
- GB8613484D0 GB8613484D0 GB868613484A GB8613484A GB8613484D0 GB 8613484 D0 GB8613484 D0 GB 8613484D0 GB 868613484 A GB868613484 A GB 868613484A GB 8613484 A GB8613484 A GB 8613484A GB 8613484 D0 GB8613484 D0 GB 8613484D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- microprocessor
- clock delay
- clock
- delay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
- G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US78575185A | 1985-10-09 | 1985-10-09 |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8613484D0 true GB8613484D0 (en) | 1986-07-09 |
GB2181578A GB2181578A (en) | 1987-04-23 |
GB2181578B GB2181578B (en) | 1990-04-18 |
Family
ID=25136529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8613484A Expired - Fee Related GB2181578B (en) | 1985-10-09 | 1986-06-04 | Clock delay for a central processing unit |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPH0650496B2 (en) |
FR (1) | FR2588397A1 (en) |
GB (1) | GB2181578B (en) |
HK (1) | HK90790A (en) |
SG (1) | SG65090G (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5151986A (en) * | 1987-08-27 | 1992-09-29 | Motorola, Inc. | Microcomputer with on-board chip selects and programmable bus stretching |
GB8728902D0 (en) * | 1987-12-10 | 1988-01-27 | Secr Defence | Microcomputer circuits |
JP2506909Y2 (en) * | 1987-12-28 | 1996-08-14 | 臼井国際産業 株式会社 | Metal support matrix for exhaust gas purification catalyst |
JP2570845B2 (en) * | 1988-05-27 | 1997-01-16 | セイコーエプソン株式会社 | Information processing device |
US5210858A (en) * | 1989-10-17 | 1993-05-11 | Jensen Jan E B | Clock division chip for computer system which interfaces a slower cache memory controller to be used with a faster processor |
CA2028552A1 (en) * | 1989-11-03 | 1991-05-04 | Dale J. Mayer | Bus clock extending memory controller |
JP4762506B2 (en) * | 2004-05-26 | 2011-08-31 | 新日鉄マテリアルズ株式会社 | Honeycomb body and manufacturing method thereof |
WO2014208646A1 (en) | 2013-06-27 | 2014-12-31 | 株式会社Ihi | Reactor |
CN112566720A (en) | 2018-08-10 | 2021-03-26 | 本田技研工业株式会社 | Catalytic device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4050096A (en) * | 1974-10-30 | 1977-09-20 | Motorola, Inc. | Pulse expanding system for microprocessor systems with slow memory |
JPS5663628A (en) * | 1979-10-25 | 1981-05-30 | Nec Corp | Data processing device |
JPS60112158A (en) * | 1983-11-24 | 1985-06-18 | Hitachi Ltd | Peripheral device control circuit |
GB2162406B (en) * | 1984-06-18 | 1988-03-09 | Logica | Computer system |
US4658161A (en) * | 1985-08-13 | 1987-04-14 | Hewlett-Packard Company | Split phase loop |
-
1986
- 1986-06-04 GB GB8613484A patent/GB2181578B/en not_active Expired - Fee Related
- 1986-06-30 FR FR8609464A patent/FR2588397A1/en active Pending
- 1986-10-07 JP JP61237269A patent/JPH0650496B2/en not_active Expired - Fee Related
-
1990
- 1990-08-06 SG SG65090A patent/SG65090G/en unknown
- 1990-11-01 HK HK90790A patent/HK90790A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
GB2181578B (en) | 1990-04-18 |
SG65090G (en) | 1990-10-26 |
JPS6290742A (en) | 1987-04-25 |
JPH0650496B2 (en) | 1994-06-29 |
FR2588397A1 (en) | 1987-04-10 |
HK90790A (en) | 1990-11-09 |
GB2181578A (en) | 1987-04-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20040604 |