GB851455A - Magnetic switching circuits - Google Patents

Abstract

851,455. Circuits employing bi-stable magnetic elements. SPERRY-RAND CORPORATION. Aug. 29, 1957 [Sept. 4, 1956], No. 27248/57. Class 40 (9).' [Also in Group XIX] A magnetic switching circuit for switching current to a row or column of electrical impedance elements in a matrix array, comprises a two-state saturable magnetic core having at least one signal winding thereon, an information signal generator, a load circuit comprising at least one electrical impedance element coupled in series to the information signal generator via the signal winding, and a control element inchiding a select winding, a holding winding and a reset winding wound on ,the core, the select .winding being adapted to receive a signal for selectively driving the core from a first magnetic state to a second magnetic state in a predetermined period of time and for controlling, during this time, the conduction of current from the information signal generator through the signal winding to the load circuit. As shown, magnetic read-record heads such as A, B, C, associated e.g. with a magnetic drum memory, are connected in a matrix, each of the head windings 100 having its ends connected via diodes, such as 20, 21, to a pair of row lines (R, S) and its mid-point 101 connected to a column line M. The row and column lines are connected to windings on selection cores 1-5, each having a similar circuit 50 (shown in detail for core 3) associated therewith. Each of the cores has a substantially rectangular hysteresis characteristic and is permanently biased to negative saturation by current flowing through reset winding 56. In operation, a head, e.g. A, is-selected by applying a positive pulse, Fig. 3 (3A), to select windings 51 on the appropriate row and column cores (1 and 3) which are thus set to the positive saturation condition +B s , Fig. 3 (3F), and held in this condition for a subsequent writing or reading period by a positive potential, Fig. 3 (3E), applied to windings 59. The windings, such as 25, 26, 29, associated with the selected head thus present a low impedance to positive write signals, Fig. 3 (3B and 3C), which are applied from the " 0 " and " 1 " amplifiers, via diodes 151, 161 and the appropriate core windings, to the top and bottom row lines respectively in each pair R, S . . . T, U. Thus e.g. for writing a "0" by head A, current would flow through diode 151, winding 25, diode 20, top half of winding 100 on A, winding 29 to earth; similarly, for writing a " I," current would flow in the opposite direction in the other half of the head winding. The write signals are applied also to windings, such as 27, 28, 30, on the unselected cores and oppose the switching of these cores to +Bs by the hold signal in windings 59, the writing period being insufficient to allow such switching to occur (see Fig. 3 (3E and 3F)). For reading from a selected head, a positive signal, Fig. 3D, is applied to terminal 201 and causes a small current to flow through the winding 100 of the selected head via circuits similar to those leading from the write amplifiers; the hold signal applied to the unselected cores induces voltages in windings such as 27, 28, 30 which produce a reverse bias on all the matrix diodes except the pair (20, 21) associated with the selected head. When changes of flux are detected by this head, the current through the winding and associated diodes will be modulated thus producing output signals through transformer 156 which are applied via a read amplifier e.g. to another memory or an arithmetic unit in a computer. In a modification of circuit 50 (Fig. 4, not shown) a read select signal, Fig. 3 (3G), is applied to an additional read select winding to maintain the selected cores in the negative saturation condition -B s (see Fig. 3 (3H)) during a reading operation.