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GB849476A - Improvements in or relating to semiconductor control devices - Google Patents

Improvements in or relating to semiconductor control devices

Info

Publication number
GB849476A
GB849476A GB36841/55A GB3684155A GB849476A GB 849476 A GB849476 A GB 849476A GB 36841/55 A GB36841/55 A GB 36841/55A GB 3684155 A GB3684155 A GB 3684155A GB 849476 A GB849476 A GB 849476A
Authority
GB
United Kingdom
Prior art keywords
electrode
voltage
avalanche
germanium
antimony
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB36841/55A
Inventor
John Battiscombe Gunn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NAT RES DEV
National Research Development Corp UK
Original Assignee
NAT RES DEV
National Research Development Corp UK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DENDAT1067933D priority Critical patent/DE1067933B/en
Application filed by NAT RES DEV, National Research Development Corp UK filed Critical NAT RES DEV
Priority to GB36841/55A priority patent/GB849476A/en
Priority to FR1169035D priority patent/FR1169035A/en
Publication of GB849476A publication Critical patent/GB849476A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/70Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices having only two electrodes and exhibiting negative resistance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Generation Of Surge Voltage And Current (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

849,476. Semi-conductor pulse circuits. NATIONAL RESEARCH DEVELOPMENT CORPORATION. Dec. 5, 1956 [Dec. 22, 1955], No. 36841/55. Class 40(6). [Also in Group XXXVI] An electric control device comprises a semiconductor body having a first base electrode and a second non-injecting alloy junction electrode of area less than 0À001 in<SP>2</SP>, whereby under saturated drift velocity conditions, avalanche injection of carriers occurs to provide a negative resistance region in the forward characteristic. Fig. 3(a) shows an N-type germanium body 3 with a nickel plate base electrode 6 joined by a tin-antimony solder layer 7 which provides an N+ layer 5. A non-injecting alloy electrode is provided by a dot 8 of tinantimony which produces an N+ layer 4. Etching is used to reduce the size of dot 8 before alloying. The device has a negative resistance region in its "forward" characteristic, i.e. with a positive voltage applied to dot electrode 8. Both the "onset" voltage at which the current suddenly decreases with increasing voltage, and the "sustaining voltage" are reduced by previous avalanche experience, but these may be restored by etching treatment. Fig. 3(b) shows a modification in which a nickel sheet base electrode 6 which acts as a cooling element, is indium soldered to an intrinsic germanium body 3 to provide a P+ region 10, and a gold-antimony wire 11 is used to form a second non-injecting electrode with a gold-antimony-germanium region 12 and an N+ region 13. At the minimum, the spacing between layers 13 and 10 is 40 Á; this must be related to the impurity concentration of the intrinsic material by a given function, which involves electronic charge, dielectric constant, the avalanche field and the sustaining voltage. In operation, avalanche injection occurs at both electrode regions in this embodiment, and the arrangement avoids overheating at the non- injecting electrode. The base electrode may be provided by placing a fragment of indium and a droplet of zinc chloride on a nickel strip, and pressing an etched wafer of germanium against the indium and nickel while heating the nickel plate. A gold wire with 0À5% antimony is then alloyed to the surface of the germanium at a temperature of 330‹C. Reference is made to the provision of a third electrode for triggering purposes. Fig. 7 shows a pulse generator, in which a coaxial cable 14 fed with primary pulses from a hydrogen thyratron (not shown) is connected to an open circuited length of coaxial cable (Z 0 = 75 ohms) 17 through resistor 18. Each primary pulse charges cable 17 until avalanche diode 20 reaches its "onset" voltage when cable 17 discharges through 20 to provide an output across load resistor 21. The avalanche diode could also be used in oscillators or in "dissected" amplifiers, or in voltage stabilizing circuits. Specification 727,900 is referred to.
GB36841/55A 1955-12-22 1955-12-22 Improvements in or relating to semiconductor control devices Expired GB849476A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DENDAT1067933D DE1067933B (en) 1955-12-22 Controlled semiconductor device with two electrodes. 1'9. 12. 56. Great Britain
GB36841/55A GB849476A (en) 1955-12-22 1955-12-22 Improvements in or relating to semiconductor control devices
FR1169035D FR1169035A (en) 1955-12-22 1956-12-21 Semiconductor control devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB36841/55A GB849476A (en) 1955-12-22 1955-12-22 Improvements in or relating to semiconductor control devices

Publications (1)

Publication Number Publication Date
GB849476A true GB849476A (en) 1960-09-28

Family

ID=10391612

Family Applications (1)

Application Number Title Priority Date Filing Date
GB36841/55A Expired GB849476A (en) 1955-12-22 1955-12-22 Improvements in or relating to semiconductor control devices

Country Status (3)

Country Link
DE (1) DE1067933B (en)
FR (1) FR1169035A (en)
GB (1) GB849476A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3365583A (en) * 1963-06-10 1968-01-23 Ibm Electric field-responsive solid state devices
US3660733A (en) * 1969-10-29 1972-05-02 Fernando Zhozevich Vilf Homogeneous semiconductor with interrelated antibarrier contacts
CN113536600A (en) * 2021-08-17 2021-10-22 浙江大学 An optimal design method for power module bonding line layout

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL84061C (en) * 1948-06-26
NL89623C (en) * 1949-04-01

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3365583A (en) * 1963-06-10 1968-01-23 Ibm Electric field-responsive solid state devices
US3660733A (en) * 1969-10-29 1972-05-02 Fernando Zhozevich Vilf Homogeneous semiconductor with interrelated antibarrier contacts
CN113536600A (en) * 2021-08-17 2021-10-22 浙江大学 An optimal design method for power module bonding line layout
CN113536600B (en) * 2021-08-17 2024-01-30 浙江大学 Power module binding line layout optimization design method

Also Published As

Publication number Publication date
DE1067933B (en) 1959-10-29
FR1169035A (en) 1958-12-19

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