GB783718A - Improvements in or relating to calculating machines - Google Patents

Abstract

783,718. Digital electric calculating-apparatus. POWER-SAMAS ACCOUNTING MACHINES, Ltd. Feb. 23, 1956 [March 8, 1955], No. 6846/55. Class 106 (1). In apparatus for electrically effecting multiplication of decimal numbers, in which pulses are entered into denominational orders of an electronic register through shift gates and transmit gates conditioned by multiplier selector gates, the pulses are supplied, for each multiplicand digit, via a first and second set of pulse gates and selector gates conditioned by the multiplicand digit, the first set of pulse gates being operative during a first addition period to transmit pulses corresponding to the digit value and the second set being operative during each of four succeeding periods to transmit pulses corresponding to twice the digit value. The circuits for one multiplicand denomination only are shown. One of ten switches S is closed according to the value of the multiplicand digit sensed from a stationary record, e.g. a punched card, thus earthing the inputs of those selector gates SG1-SG3, and SG4-SG5 in parallel, not required to represent the digit according to the 1, 2, 1, 5 code; the remaining gates are conditioned during a whole multiplication period. The outputs of SG1-SG4, and of SG5 for the preceding denomination, are connected through line I, to a transmit gate TG. For each multi. plier digit, multiplier selector gates MSG are operative to open gates TG for appropriate ones of five addition periods, and to condition shift gates SHG to direct the pulses from TG to the appropriate orders of result register R. During the first addition period, line MGWF1 conditions a first set of pulse gates PG1-PG4 which apply respectively 1, 2, 1, and 5 pulses to gates SG1-4 whereby a number of pulses equal to the value of the multiplicand digit appear on line I. During the second to fifth addition periods, line MGWF2 conditions pulse gates PG11-PG44 which apply respectively 2, 4, 2 and 1 pulses to SG1-SG3 and SG5, whereby a number of pulses equal to the units of twice the multiplicand digit appear on line I, and a tens carry is applied to line I for the next higher denomination. The gates may comprise selenium diodes. Specification 734,789 is referred to.