GB2563206A - Electronic arrangement and method for overmolding same - Google Patents
Electronic arrangement and method for overmolding same Download PDFInfo
- Publication number
- GB2563206A GB2563206A GB1708795.8A GB201708795A GB2563206A GB 2563206 A GB2563206 A GB 2563206A GB 201708795 A GB201708795 A GB 201708795A GB 2563206 A GB2563206 A GB 2563206A
- Authority
- GB
- United Kingdom
- Prior art keywords
- thermal
- printed circuit
- circuit board
- interface material
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/06—Hermetically-sealed casings
- H05K5/065—Hermetically-sealed casings sealed by encapsulation, e.g. waterproof resin forming an integral casing, injection moulding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0162—Silicon containing polymer, e.g. silicone
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1316—Moulded encapsulation of mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1322—Encapsulation comprising more than one layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1327—Moulding over PCB locally or completely
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/285—Permanent coating compositions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Electronic arrangement (1) and method for overmolding the same, the electronic arrangement (1) comprises a printed circuit board (2) which further comprises solder pads (4), wherein one or more electronic components (3) are soldered onto at least part of the solder pads (4). A thermal interface material (5) is arranged on one or more areas of the printed circuit board (2), wherein an overmoulding process is performed in which an overmold material (6) is applied to the printed circuit board (2). A curing process is performed in which the electronic arrangement (1) is cooled down. These areas may encompass the one or more electronic components (3). A structural and thermal simulation may take into account different coefficients of thermal expansion. The overmould material (6) may be applied by compression or transfer moulding. The thermal interface material (5) may be silicone and may be able to withstand temperatures above 200 degrees.
Description
Description
Electronic arrangement and method for overmolding same
It is known in the art to overmold electronic assemblies, i.e. a printed circuit populated with electronic components is encapsulated by a thermoset or thermoplastic material in a molding process. The overmolding process is usually performed by compression or transfer molding at relatively high temperatures, e.g. 180 °C to 200 °C. The overmolding process is followed by a curing process and the electronic arrangement 1 is cooled down, e.g. to room temperature thus cooling down all components from about 180 °C to about 22 °C.
It is an object of the present invention to provide an improved method for overmolding an electronic arrangement and an improved electronic arrangement overmolded by such a method.
The object is achieved by a method according to claim 1 and by an electronic arrangement according to claim 8.
Exemplary embodiments of the invention are given in the dependent claims .
According to the invention, a method is provided for overmolding an electronic arrangement comprising a printed circuit board comprising solder pads and one or more electronic components soldered onto at least some of the solder pads. The method comprises arranging a thermal interface material on one or more critical structural and thermal areas of the printed circuit board, wherein subsequently an overmolding process is performed in which an overmold material is applied to the printed circuit board, wherein subsequently a curing process is performed in which the electronic arrangement is cooled down.
Due to the use of the thermal interface material, cracks and integrity of the electronic components and their connection to the solder pads during the overmolding process and/or during the subsequent curing process can be avoided. Without the thermal interface material, the different coefficients of thermal expansion of the electronic components and the printed circuit board and/or the solder pads may result in stresses and strains developed in the solder joints when heating and cooling the electronic arrangement during the overmolding process and the subsequent curing process and compromise integrity of the electronic components and solder joints.
In an exemplary embodiment, the one or more critical structural and thermal areas encompass the one or more electronic components .
In an exemplary embodiment, the one or more critical structural and thermal areas are identified by a structural and thermal simulation taking into account different coefficients of thermal expansion between the one or more electronic components and the printed circuit board and/or the solder pads during the overmolding process and/or during the subsequent curing process .
In an exemplary embodiment, a thermal interface material capable of withstanding temperatures above 200 °C is used. These temperatures may typically occur during application of the overmold material.
In an exemplary embodiment, the thermal interface material is not applied outside the critical structural and thermal areas. This way, sealing capabilities of the overmold material are maintained and fewer thermal interface material is needed.
In an exemplary embodiment, the thermal interface material is cured prior to application of the overmold material.
In an exemplary embodiment, the overmold material is applied by compression or transfer molding. Compression reduces the flow rate of the overmold material on the thermal interface material.
In an exemplary embodiment, the thermal interface material is silicone .
According to an aspect of the invention, an electronic arrangement overmolded by the above described method is provided, comprising a printed circuit board comprising solder pads wherein one or more electronic components are soldered on at least some of the solder pads, wherein a thermal interface material is arranged on one or more critical structural and thermal areas of the printed circuit board, wherein an overmold material is arranged on the printed circuit board over the thermal interface material.
In an exemplary embodiment, the one or more critical structural and thermal areas encompass the one or more electronic components .
In an exemplary embodiment, the thermal interface material is not arranged outside the critical structural and thermal areas.
In an exemplary embodiment, the thermal interface material is silicone .
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
Brief Description of the Drawings
The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus, are not limitive of the present invention, and wherein:
Figure 1 is a schematic view of an exemplary embodiment of an electronic arrangement,
Figure 2 is another schematic view of the electronic arrangement,
Figure 3 , is a schematic detail view of the electronic ar rangement and
Figure 4 is a schematic exploded view of the electronic arrangement .
Corresponding parts are marked with the same reference symbols in all figures.
Detailed Description
Figures 1 and 2 are schematic views of an exemplary embodiment of an electronic arrangement 1. Figure 3 is a schematic detail view of the electronic arrangement 1. Figure 4 is a schematic exploded view of the electronic arrangement 1.
The electronic arrangement 1 comprises a printed circuit board 2 populated by a plurality of electronic components 3 which are soldered onto solder pads 4. A thermal interface material 5 is arranged on a part of the printed circuit board 2, in particular on the electronic components 3 and other critical structural and thermal areas.
In an exemplary embodiment, the critical structural and thermal areas in which a mismatch of thermal expansion may occur due to different coefficients of thermal expansion between the electronic components 3 and the printed circuit board 2 and/or the solder pads 4, in particular during an overmolding process and/or a subsequent curing process may be identified by a structural and thermal simulation.
The thermal interface material 5 is chosen such that after the thermal interface material 5 has been cured it can withstand temperatures above 200 °C which may occur in a subsequent overmolding process.
The thermal interface material 5 does not have to be added in keep-out areas in which a mismatch of thermal expansion is less likely or unimportant, in particular in areas without electronic components 3. This way, sealing capabilities of a subsequently applied overmold material 6 are maintained.
Subsequently, an overmolding process is performed in which an overmold material 6, e.g. a thermoset or thermoplastic material is applied to the printed circuit board 2, e.g. by compression or transfer molding at relatively high temperatures in the range from 180 °C to 200 °C.
Compression reduces the flow rate of the overmold material 6 on the thermal interface material 5.
The overmolding process is followed by a curing process in which the electronic arrangement 1 is cooled down, e.g. to room temperature at about 22 °C.
Due to the thermal interface material 5, cracks and integrity of the electronic components 3 and their connection to the solder pads 4 during the overmolding process and/or during the subsequent curing process can be avoided.
In an exemplary embodiment, the thermal interface material 5 has a low stiffness in order to be able to absorb a part of the stress developed in the solder joints during heating or cooling. In an exemplary embodiment, the thermal interface material 5 is silicone .
Table 1 shows reaction forces in solder joints for overmolded electronic arrangements 1 with and without thermal interface material 5. The same model was used for both cases.
Table 1:
Those of skill in the art will understand that modifications (additions and/or removals) of various components of the apparatuses, methods and/or systems and embodiments described herein may be made without departing from the full scope and spirit of the present invention, which encompass such modifications and any and all equivalents thereof.
reference list 1 electronic arrangement 2 printed circuit board 3 electronic component 4 solder pad 5 thermal interface material 6 overmold material
Claims (10)
1. A method for overmolding an electronic arrangement (1) comprising a printed circuit board (2) comprising solder pads (4) wherein one or more electronic components (3) are soldered onto at least some of the solder pads (4), wherein a thermal interface material (5) is arranged on one or more critical structural and thermal areas of the printed circuit board (2), wherein subsequently an overmolding process is performed in which an overmold material (6) is applied to the printed circuit board (2), wherein subsequently a curing process is performed in which the electronic arrangement (1) is cooled down.
2. The method of claim 1, wherein the one or more critical structural and thermal areas encompass the one or more electronic components (3).
3. The method according to claim 1 or 2, wherein the one or more critical structural and thermal areas are identified by a structural and thermal simulation taking into account different coefficients of thermal expansion between the one or more electronic components (3) and the printed circuit board (2) and/or the solder pads (4) during the overmolding process and/or during the subsequent curing process.
4. The method according to any one of the preceding claims, wherein a thermal interface material (5) capable of withstanding temperatures above 200 °C is used.
5. The method according to any one of the preceding claims, wherein the thermal interface material (5) is not applied outside the critical structural and thermal areas.
6. The method according to any one of the preceding claims, wherein the overmold material (6) is applied by compression or transfer molding.
7. The method according to any one of the preceding claims, wherein the thermal interface material (5) is silicone.
8. An electronic arrangement (1) overmolded by a method according to any one of the preceding claims, comprising a printed circuit board (2) comprising solder pads (4) wherein one or more electronic components (3) are soldered on at least some of the solder pads (4) , wherein a thermal interface material (5) is arranged on one or more critical structural and thermal areas of the printed circuit board (2) , wherein an overmold material (6) is arranged on the printed circuit board (2) over the thermal interface material (5).
9. The electronic arrangement (1) of claim 8, wherein the one or more critical structural and thermal areas encompass the one or more electronic components (3).
10. The electronic arrangement (1) of claim 8 or 9, wherein the thermal interface material (5) is not arranged outside the critical structural and thermal areas.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1708795.8A GB2563206A (en) | 2017-06-02 | 2017-06-02 | Electronic arrangement and method for overmolding same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1708795.8A GB2563206A (en) | 2017-06-02 | 2017-06-02 | Electronic arrangement and method for overmolding same |
Publications (2)
Publication Number | Publication Date |
---|---|
GB201708795D0 GB201708795D0 (en) | 2017-07-19 |
GB2563206A true GB2563206A (en) | 2018-12-12 |
Family
ID=59349782
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1708795.8A Pending GB2563206A (en) | 2017-06-02 | 2017-06-02 | Electronic arrangement and method for overmolding same |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2563206A (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6167246A (en) * | 1984-09-10 | 1986-04-07 | Nec Corp | Hybrid integrated circuit device |
WO1998037742A1 (en) * | 1997-02-18 | 1998-08-27 | Koninklijke Philips Electronics N.V. | Method of providing a synthetic resin capping layer on a printed circuit |
US20040027233A1 (en) * | 2001-01-30 | 2004-02-12 | Yoshifumi Matsumoto | Resistor connector and its manufacturing method |
US20110084409A1 (en) * | 2008-06-12 | 2011-04-14 | Mitsuo Sugino | Semiconductor element mounting board |
US20160295702A1 (en) * | 2015-04-02 | 2016-10-06 | Tacto Tek Oy | Multi-material structure with embedded electronics |
-
2017
- 2017-06-02 GB GB1708795.8A patent/GB2563206A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6167246A (en) * | 1984-09-10 | 1986-04-07 | Nec Corp | Hybrid integrated circuit device |
WO1998037742A1 (en) * | 1997-02-18 | 1998-08-27 | Koninklijke Philips Electronics N.V. | Method of providing a synthetic resin capping layer on a printed circuit |
US20040027233A1 (en) * | 2001-01-30 | 2004-02-12 | Yoshifumi Matsumoto | Resistor connector and its manufacturing method |
US20110084409A1 (en) * | 2008-06-12 | 2011-04-14 | Mitsuo Sugino | Semiconductor element mounting board |
US20160295702A1 (en) * | 2015-04-02 | 2016-10-06 | Tacto Tek Oy | Multi-material structure with embedded electronics |
Also Published As
Publication number | Publication date |
---|---|
GB201708795D0 (en) | 2017-07-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) |
Free format text: REGISTERED BETWEEN 20211104 AND 20211110 |