GB2400661A

GB2400661A - A target echo simulator

Info

Publication number: GB2400661A
Application number: GB8827410A
Authority: GB
Inventors: John Charles Morris; Henry Gordon Powell
Original assignee: Qinetiq Ltd; UK Secretary of State for Defence
Current assignee: Qinetiq Ltd
Priority date: 1987-12-08
Filing date: 1988-11-23
Publication date: 2004-10-20
Anticipated expiration: 2008-11-23
Also published as: GB8728663D0; GB2400661B; GB8827410D0

Abstract

A target echo simulator for sonar uses a programmable delay (114,115 116) wherein samples (113) from a received sonar waveform (110) are sequentially written into a dynamic RAM 114. Write address is generated by means of a Write counter 116. In similar fashion a Read counter 115 generates a read-out signal, the read address being offset with respect to the write address such that an individual sample is delayed within the RAM by a time dependent on the offset and the clock (118) rate. The time delay is programmed into a ROM 120 and is so arranged as to simulate a circling "target". A spacing ROM 121 is provided to separate the signal samples in the memory and a sample amplitude structure (123) is superimposed such that a realistic highlight structure can be simultated for the target. In addition the spacing ROM is programmed such that the relataive separation of the samples is varied in dependence on the time delay such that Doppler shifts can be provided appropriate to the circling motion.

Description

240066 1 A Target Echo Simulate The invention relates to the electronic

simulation of targets scanned by surveillance/ detection systems with the objective of decoying such systems and in particular, though not exclusively, to decoying underwater sonar systems.

GB Patent Application No. 8400480 described an adaptive sonar decoy system wherein received sonar transmissions from a surveillance/ detection sonar are detected and then transmitted so as to simulate target reflections. As technology advances surveillance/detection systems can apply greater discrimination to reject decoy signals and accept only true target signals. This is particularly important for weapon homing systems which need to quickly detect the target against perhaps a background of several target-like signals otherwise the weapon will miss the target. Target returns typically are complicated in structure, being the summation of energy reflected from a number of different reflectors that are spatially separated and have differing reflectance. In addition movement of the target relative to the sonar source produces Doppler frequency changes in the reflected sonar as well as aspect changes of highlight target reflectors. Thus a stationary decoy which simply transmits a sonar pulse identical to the transmitted sonar from the surveillance/detection system may be ineffective.

The object of the present invention is to provide a target echo simulator which provides a more realistic echo

signature than known prior art arrangements.

The invention provides a target echo simulator comprising: a) a detector responsive to an energy signal transmitted from a surveillance/ detection system; b) an analog-to-digital means to sample the detected transmission signal; c) a memory means to store the sampled signal; d) a programmed scaling means to scale the sample elements of the signal; e) a programmed delay circuit to provide memory output address signals; f) a digital-toanalog means connected to the output of the memory; g) an output transducer connected to the output of the digital-to-analog means to transmit analog signals; and h) a programmed means to space the signal samples; the arrangement being such that by appropriate scaling and delay of each sample a complex reflector can be simulated.

By using arrangements according to the invention it is possible to simulate a Doppler shifted signal by continuously varying the delay between the received and output signals. The variation of delay also varies the apparent range in a manner that is consistent with the apparent Doppler shift. It is not necessary to detect the time of arrival of an incoming pulse in order to simulate a moving target.

Advantageously by suitable programming of the delay circuit a moving target at a pre-determined distance from the decoy can be simulated.

In a particulary advantageous arrangement delays and Doppler shifts are pre-programmed to simulate a circling target.

Advantageously a clock-incremented write counter is used to generate memory addresses for signal samples. A similar read counter is provided for generation of read addresses including an input from a Doppler control circuit which is arranged to add to or inhibit selected read counts so as to provide simulated Doppler shifts.

Preferably there is provided a Doppler ROM programmed to provide information for Doppler shifts. Preferably also there is provided a Spacing ROM with programmmed highlight features of a simulated target, the Spacing ROM being connected to the Doppler Control and the Read Counter such that the sample spacing can be reduced or expanded in dependence on the Doppler shift such that varying aspects of a target can be simulated.

Advantageously there is provided a Height ROM programmed to include scale values of highlight features of a simulated target.

In the preferred arrangement during each clock period a number of sequential memory locations are read out to a Scale and Add circuit, each corresponding sample then being scaled by multiplication with the highlight scale values and the scales samples added to give the output signal for D/A conversion.

The invention will now be described by way of example only with reference to the accompanying Drawings of which: Figure 1 is a schematic block diagram ofa submarine target decoy according to the invention; Figure 2 is a schematic illustration of the technique for producing highlight structure and Doppler in an apparent echo signal; and Figures 3 - 6 show decoy output signals corresponding to a short duration input signal for differring simulated target Doppler and highlight structures.

In order to decoy an underwater attack, vessels may tow or launch unmanned submersibles which transmit sonar signals to confuse the signal detection systems of attack sonars.

Signals from an attacking sonar are detected by a decoy receiver transducer or transducer array 110 (Figure 1) which are then processed in the present invention by a digital processor 111 to produce realistic target-like signals for transmission by a decoy transmitter transducer or transducer array 112.

Although the invention will be described with reference to single transducers 110 and 111 this is done for convenience. In practice transducer arrays would be employed with beamforming circuitry to improve detection efficiency and minimise the transmission power requirements. An analog-to-digital (A/D) converter 113 digitises the incoming analogue signal from the transducer 110 at a constant sample rate and the signal samples are then stored sequentially in a dynamic RAM memory 114.

Reading and writing samples respectively out from and in to the RAM 114 are controlled by read and write address counters 115,116 which introduce programmable delays between reading (transmitted) and writing (received) samples which thereby increase the apparent distance of the decoy from the attacking sonar.

The write address for the memory 114 is generated by an address multiplex circuit 117 connected between the memory and the write address counter 116. Timing of the circuit is controlled by a clock 118. In a similar way the read address for the memory 114 is generated by the address multiplex circuit 117 from the output of the read address counter 115. By altering the delay time between reading and writing the signal samples slowly as a function of time the decoy can be given apparent motion in the water and this also produces consistent Doppler shift in the output waveform. Changes in the delay time to simulate decoy movement are effected by a Doppler Control 119, using information stored in a Doppler ROM 120, which is connected to the Read address counter 115.

The output from the Doppler Control 119 is also connected to a read address counter and a Spacing ROM 121. The output from the Spacing ROM 121 is arranged to modify the time delays introduced by the read address counter 115 so as to multiply time-separated sample outputs from the memory 114.

Each memory output is given an offset relative to some reference point such that a series of highlights can be created in the output waveform. The spacings read from the Spacing ROM 121 are changed in dependence on the apparent Doppler shift of the return signal introduced by the Doppler Control 119 such that changing aspect ofa realistic target can be simulated by the decoy. Each highlight can then be assigned its own apparent reflective property by controlling the amplitude of the signal samples.

Signal samples read from the memory 114 are connected to a scale end add circuit 122 where appropriate amplitudes scaling factors are read out from a height ROM 123 with address controlled by means of the Doppler control 119.

The digital signal output from the scale and add circuit 122 is converted to analogue form by a digital-to-analog converter (D/A) 124 for transmission by the transducer 112.

Since the signal read out from the memory is delayed by a time period equal to the difference in read/write addresses multiplied by the period of the clock used for generating the addresses, the size of the memory confers a limitation on the apparent movement of the echo signal. In one arrangement the decoy ROMS are programmed such that there is an apparent circling of a realistic target which is simulated within the boundaries of a practical decoy memory.

As shown in Figure 2 signal input samples are connected to the input of the memory RAM 114 and a time delay is introduced before reading out the sample for transmission, the time delay being represented by the position on a curve 210 from a reference origin 211 with the time delay increasing in the sense of the arrow 212. The curve 210 is a perspective representation of a circling target. Values of Doppler change are stored in the Doppler ROM 120 so as to present both opening and closing Doppler shifts to the attacker, as represented respectively by the lower and upper portions of the curve 210.

The received signal is sampled every 5 ps clock period and converted to digital form using a 12-bit A/D converter 113.

The samples are stored sequentially in the memory 114 such that a history of the received waveform is progressively built up. The output 213 for transmission by the output transducer 112 is obtained by taking 16 samples (214) from the memory to the scale and add circuit122 in each clock period, multiplying each sample by a highlight weighting factor (123, not shown), and summing the resulting values. As described earlier, each sample is delayed before read out by an amount equivalent to the range effect, plus its own highlight position offset. The overall effect of adding these weighted samples is to simulate a target having a highlight structure and a varying range offset from the receiver position.

The data for the position and amplitude of each highlight are held in the ROMs 121 and 123 respectively. The highlighted output is given apparent Doppler shift by incrementing or decrementing the memory output address relative to the input address. This gives rise to changes in delay between output and input signals changing the perceived range of the target. The simultaneous expansion or contraction of the spaced signal samples in the memory gives apparent Doppler shifts consistent with the apparent range changes.

Operation of the circuit will now be given in more detail with further reference to Figure 1. The analogue signal from the transducer 110 is sampled every 5'us clock period by an input sample-and-hold circuit (not shown) between the transducer and the A/D converter 113. The A/D converter 113 produces a 12-bit output for each sample which is then stored in the memory 114.

The memory consists of six 64k x 4 dynamic RAM chips arranged to provide a memory of 128k x 12 bits. Memory refresh is achieved by taking the least significant eight bits of the read and write address from the address multiplex 117 to the Row address of the memories. This ensures that the memory is refreshed every 256 clock periods i.e. 1.28 ms. A 17- bit Write address register is provided and comprises the write address counter 116 which is incremented every 5 ps clock period. The total length of the storage period for the 128k memory blocks is therefore 0.66 s.

A 17-bit Read address register is also provided and this again includes the read address counter 115. The Read register is controlled by the Doppler control 119. This is arranged such that the read address counter 115 increments on most clock periods but adds or inhibits a count periodically in order to expand or contract the signal over a larger number of address locations in the memory 114, thereby simulating Doppler shift in the output waveform. Timing information for adding to or inhibiting the read address counter is controlled by data stored in the Doppler ROM 120. An eight position switch (not shown) is provided on the Doppler ROM 120 to select one of eight speeds programmed in the ROM.

The Spacing ROM 121 contains information for positioning each of the sixteen highlight samples (214) which are read from the memory 114 in each clock period. The Spacing ROM 121 is programmed to provide sample spacing appropriate to a circling target.

The sixteen outputs (214) in each 5,us clock period are read out of memory in sequence into the Scale and Add circuit 122 which is a multiplier/accumulator chip. Each sample value is scaled by a highlight scaling factor held in the Height ROM 123 and the resultant values are summed in the accumulator section of the chip. A 16-bit word formed by summing all the highlight values in each 5,us clock period is output from the multiplier/ accumulator at the end of each summing period and passed to the D/A converter 124 which produces the processed analogue signal for transmission at its output. An output sample-and-hold circuit (not shown) is used to avoid glitches which are present on the D/A output.

The decoy operates et any frequency from DC to about half of the sample frequency, producing an output waveform that is the convolution of the input waveform and the highlight structure at a particular time, including the time delay introduced by the circuitry.

Figures 3 - 7 are circuit waveforms illustrating the effectiveness of the invention using a short duration input signal. In Figure 3, 310 shows the sixteen sample height structure output from the Height ROM 123 displaying a submarine- like profile at position A as shown in Figure 2. 311 shows the signal input voltage to the circuitry, as from the receiving transducer 110, displaying a sharp input pulse 312 at time 313.

The signal output from the Scale and Add circuit 122 after time delay and Doppler processing appropriate to point A in Figure 2 is shown by the voltage output signal 314. Here the highlight pattern 315 for transmission begins at time 316, about 330 ms after receiving the input signal 312. Also indicated on this Figure is the maximum permissible time delay 317. referred to above, which represents the maximum delay possible using 128k memory locations at the selected clock rate.

Figure 4 shows an alternative highlight pattern 410, also appropriate to point A in Figure 2, showing a linear change of highlight amplitude with position. In this example the output voltage signal 415 has a reduced delay time after the input signal 411 when compared with Figure 3.

Figure 5 shows the output signal of the decoy with the same highlight pattern 410 as shown in Figure 4 but at the extreme end of the permissible time delay 516, represented by point B in Figure 2. Here the output signal voltage level has greater amplitude than output 415 due to the summation of highlight amplitudes as described with reference to Figure 2.

Figures shows the same output signal on an expanded time scale, illustrating that the width of the output signal is about ms.

Claims

Claims 1. A target echo simulator comprising: a) a detector responsive to

an energy signal transmitted from a surveillance/ detection system; b) an analog-to-digital means to sample the detected transmission signal; c) a memory means to store the sampled signal; d) a programmed scaling means to scale the sample elements of the signal; e) a programmed delay circuit to provide memory output address signals; f) a digital-to-analog means connected to the output of the memory; 9) an output transducer connected to the output of the digital-to-analog means to transmit analog signals; and h) a programmed means to space the signal samples; the arrangement being such that by appropriate scaling and delay of each sample a complex reflector can be simulated.
2. target echo simulator as claimed in claim 1 wherein the delay circuit is programmed to simulate a moving target at a pre determined distance from the decoy.
3. A target echo simulator as claimed in claim 1 or 2 wherein delays and Doppler shifts are pre-programmed to simulate a circling target.
4. A target echo simulator as claimed in any one preceding claim wherein a clock-incremented write counter is used to generate memory addresses for signal samples.
5. A target echo simulator as claimed in any one preceding claim wherein a read counter is provided for generation of read addresses including an input from a Doppler control circuit which is arranged to add to or inhibit selected read counts so as to provide simulated Doppler shifts.
6. A target echo simulator es claimed in any one preceding claim wherein there is provided a Doppler ROM programmed to provide information for Doppler shifts.
7. A target echo simulator es claimed in any one preceding claim wherein there is provided a Spacing ROM with programmmed highlight features of a simulated target, the Spacing ROM being connected to the Doppler Control and the Read Counter such that the sample spacing can be reduced or expanded in dependence on the Doppler shift such that varying aspects of a target can be simulated.
8. A target echo simulator as claimed in any one preceding claim wherein thereis provided a Height RDM! programmed to include scare values of highlight features of a simulated target.

8. A target echo simulator acclaimed in any one preceding claim wherein there is provided a Height ROM programmed to include scale values of highlight features of a simulated target.

9. A target echo simulator as claimed in any one preceding claim wherein during each clock period a number of sequential memory locations are read out to a Scale and Add circuit, each corresponding sample then being scaled by multiplication with the highlight scale values and the scales samples added to give the output signal for D/A conversion.

Amendments to the claims have been filed as follows 1. A target echo simulator comprising a) a detector responsive to an energy signal transmitted from a surveillance/detection system; b) ananalogue-to-digital means to samplethedetectedtransmission signal at a pre-selected rate of a clock; c) a memory means to store signal samples at successive memory locations determined by a write address counter; d) a programmable delay circuit comprising a read address counter to read out for each read in sample a pre-determined number of stored signal samples corresponding to locations representative of programmed delays between writing and reading, each of the pre-determined number corresponding to successive highlight locations on the target; e) programmed spacing means to vary the read addresses so as to vary the spacings between the pre-determined number of samples read out from the memory means; f) storage means containing values representative of the target highlight values for each of the pre-determined number of highlight locations; g) scaling means to receive the pre-determined number of samples reed out from the memory means and to multiply successive samples by highlight values; h) a digital-to-analogue means connected to the output of the scaling means; and i) an output transducer connected to the output of the digital-to-analogue means to transmit analogue signals; the arrangement being that the read addresses can be programmed to simulate a target of pre-determined aspect, velocity and range, with respect to the surveillance detection system.

2. A target echo simulator as claimed in claim 1 wherein a Doppler controller is provided to control the delays and the spacings whereby changing aspect of a moving target can be simulated.

3. A target echo simulator as claimed in claiml or2 wherein the delays are programmed to simulate a moving target at a pre-determined distance from the decoy.

4. A target echo simulator as claimed in any one preceding claim wherein the delays and spacings are pre-programmed to simulate a circling target.

5. A target echo simulator as claimed in any one preceding claimwherein the read counter includes an input from a control circuit arranged to add to or inhibit selected read counts to the lead address so as to provide simulated Doppler shifts.

6. A target echo simulator as claimed in any one preceding claim wherein there is provided a Doppler RfM programmed to provide information for Doppler shifts.

7. A target echo simulator as claimed in any one preceding claim wherein there is provided a Spacing RDM with programmmed highlight features of a simulated target.