GB2362507A - A method of providing a bias voltage at radio frequencies - Google Patents

Abstract

The method provides a bias voltage at radio frequencies for example above 1 GHz, to a device 3 carried by a substrate having a plurality of overlapping electrically conductive layers 5, 6, 7 with dielectric material 8, 9 therebetween. The method consists of connecting a resistor 10 across a pair of the plurality of layers, maintaining one of the pair of layers at ground potential, and connecting the other layer to the device through via holes in the substrate. Thereby, a capacitor is formed in the overlapping layers. The method provides reduced parasitic inductance. The dielectric material 8, 9 may be a prepreg material. The conductive layers may be made from copper. The device 3, is preferably on FET.

Description

2362507 1 A METHOD OF PROVIDING A BIAS VOLTAGE AT RADIO FREQUENCIES C,

This invention relates to a method of providing a bias voltage at radio frequencies to a device carried by a substrate having a plurality of overlapping electrically conductive layers with dielectric material ffierebetween.

Known methods of providing a bias voltage for a packaged device bonded to a printed circuit board are shown in Figure 1. Such methods must provide a finite DC impedance and ideally an AC short at the frequencies of interest.

Figure 1 a and b show self biasing using a discrete capacitor. Such an approach cannot be used at high frequencies (for example over 1 GHz)) due to the detrimental effects of the parasitic inductance of the device leads which is difficult to control and compensate for. At these frequencies, the usual approach is to ground the source (or emitter), and use an active bias circuit consisting of one or more bias transistors, as shown in Figure 1 c.

According to a first aspect of the invention there is provided a method as specified in claims 1 - 4.

According to a second aspect of the invention there is provided a device as specified in claim 5.

The present invention reduces the amount of circuitry required and thus the board area employed. It also eliminates the requirement for a negative voltage supply.

Embodiments of the invention will now be described, by way of example only, with reference to the accompanying schematic drawings in which:

Figure 1 shows prior art circuit arrangements, as described above,

Figure 2 shows a cross section diagram of an embodiment of the invention, and Figure 3 a, b and c shows plan views of layers 5, 6 and 7 respectively shown in the embodiment of Figure 2.

2 The device according to the invention shown in Figure 2 comprises a device such as an FET (3) bonded to a substrate, in the present embodiment a multi layer PCB (4). The PCB comprises a plurality of overlapping electrically conductive layers, in the present example copper layers (5, 6, 7) 17 microns tl-dck, with dielectric layers (8, 9) 100 n-Licrons thick between the copper layers. The dielectric used in the present embodiment is a "prepreg" material, well known in the art. Layer 9 should be as thin as possible to increase the capacitance. Via holes are provided in the substrate to enable connection between conductive layers.

Copper layer 6 is maintained at r.f. ground potential, and a resistor (10) is connected between layers 6 and 7. The source tabs (11) from the FET (3) are also connected to layer 7. Thus layers 6, 7 and 9 constitute a substrate capacitor having a bias resistor (10) connected across the substantially parallel plates of the capacitor.

In practice, it has proved possible to fabricate substrate capacitors in this way which have a capacitance of 10 pF, yielding an impedance much lower than that possible with the prior art method shown in Figure 1.

The method described above will provide good results at frequencies of 1GHz and above. Using these techniques, a PHEMT device achieved a gain of 17 dB at 6 GHz with an amplifier running at 30 n-LA and 3.2V, using a 10 ohm bias resistor. The device produced a gain of 24 dB at 1.5 GHz. A frequency doubler circuit with an input at 1.7 GHz gave 11 dB gain and 11 dBrn at 17 n-LA and 3.2 V using a 22 ohm bias resistor.

Although the devices shown in Figure I a and Figure 2 use a typical high frequency package, the invention can be applied to any type of package.

3

Claims (4)

1. A method of providing a bias voltage at radio frequencies to a device carried by a substrate having a plurality of overlapping electrically conductive layers with dielectric material therebetween, the method consisting of connecting a resistor across a pair of said plurality of layers,, maintaining one of said pair of layers at ground potential, and connecting the other layer to the device through openings in the substrate, thereby forming a capacitor in the overlapping layers, the method providing reduced parasitic inductance.

2. A method as claimed in claim 1 in which the device operated at frequencies above 1 GHz. '

3. A method as claimed in claim 1 in which the device includes or consists of a FET.

A method as claimed in claim 3 in which the other layer of said pair of layers is connected to the source tabs of said FET.

A device fabricated according to the method specified in claim 1 -

4.