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GB2353448A - Multiplexed electronic bus system - Google Patents

Multiplexed electronic bus system Download PDF

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Publication number
GB2353448A
GB2353448A GB9919727A GB9919727A GB2353448A GB 2353448 A GB2353448 A GB 2353448A GB 9919727 A GB9919727 A GB 9919727A GB 9919727 A GB9919727 A GB 9919727A GB 2353448 A GB2353448 A GB 2353448A
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Prior art keywords
wire
daisy
node
voltage
address
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GB9919727A
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GB9919727D0 (en
Inventor
Neil Alexander Downie
Craig George Sawyers
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Priority to GB9919727A priority Critical patent/GB2353448A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • H04L12/40032Details regarding a bus interface enhancer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/403Bus networks with centralised control, e.g. polling

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

A multiplexed electronic bus system is intended to allow the connection of a single intelligent master station 24 to a large number of extremely simple slave stations 18 (nodes) using minimal wiring and minimal node electronics. Each node is 'dumb' (it possesses no software or microprocessor) and is identical to every other node. The nodes are wired in 'daisy-chain' fashion, with at least a common wire 21 and daisy wire 22. The common wire (which may be the ground conductor) is continuous but each node interrupts the daisy wire. The interrupted daisy wire allows the system to infer addresses for each node, without each node actually possessing an address prior to its connection. This can be done by, for example, passing a known constant current down the daisy chain and placing a resistor 17 between daisy wire input and daisy wire output at each node. Conveniently, there are three other wires, the address command wire 16, the power supply wire 20, and the data wire 12. The voltage on the address command wire is used to activate each node individually. This is achieved by comparing (19) the address command voltage with the daisy voltage at each node. If these are equal (within a tolerance band), that particular node's sensor (23) status is impressed on the data wire 12. Alternative embodiments use fewer wires, and in further alternative embodiments the sensor can be an analog sensor, and an actuator can also be remotely operated in the same way, with data transmitted from the master to the node.

Description

MULT11PLEXED ELECTRONIC BUS SYSTEM This invention relates to a multiplexed
electronic bus system.
Systems such as HVAC (heating, ventilating & air conditioning) monitoring and control, fire or security alarms, or the electrical systems of motor vehicles, require a large number of distributed sensors and actuators (temperature sensors, smoke sensors, fire door actuators, air conditioning actuators, alarm indicators). These can be simply wired to the control microcomputer, with each sensor having a dedicated 2 or 3- wire cable. This uses large quantities of cable, however, and is expensive to install. Alternatively, for alarm systems with simple on/off sensors and no actuators, a straightforward and cheap solution is simply to wire up the sensors in series (or parallel) so that if any one switches, the alarm is triggered. Domestic intruder alarms often work in this way. However, such systems are difficult to debug if a fault occurs since there is no information that helps to locate the fault.
Today a number of more sophisticated alternatives are available to overcome the problems associated with the above systems. These can indicate which sensor was triggered, and also offer some limited capability for more sophisticated sensor and actuator operation. Serial bus systems (such as RS232) can clearly meet the need. However these have the disadvantage of using several wires (e.g. 6 for the standard RS-232). Nevertheless, the latest generation of systems (especially as configured for alarm and HVAQ can be made to operate on only 3-wire or even 2-wire cable. The cable is simply taken around every sensor, which is wired in parallel across it, with great savings in wiring. Branching from an existing ring circuit is allowed, in most of these systems, at least within limits. Existing, available solutions fall into two categories:
I. Relatively sophisticated serial communication buses offering addressed nodes. These offer intelligent (microprocessor) nodes, which can receive serial addresses from the master unit and transmit or receive data back along bus wire. In two-wire systems the power connection is also used as the data and address bus. Since the nodes are connected in parallel across the bus wires, it is necessary to have a strict start-up and / or clock synchronisation protocol to prevent bus contention. The master units must also include a parallel-to-serial and a serial-to-parallel converter to communicate with the nodes. The nodes must similarly include a converter to decode the serial addresses to know whether they are being addressed, as well as clock and timing circuits. These addresses are either pre-programmed or hard-wired using switches or solder links.
A&B Fire Detection, for example, use a set of switches at each node to define the node's unique address. An alternative approach is to make nodes with a different address on each chip at the fabrication stage. The Dallas Semiconductor Corp 'MicroLAN' system is based on this principle. Laser trimming (an expensive, additional manufacturing step) defines the addresses. In addition, the Dallas devices also have a complex start up procedure to resolve inherent bus clashes: the master software must'leam'the node addresses, and then memorise the addresses to resolve this problem.
2. Alternative prior art uses serial communication bus with counter 'addressed' nodes. One of the simplest solutions in current manufacture is the system licensed by Allegro Microsystems for use in their'addressable'Hall-effect magnetic sensors (ADE Ltd uses this system on their Karizma+ alarm systems). This works by having a counter integrated in each sensor. The sensors are made in sets, each sensor having a different trigger count, from I to 29 for example. When pulses are applied to the bus, each sensor counts them, until its trigger count is reached, when it replies with a current pulse on the bus. The bus can also be used to supply power to the nodes, again giving a 2-wire system if desired. However, this solution requires some sophistication in the inteffogating software. It is also awkward because of the need to define the sensor number at chip fabrication time. Only a limited number of trigger count differing sensors is available (typically less than 30). Extensions of systems are difficult because repetition of trigger count must be avoided.
In multiplexed electronic bus systems according to our invention for allowing a master unit to communicate with a multiplicity of identical nodes, which nodes operate one or more sensors and/or actuators, a 'daisy' wire is used to connect nodes in series i.e. in a 'daisy chain'. In other words, the daisy wire is interrupted by the node electronics, and is not continuous. The node electronics modifies the electrical signal on the daisy wire to uniquely identify its node number, or physical position in the system. This process allows the system to infer addresses for each node, without each node actually possessing an address prior to its connection. The address coding is therefore a function of the node's electrical location in the sensing or actuation system. The nodes are also connected in parallel on uninterrupted bus wires which carry address signals which indicate which node is addressed, data signals which indicate what data value is to be communicated between addressed node and master, and, if necessary power and ground wires. An address command signal from the master unit addresses the nodes in the daisy chain by issuing an address command on a address wire which matches at some point in the daisy wire the signal on the daisy wire as modified by the chain of nodes. Each node's electronics has a signal modifying element connected between the daisy wire input and the daisy wire output, and the signal on the daisy wire is modified at each successive node so that it is different from all preceding signals. Each node's "address" is therefore defined by the signal on the daisy wire at that particular position on the daisy chain and hence by the physical position of the node in the daisy chain wiring. The address command signal is compared at each node with the daisy voltage and when the address command and daisy signals are equal (within a small defined range), the node electronics is triggered to allow the sensor and/or actuator of the node to communicate with the master unit via the data wire.
The simplest embodiment of our invention relies on a voltage level to address each of the nodes in the daisy chain. Each node's daisy wire signal is modified using a voltage-dropping element (typically a resistor or diode) connected between the daisy wire input and the daisy wire output. Each node's "address" is therefore defined by the voltage on the daisy wire at that particular position on the daisy chain. An address command voltage (typically a ramp or staircase waveform) is compared at each node with the daisy wire voltage. This is typically achieved using a simple discriminator or comparator. When the address command and daisy voltages are equal (within a small defined range), the node electronics is triggered to provide an output onto the data wire, typically by gating the sensor via an open collector transistor. This system employs 5 conductors: power (Vcc), earth, address command voltage, daisy wire and data wire, which can be conveniently contained in a single cable of the type commonly used for domestic telephony.
The use of a constant current source to feed the nodes via the daisy wire means that the voltage levels that the master must command will always be on the same 'staircase' of levels. New nodes simply add more 'stairs'. The voltage at the first of the N nodes will be NIR, the second node will be (N-1)IR, and so on, until the last daisy wire has only the voltage due to the constant current 1 flowing through the last node resistor of value R. The same effect is achieved if diodes are used instead of resistors for the voltage drops between nodes. An alternative embodiment of the invention employs a constant voltage source. In this case constant current drain circuits are located in each node. This drain can be simply provided by a resistor, or alternatively the node circuit and/or sensor itself may drawthecurrent. This current flowing in the daisy wire is used as the 'address' for each node. This is equal to NI in the first section of daisy wire, (N-1)I in the second section of daisy wire and so on, until the last section of daisy wire has only the current 1 due to the constant current drained in the last node. A suitable measuring circuit can detect the current flowing. For example a small value resistor wired into each node between input and output daisy wire provides a voltage drop proportional to the current flowing. The output of the measuring circuit is compared to the address voltage (or current) on the address command wire and used to gate the sensor onto the data wire as before.
Systems using other variations of the same principle will be clear to those skilled in the art. The master must generate accurate address command levels, which is typically achieved using a digital to analog converter (DAC). Systems we have built work adequately with 16 levels of voltage at sub-millisecond speed with a reasonable degree of noise immunity in the laboratory even on unshielded cables. Systems with up to 32 or more levels of voltage should be possible, although these would clearly require more care in rejecting sources of electrical interference.
Slightly different operational modes using the system of our invention will also be clear to those skilled in the art. The address command voltage can be tailored to provide different functionality. For example, it can be a simple 'staircase' waveform that addresses each possible node in turn. Alternatively, it may be a'sparse staircase' in which known missing addresses are avoided (the master having a list of valid addresses). Or it may be a waveform that visits a particular node or nodes more often than other nodes. If nodes are hopped in this way, care must be taken that the momentary replies from other nodes during switching transients are ignored. This is easily achieved by requiring that the master only reads the data from the data wire when the address command voltage has had settled. In the presence of noise, either on the data wire or on the address command bus, the master can take successive readings and use an average or majority logic, or simply pause longer on each reading, or a combination of these.
The invention can be adapted to multiplex analog sensors by changing the open collector data wire transistor and the AND gate which feeds it for (e.g.) a FET analog switch. This provides the node electronics with an analog sensor capability in the most direct way. Alternatively the analog signal can be encoded before connection to the data wire. In either case, the master electronics is arranged to interpret the received signals to recover the analog data. Numerous encoding schemes are known in the art, such as converting the signal to the width of a digital pulse, or using frequency or phase modulation.
A more complex alternative is to use an analog-to-digital converter. An analog to digital converter (ADC) converts the sensor input into serial digital form, which is sent in a burst of binary bits (encoded for example as long and short pulses for I and 0), along the data wire when the node is addressed.
The invention can also be adapted for use as an addressable actuator bus in a number of ways.
If an actuator needs only a single pulse to activate it, then the data wire can simply be connected to a driver circuit at the master unit. Examples of actuators which fall into this category are alarm bells (which often have a latch-on circuit), or door opening or closing solenoid (where the actuator is instantaneous in action). The data wire at an actuator node is then simply fed via a buffer circuit to the actuator operated by that node.
If actuators that are not latching must be used, then a latch circuit can be employed at the node. This could be a set-reset latch with the data wire as the set input and the reset input connected to the power supply. Interrupting the power supply briefly will then provide a reset signal. Alternatively, the data signal from the master unit can encode a 'set' or 'reset' signal, for example by voltage or current or pulse length. Further alternatively, two node circuits can be used for the actuator giving set and reset functions for the latch located at the dual node. Similarly the actuator operation can be made self-checking by using another node circuit at a dual node.
It is also within the scope of the invention that a system can interface both sensor nodes and actuator nodes on the same bus.
Debugging systems according to the invention is very simple. For example, in a sensor-only system, a voltage from a simple variable power supply can be connected to the address command wire. This allows the reply from each sensor to be checked directly, just as if the sensor were wired directly to the user. The variable voltage could be as simple as a battery and variable resistor connected as a potentiometer.
If slightly more sophisticated equipment is at hand, then the application of a ramp waveform to the address command wire while monitoring the data wire voltage or current versus time instantly gives a graphic view of the system and where problems lie. This can be achieved with straightforward, standard electronic test equipment such as a hand-held oscilloscope and/or multimeter and an audio-frequency signal generator This contrasts with prior art bus systems described above, where sophisticated logic analysers, or specialist test equipment is necessary to locate fault conditions.
The limit on the number of nodes on systems according to the invention are mainly imposed by noise on the wiring, and the maximum voltage that can be used on the circuits (around 30V). With the use of the maximum 30V, and 0.6V wide channels IV apart (giving a noise immunity not much worse than some of the older TTL digital systems) up to 30 channels are possible.
Clearly the principles of the invention can be extended to very large numbers of sensors with the use of two address command bus wires and two daisy chains. One daisy chain (the 'zone daisy') would be wired via nodes between power supply and ground with a node resistor every (say) fifteen nodes. The second daisy chain (the 'node daisy') would have a resistor at each node, with fifteen, fifteen-long chains of node resistors connected between the power supply and ground, each chain starting every sixteenth node. This would provide 225 nodes using only using 2 more wires than the standard system (7 instead of 5 conductors).
The basic system of our invention employs conductors with at least 5 functions. These are power, earth, address command voltage, daisy wire and data wire. This can be provided, for example, with 5 wires in a single cable. However, it is within the scope of the invention that two or more of these functions may be combined together so that fewer wires are used.
There are a number of ways this can be done. The imposition of pulsed signals on a power supply line is well known: all that is required is a power supply filter on each node, which gives a sufficiently high impedance for signals. A series power-supply regulator in each node can also act as such a filter. Signals are separated from the power supply line using another filter, conveniently a simple capacitor (with series resistor in most cases).
This approach can be used for the data wire of the invention, combining the data wire with the power supply. The system of the invention gives a pulse when the voltage address command first reaches a node that may, in many cases, suffice as the signal. This signal can be repeated by removing and then re-imposing the voltage address command to give a stream of pulses on the data wire if necessary. Alternatively a signal with AC content such as a pulsed signal can be generated specifically for this purpose in each node: pulse length encoding for analog signals, for example. Using any of these techniques, the number of cable conductors required can be reduced to 4.
In a similar way, if the frequency spectrum of the command wire signal does not overlap with the data signals, the same wire can be used for both data and address command. This also reduces the number of cable conductors to 4.
Also in a somewhat similar way, the daisy wire can be used for feeding back pulsed reply signals. The daisy wire voltage to the comparator circuit can be low-pass filtered so that imposed signals will not affect it. The use of diode instead of resistor daisy voltage droppers may have an advantage here. A small capacitor added to each Daisy resistor can provide a low enough impedance for signals. Any of these methods also provide a means to reduce the wires needed to 4.
The use of the power supply as an address command voltage is also possible: each node has a power supply regulator/filter, which reduces the applied voltage, conveniently to 5V, and also provides a reasonably high dynamic impedance to voltage changes on the power line. The address command voltage conveniently scans from (say) 5V to 15V, giving power to each node all the time, but also providing the voltage address command to the comparator circuits. The comparator circuits are fed with a steppedup power supply, or are otherwise modified to allow them to function with input voltages greater than the'5V-power supply. An alternative is to provide voltage dividers to reduce both the address and daisy voltages to be compared to below, say, the 5V-power supply. The daisy wire has a terminator circuit rather than simply being connected to ground (which can be as simple as a Zener diode or other diodes giving a 5V voltage drop) which ensures that all the node trigger voltages lie within the 5- 15V band. In this way the number of conductors is reduced to 4. This technique can be combined with the pulsed signal on the daisy wire to reduce the conductors needed for the invention to 3.
Figure I is a schematic of a prior art multiplex bus system.
Figure 2 is a schematic the concept of our invention.
Figure 3 shows the circuit diagram of a 5-wire voltage-addressed embodiment of the invention.
Figure 4 shows the circuit diagram of a 3 -wire voltage-addressed embodiment of the invention.
Figure 5 shows the circuit diagram of a 5-wire current-addressed embodiment of the invention.
Referring to figure 1, a prior art multiplexed bus system has intelligent (microprocessor) nodes 2, which can receive serial addresses from the master unit 1, transmit or receive data along bus wires 3. In each case, address and data can be combined with the power line to achieve a 2-wire bus. The nodes are connected in parallel across the bus wires, and have to participate in a start-up and/or clock synchronisation protocol. The master units must include a parallel-to-serial converter 4 for addressing and a serial-to-parallel converter 5 to receive replies from the nodes. The nodes must include a converter 6 to make the serial address pulses into a parallel address in order to know whether they are being addressed, as well as clock and timing circuits 10. Addresses are either preprogrammed or hard-wired using fieldprogrammable links, switches or solder links as illustrated schematically in the inputs to the AND gate 7. When an address match occurs, the converter unit 8 interfaces the sensors 9 to the bus.
Referring to Figure 2, a voltage-controlled daisy-chained bus system according to the invention, the bus wires are the data wire 12, the ground wire 21, the power wire (Vcc) 20, the command address wire 16, and the daisy-wire 22. A constant current source 14 feeds current down the chain of resistors 17 located at each of the nodes 18. The end of the daisy wire is connected to ground. Comparators 19 compare the voltage on the daisy wire 22 at the node with the voltage on the command address wire 16. The status of sensor 23 is communicated to the data wire 12 only if these voltages are the same within defined limits. The control microprocessor 11 in the master unit 24 communicates digital data to digital-to-analogue converter 13 and buffer amplifier 15. The voltage level at the output of buffer amplifier 15 is an analogue representation of the digital data generated by microprocessor 11. By using appropriate digital data, voltage levels at the output of buffer amplifier 15 can be made to correspond with the required levels to address the nodes 18.
Referring to Figure 3, a simple specific embodiment of a node of a voltage-controlled system according to the invention, the command address wire 42 is connected to the upper comparator 3 3 directly and to the lower comparator 34 via a diode 4 1. If the voltage on the daisy wire 3 1, after the voltage-dropping resistor 3 2, is between the command address wire voltage and a diode voltage drop below that voltage, then the AND gate 36 ensures that the sensor 39 (which may act as a switch 40 connected to Vcc, for example) status is gated via AND gate 37 and transistor 38 on to the data wire 43.
Referring to Figure 4, a specific embodiment of a node of a system according invention where a reduced number of conductors are needed, only 3 wires are employed in the system to connect the master unit with many nodes. These are the combined data and daisy wire 5 1; the ground wire 57; and the combined power and command address wire 56. The power/address wire 56 is connected to the comparators 59 and 60 directly and via a diode respectively. If the voltage on the data-and-daisy wire 5 1, after the voltage-dropping resistor 66, is between the command address wire voltage and a diode voltage drop below that voltage, then the AND gate 62 allows the sensor 5 5 to enable a pulse generator 5 3 and transistor 65 to output a pulse on to the data and daisy wire 5 1. The capacitor 67 ensures that data pulses can be transmitted almost unimpeded by the daisy chain resistor 66, while the low-pass filter, formed by resistor 69 and capacitor 68, ensures that a smoothed daisy voltage is supplied to the comparator inputs. Power (Vccl) to operate most of the circuit is obtained by a regulator 58 from the power/address wire 56. Ahigher voltage supply (Vcc2) for the comparators 59 and 60 is provided by a step- up power supply 61 operating from the power/address wire directly or from Vcc L There is a minimum command address voltage: this must be high enough to operate the regulator 58 and step-up 61. This is allowed for by connecting the daisy wire from the last node not to ground (as it is in Figure 2) but via a suitable resistor or other voltage-dropping device to ground.
Referring to Figure 5, a specific embodiment according to the invention uses a constant voltage source 74 is used instead of a constant current source. Constant current drain circuits 77 (which can be as simple as a resistor or may even be the current drawn by the node circuit and/or sensor itself) are incorporated in each of the nodes 78, and which employs the current flowing through the daisy wire as the 'address'.
The bus wires are the data wire 72, the ground wire 8 1, the power wire (Vcc) 80, the command address wire 76, and the daisy-chained daisy-wire 82. The control microprocessor 71 in the master unit 84 may thus, by imposing a digital address on the digital to analogue converter 73 and buffer amplifier 75 address and then communicate with any one of the nodes 78.
This current is NI in the first section of daisy wire, (N-1)1 in the second section of daisy wire and so on, until the last daisy wire has only the current I due to the constant current drain in the last node. A circuit 91 can detect the current, for example, by means of the voltage dropped across a small value resistor 92 wired into each node between input and output daisy wire. The output of circuit 91 is compared to the address voltage (or current) on the address command wire 76 and used to gate the sensor 83 onto the data wire 72 as before.

Claims (6)

1. A multiplexed electronic bus system for allowing a master unit to communicate with a multiplicity of identical nodes, which nodes operate one or more sensors and/or actuators, in which a 'daisy' wire is used to connect nodes in series i.e. in a 'daisy chain'. In other words, the daisy wire is interrupted by the node electronics, and is not continuous. The node electronics modifies the electrical signal on the daisy wire to uniquely identify its node number, or physical position in the system. This process allows the system to infer addresses for each node, without each node actually possessing an address prior to its connection. The address coding is therefore a function of the node's electrical location in the sensing or actuation system. The nodes are also connected in parallel on uninterrupted bus wires which carry address signals which indicate which node is addressed, data signals which indicate what data value is to be communicated between addressed node and master, and, if necessary power and ground wires. An address command signal from the master unit addresses the nodes in the daisy chain by issuing an address command on a address wire which matches at some point in the daisy wire the signal on the daisy wire as modified by the chain of nodes. Each node's electronics has a signal modifying element connected between the daisy wire input and the daisy wire output, and the signal on the daisy wire is modified at each successive node so that it is different from all preceding signals. Each node's "address" is therefore defined by the signal on the daisy wire at that particular position on the daisy chain. The address command signal is compared at each node with the daisy voltage and when the address command and daisy signals are equal (within a small defined range), the node electronics is triggered to allow the sensor and/or actuator of the node to communicate with the master unit via the data wire.
2. A system as in Claim I in which the daisy wire is fed by a power source such as a constant current source and in which each node modifies the voltage on the daisy wire by reducing the voltage with a voltage- dropper element such as a resistor or diode until the last node is reached, where the daisy wire is connected to ground, and in which the address command comprises a voltage signal and in which the address/daisy equality comparison circuit is a voltage comparator assembly.
3. A system according to Claim I in which a constant voltage source instead of a constant current source and constant current drain circuits (which can be as simple as a resistor or may even be the current drawn by the node circuit and/or sensor itself) in each node, and employ the current flowing through the daisy wire as the'address'. This current is NI in the first section of daisy wire, (N-I)l in the second section of daisy wire and so on, until the last daisy wire has only the current I due to the constant current drain in the last node. The current can be detected by a current measuring circuit for example by means of the voltage dropped across a small value resistor wired into each node between input and output daisy wire. The output of the measuring circuit is compared to the address voltage (or current) on the address command wire and used to gate the sensor onto the data wire as before.
4. A system as in Claims I or 2 or 3 in which each node, when it is addressed, can connect its sensor to the data wire via a pass gate such as a field effect transistor, allowing the master unit to sense the state of the analog or digital sensor.
5. A system as in Claims I or 2 in which each node, when it is addressed, switches on a transistor to pull the data bus towards ground or not, depending upon the state of the binary input from the sensor, thus indicating the sensor state to the master unit.
6. A system as in Claims I or 2 which, although employing conductors with 5 functions, power, earth, address command voltage, daisy wire and data wire, actually functions with only 3 conductors, wherein the first conductor is earth, the second conductor is both power and address command voltage combined and the third conductor is both daisy and data wire combined. Electronic filter units such as RC filters remove data signals from the third conductor to give a stable voltage comparison, and at the same time further high-pass filters such as capacitors across the voltage-dropper elements provide a low impedance path for data signals. Voltage regulator and converter units supply power to nodes from the second wire while the voltage on this wire is used for comparison with the daisy voltage for address recognition.
GB9919727A 1999-08-20 1999-08-20 Multiplexed electronic bus system Withdrawn GB2353448A (en)

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