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GB2336086B - A linear surface memory to spatial tiling algorithm/mechanism - Google Patents

A linear surface memory to spatial tiling algorithm/mechanism

Info

Publication number
GB2336086B
GB2336086B GB9907701A GB9907701A GB2336086B GB 2336086 B GB2336086 B GB 2336086B GB 9907701 A GB9907701 A GB 9907701A GB 9907701 A GB9907701 A GB 9907701A GB 2336086 B GB2336086 B GB 2336086B
Authority
GB
United Kingdom
Prior art keywords
linear surface
surface memory
tiling algorithm
spatial tiling
spatial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9907701A
Other versions
GB9907701D0 (en
GB2336086A (en
Inventor
Scott Hartog
Michael Mantor
John Austin Carey
Thomas A Piazza
Ralph Clayton Taylor
Matthew Radecki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Real 3D Inc
Original Assignee
Intel Corp
Real 3D Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp, Real 3D Inc filed Critical Intel Corp
Priority to GB0216637A priority Critical patent/GB2374781B/en
Priority to GB0216636A priority patent/GB2374780B/en
Priority to GB0216638A priority patent/GB2374782B/en
Publication of GB9907701D0 publication Critical patent/GB9907701D0/en
Publication of GB2336086A publication Critical patent/GB2336086A/en
Application granted granted Critical
Publication of GB2336086B publication Critical patent/GB2336086B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C2029/1806—Address conversion or mapping, i.e. logical to physical address

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Image Generation (AREA)
  • Image Input (AREA)
GB9907701A 1998-04-01 1999-04-01 A linear surface memory to spatial tiling algorithm/mechanism Expired - Fee Related GB2336086B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB0216637A GB2374781B (en) 1998-04-01 1999-04-01 A linear surface memory to spatial tiling algorithm/mechanism
GB0216636A GB2374780B (en) 1998-04-01 1999-04-01 A linear surface memory to spatial tiling algorithm/mechanism
GB0216638A GB2374782B (en) 1998-04-01 1999-04-01 A linear surface memory to spatial tiling algorithm/mechanism

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US8027098P 1998-04-01 1998-04-01

Publications (3)

Publication Number Publication Date
GB9907701D0 GB9907701D0 (en) 1999-05-26
GB2336086A GB2336086A (en) 1999-10-06
GB2336086B true GB2336086B (en) 2002-12-11

Family

ID=22156301

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9907701A Expired - Fee Related GB2336086B (en) 1998-04-01 1999-04-01 A linear surface memory to spatial tiling algorithm/mechanism

Country Status (4)

Country Link
JP (1) JP2000090280A (en)
CA (1) CA2267870A1 (en)
GB (1) GB2336086B (en)
TW (1) TW513676B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6417848B1 (en) * 1997-08-25 2002-07-09 Ati International Srl Pixel clustering for improved graphics throughput
AU731863B2 (en) * 1999-04-29 2001-04-05 Canon Kabushiki Kaisha Image processing operation in hierarchical memory systems
US20020039100A1 (en) 2000-06-08 2002-04-04 Stephen Morphet Memory management for systems for generating 3-dimensional computer images
JP5362915B2 (en) 2010-06-24 2013-12-11 富士通株式会社 Drawing apparatus and drawing method
US9232156B1 (en) 2014-09-22 2016-01-05 Freescale Semiconductor, Inc. Video processing device and method
CN113375568B (en) * 2021-05-12 2023-03-31 苏州阿普奇物联网科技有限公司 Metal wiredrawing polishing defect detection method based on laser scanning

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5056044A (en) * 1989-12-21 1991-10-08 Hewlett-Packard Company Graphics frame buffer with programmable tile size
US5131080A (en) * 1987-08-18 1992-07-14 Hewlett-Packard Company Graphics frame buffer with RGB pixel cache
US5251293A (en) * 1987-09-02 1993-10-05 Ascii Corporation Character display apparatus
US5517609A (en) * 1990-08-06 1996-05-14 Texas Instruments Incorporated Graphics display system using tiles of data
US5675387A (en) * 1994-08-15 1997-10-07 General Instrument Corporation Of Delaware Method and apparatus for efficient addressing of DRAM in a video decompression processor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5131080A (en) * 1987-08-18 1992-07-14 Hewlett-Packard Company Graphics frame buffer with RGB pixel cache
US5251293A (en) * 1987-09-02 1993-10-05 Ascii Corporation Character display apparatus
US5056044A (en) * 1989-12-21 1991-10-08 Hewlett-Packard Company Graphics frame buffer with programmable tile size
US5517609A (en) * 1990-08-06 1996-05-14 Texas Instruments Incorporated Graphics display system using tiles of data
US5675387A (en) * 1994-08-15 1997-10-07 General Instrument Corporation Of Delaware Method and apparatus for efficient addressing of DRAM in a video decompression processor

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
'Design and Analysis of a Cache Architechture for Texture Mapping',Hakura and Gurta, Computer *
Systems Laboratory, Stanford University, Stanford, Cal. *

Also Published As

Publication number Publication date
JP2000090280A (en) 2000-03-31
CA2267870A1 (en) 1999-10-01
GB9907701D0 (en) 1999-05-26
GB2336086A (en) 1999-10-06
TW513676B (en) 2002-12-11

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20070401