GB2248369A - Computer apparatus for high-speed shared access to data - Google Patents
Computer apparatus for high-speed shared access to data Download PDFInfo
- Publication number
- GB2248369A GB2248369A GB9020891A GB9020891A GB2248369A GB 2248369 A GB2248369 A GB 2248369A GB 9020891 A GB9020891 A GB 9020891A GB 9020891 A GB9020891 A GB 9020891A GB 2248369 A GB2248369 A GB 2248369A
- Authority
- GB
- United Kingdom
- Prior art keywords
- programs
- computer apparatus
- data
- microprocessor
- microcomputer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Stored Programmes (AREA)
Abstract
A computer apparatus (1) is disclosed, which avoids the need for a mainframe computer and provides efficient data processing for a relatively large amount of data and programs. The apparatus (1) includes a token ring network (2) with mufti access units (3) to which microcomputers (4) are connected directly, thus allowing versatility in connection of the microcomputers and reliability in operation. Each microcomputer includes RAM circuits, portion of the cells of which are accessed as a virtual disk. Further, programs stored on a file server (6) in the network are automatically retrieved and stored in the virtual disk on start-up. This significantly reduces traffic on the network, during operation, and shortens access time to the programs to provide high speed operation. <IMAGE>
Description
"A Computer Apparatus for High-Speed Access to Data"
The invention relates to a computer apparatus in which complex data processing is required by at least several people and where there is shared access to a relatively large amount of data.
Heretofore, in such situations the computer apparatus generally comprises a mainframe computer with large processing and memory capacities. The mainframe computer is connected in a star network to a plurality of terminals which allow access by users. The reason a mainframe computer is required is because smaller computers such as microcomputers generally provide slow response times because of the large number of signals being transmitted simultaneously on a network and lack of processing power for operating with complex programs.
One problem with the use of a mainframe computer is that it is relatively expensive because mainframe computers are both expensive to purchase and, generally speaking, costly to maintain and to upgrade.
The present invention is directed towards providing a computer apparatus which is relatively inexpensive, yet which allows high-speed data processing and access to a large amount of data by many users.
According to the invention, there is provided a computer apparatus for high-speed shared access to a large amount of data and for complex data processing, the apparatus comprising: - a plurality of data processing microcomputers, each
including a microprocessor, a random access memory
circuit and a fixed disk;
a serial ring network bus;
a memory device for storage of data and programs,
said memory device being connected in the serial
ring network bus;
at least two multi access units connected in the
serial ring network bus, wherein each multi access
unit is connected directly to each of a plurality
of the microcomputers.
Preferably, the fixed disk of each microcomputer stores commands for the microprocessor directing assessing of portion of the memory cells of the random access memory circuit as a virtual disk, said commands specifying capacity, sector size, and a maximum number of directories for the virtual disk.
In a preferred embodiment, the fixed disk of each microcomputer stores booting commands for the microprocessor for directing, on booting of the microcomputer, automatic retrieval of the programs from the memory device via the serial ring network bus, and storage of the programs in the cells of the random access memory circuit to be assessed by the microprocessor as a virtual disk so that, in use, access time to the programs is relatively short and network traffic is relatively small because accesses to the programs are not transmitted by the network.
The invention will be more clearly understood from the following description of some preferred embodiments thereof, given by way of example only with reference to the accompanying drawings in which:
Fig. 1 is a diagrammatic representation of a computer
apparatus of the invention;
Fig. 2 is a more detailed view of portion of the
apparatus; and
Fig. 3 is a flow diagram illustrating operation of the
apparatus.
Referring to the drawings, and initially to Figs. 1 and 2, there is illustrated a computer apparatus of the invention, indicated generally by the reference numeral 1. The computer apparatus 1 comprises three multi access units 3, a plurality of microcomputers 4 and a serial ring network bus 5. The apparatus 1 further comprises a memory device, namely a file server 6 with a back-up tape drive 7.
The multi access units 3 and the file server 6 are interconnected by the serial ring network bus 5 to form a token ring network 2. The microcomputers 4 are connected directly to the multi access units 3.
The token ring network 2 is of the type which continually transmits tokens and when a microcomputer wishes to transmit a signal on the network, the respective multi access unit 3 allows it to capture a free token, change the status to a start-of-frame sequence, and append the remainder of the frame with the signal to be transmitted. Each multi access unit 3 acts as an active repeater, receiving messages addressed to any node in the network and then re-transmitting the message for other nodes until the destination is reached. The messages are identified by an address for the node.
One advantage of this arrangement is that the improvements in logical, serial flow of data around a ring are achieved without the necessity for interconnecting each microcomputer individually in the ring. There is also more versatility as any one microcomputer may be disconnected and connected elsewhere without interruption of the ring. Further, breakdown or faulty operation of one microcomputer does not affect operation of the network. Finally, the time taken for movement of a token around the ring is reduced because it is not processed at each microcomputer - only by the multi access units and the addressed microcomputer. The multi access units are ideally located at different parts of a building such as on different floors for maximum versatility.
In this embodiment, each of the data processing microcomputers 4 includes two Mbytes of random access memory. The file server 6 includes four Mbytes of random access memory and 185
Mbytes of fixed disk memory capacity.
Referring to Fig. 2, one of the microcomputers 4 is illustrated in more detail in which it will be seen that it comprises a central processing unit 10, a visual display unit (VDU) 11 and a keyboard 12. The central processing unit 10 includes a pair of floppy disk drives 13, and a fixed disk drive 14. A random access memory circuit 15 having two Mbytes capacity is illustrated schematically.
In operation, the file server 6 stores data and programs for use by the computer apparatus 1. The programs and data stored may be for use in controlling projects such as construction projects, or mechanical or electrical installation projects.
Referring to Fig. 3 the interconnection of five software systems labelled A to E is illustrated in which it will be seen that all of the systems provide input data either directly or indirectly for an integrated cost control system.
These systems may relate to financial, accounting, personnel or materials matters. Because of the complexity of construction projects there will generally be a very large amount of data, and accordingly, operation of the cost control system is quite complex. In this example, therefore, when any one data processing microcomputer 4 is in operation, it requires a large amount of data and programs from the file server 6 to carry out the necessary calculations. This would lead to a large amount of traffic on the network 2 and excessively slow operation of the apparatus 1.
To overcome this problem, the microprocessor commands stored in the fixed disk of each microcomputer 4 include instructions specifying capacity, sector size and maximum available number of directories for an additional or virtual "disk" to be accessed by the microprocessor during processing. This virtual "disk is a portion, in this case 1360 Kbytes, of the memory cells of the random access memory circuit of the microcomputer itself, and thus, use of it does not involve network traffic. The booting instructions of each microcomputer 4 include instructions directing automatic retrieval of programs from the file server 6 on start-up and storage of the programs in the virtual disk.The programs which are stored in the virtual disk are not updated or amended during processing, so in the event of a power failure or accidental switching off of the microcomputer, the file server 6 has an exact copy of the programs and nothing is effectively lost.
In operation, data processing of a microcomputer is carried out according to the programs stored in the random access memory circuit and retrieval instructions for the file server 6 are only required for data which is to be processed by the programs (stored in the virtual disk). This results in the significant advantages that traffic on the network 2 is significantly reduced and access time to programs is considerably shorter than heretofore because they are automatically stored in the random access memory circuit.
This allows the complex calculations for programs such as the cost control system to be carried out on receipt of data from the other five systems in an acceptably short time.
Accordingly, a user may immediately have totally integrated data on progress in a construction project with comparison of time and money versus budget and detailed information regarding personnel, materials and finance, for example, without the requirement for a mainframe computer.
It will be appreciated that such information would also be readily available at a remote computer apparatus by communication via a modem connected to a microcomputer 4.
In the example referred to above of an integrated cost control system such a program would provide a detailed budget comparison report for a project in which items are compared under the following headings:a. the historical tender value; b. the current approved budget; c. committed costs to date; d. management judgement of costs to go; e. logical total projected costs; f. an explanation of extra scope of costs.
The position for each of these headings both for the current year and for the overall project would be displayed. Each item which is monitored must be given a cost code and all expenditures are allowed against the budgets. The cost control system is revised and updated regularly during a project, revisions being changes to a budget and updates being updated calculations which may or may not change a budget.
It will be appreciated that the invention provides a computer apparatus which is relatively inexpensive, reliable and versatile in use, and yet which can efficiently carry out complex data processing operations, and access a large amount of data.
The invention is not limited to the embodiments hereinbefore described, but may be varied in construction and detail.
Claims (4)
1. A computer apparatus for high-speed shared access to a
large amount of data and for complex data processing, the
apparatus comprising:
a plurality of data processing microcomputers, each
including a microprocessor, a random access memory
circuit and a fixed disk;
a serial ring network bus;
a memory device for storage of data and programs,
said memory device being connected in the serial
ring network bus;
at least two multi access units connected in the
serial ring network bus, wherein each multi access
unit is connected directly to each of a plurality
of the microcomputers.
2. A computer apparatus as claimed in claim 1, wherein the
fixed disk of each microcomputer stores commands for the
microprocessor directing assessing of portion of the
memory cells of the random access memory circuit as a
virtual disk, said commands specifying capacity, sector
size, and a maximum number of directories for the virtual
disk.
3. A computer apparatus as claimed in claim 2, wherein the
fixed disk of each microcomputer stores booting commands
for the microprocessor for directing, on booting of the
microcomputer, automatic retrieval of the programs from
the memory device via the serial ring network bus, and
storage of the programs in the cells of the random access
memory circuit to be assessed by the microprocessor as a
virtual disk so that, in use, access time to the programs
is relatively short and network traffic is relatively
small because accesses to the programs are not
transmitted by the network.
4. A computer apparatus substantially as hereinbefore
described, with reference to, and as illustrated in the
accompanying drawings.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9020891A GB2248369B (en) | 1990-09-25 | 1990-09-25 | A computer apparatus for high-speed access to data |
BE9000963A BE1002343A6 (en) | 1990-09-25 | 1990-10-12 | COMPUTER APPARATUS FOR QUICK ACCESS TO DATA. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9020891A GB2248369B (en) | 1990-09-25 | 1990-09-25 | A computer apparatus for high-speed access to data |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9020891D0 GB9020891D0 (en) | 1990-11-07 |
GB2248369A true GB2248369A (en) | 1992-04-01 |
GB2248369B GB2248369B (en) | 1994-08-10 |
Family
ID=10682743
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9020891A Expired - Fee Related GB2248369B (en) | 1990-09-25 | 1990-09-25 | A computer apparatus for high-speed access to data |
Country Status (2)
Country | Link |
---|---|
BE (1) | BE1002343A6 (en) |
GB (1) | GB2248369B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5379291A (en) * | 1992-12-29 | 1995-01-03 | International Business Machines Corporation | Apparatus for fiber distributed data interface dynamic station bypass via skipping and hopping |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08107462A (en) * | 1994-08-11 | 1996-04-23 | Shosaku Kawai | Communication network structure, communication network system based on the same, and communication method thereof |
-
1990
- 1990-09-25 GB GB9020891A patent/GB2248369B/en not_active Expired - Fee Related
- 1990-10-12 BE BE9000963A patent/BE1002343A6/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5379291A (en) * | 1992-12-29 | 1995-01-03 | International Business Machines Corporation | Apparatus for fiber distributed data interface dynamic station bypass via skipping and hopping |
Also Published As
Publication number | Publication date |
---|---|
GB2248369B (en) | 1994-08-10 |
GB9020891D0 (en) | 1990-11-07 |
BE1002343A6 (en) | 1991-01-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19941110 |