GB2143658A

GB2143658A - Computer interface

Info

Publication number: GB2143658A
Application number: GB08318460A
Authority: GB
Inventors: M T Shortland
Original assignee: Standard Telephone and Cables PLC
Current assignee: STC PLC
Priority date: 1983-07-07
Filing date: 1983-07-07
Publication date: 1985-02-13
Also published as: GB8318460D0

Abstract

To enable mass storage for a home computer to be provided, there is an interface, controlled by a microprocessor (3) between the computer and the recorder. This assembles the data into blocks (5,6) each with a parity byte attached (4), and each block is recorded three times together with line and frame sync pulses and line sequence numbers (7,8,9). On read out from the recorder, the parity bytes are checked (17) as are the sequence numbers (18) and one sound version of each line is selected. The result, minus the interface's own parity, is passed to the computer. <IMAGE>

Description

SPECIFICATION Computer interface This invention relates to a computer interface, especially for use in conjunction with a small computer of the so-called "home computer" type.

According to the present invention there is provided a data storage converter for use as an interface between a small digital computer and a video recorder, which includes a first port which acts as an input from and an output to the computer, a second port which acts as an output to and an input from the video recorder, first conversion means to which data from the computer to be supplied to the video recorder is applied, which conversion means converts the data into a format suitable for reception by the recorder, a check number generator associated with said conversion means such that the data is supplied to the recorder with a check character for each block of n bytes, a synchronisation circuit via which the data for the recorder is applied to said first port from the conversion means and the check number generator, and synchronisation and check number checking circuits associated with the second port via which data from the recorder for application to the computer is applied to further conversion means which converts it to a format suitable for reception by the computer, the data being passed from said further conversion means to the first port for application to the computer.

An embodiment of the invention will now be described with reference to the accompanying highly schematic drawing.

The interface shown is connected to a home computer via a first port which includes an input/ output bus to and from the computer. Associated with this is a DMA (direct memory access) Control 1, which enables access to be made to a desired port of the computer's internal memory. There is also a second port, formed by an output to the video recorder at the right-hand side of the diagram, and an input from the recorder, also at the right hand side. Data transfer over this output and input is at 2.048 Mb/sec., using NRZ (non-return to zero) pulse trains.

When data from the computer is to be passed to the video recorder to be recorded, this data is sent from the computer via its DMA interface 1 at 45K bytes/sec. into a serial/parallel conversion interface 2, under control of a microprocessor 3. The data is to be recorded nine bytes at a time, so for each block of nine bytes a parity check byte is generated by the CRC generator 4 the output of which passes to a shift register 5 which can hold a block of ten bytes, nine of data and one the CRC parity byte.

The contents of the shift register 5 are applied parallel-fashion to a circulating shift register 6 such that they can be repeated three times. At the recorder, each iteration of ten bytes is stored on one video line at the 2.048 Mbit/sec. rate referred to above, complete with line sync. pulses. A divide by 3 circuit 7 supplies load control signals to the register 6 and line sequence numbers to a sync. and sequence multiplexer 8. The latter also has inputs from the register 6 and a sync. pulse generator 9 which supplies line and frame sync. pulses. Hence the data is passed to the recorder in a suitably formatted form, and each line thus recorded has a modulo 3 sequence number.

Two types of addressing are used, the coarse addressing which locates the desired sector of the computer's 256K bytes memory by a frame length address entered via a keypad indicated at 10. Thus the address for use by the recorder is generated by an address generator 11, controlled from the keypad 10 and the microprocessor 12. On playback, this sector may be found manually by the programme search facility of the video recorder in response to the application thereat of the wanted sector address.

Fine addressing locates the desired file by a video line length title, also entered from the keypad 10. On replay the sector is replayed from the beginning, but no data is transferred to the computer memory until a file address from the recorder matches the required address entered on the keypad. This matching is effected by the address check circuit 12.

When replay is called for, the switch 13 is changed from SEND to RECEIVE, as a result of which clock pulses are supplied from the receive path to a clock circuit 14 via the switch 13 and a locking circuit 15. In the receive path we find a sync. finder 16, which generates the input to the locking circuit 15. This causes the receive timing to be locked to the pulses from the recorder. A check circuit 17 checks the parity byte for each line. If it is OK, the sequence number is checked by the block 18 to ensure that the recorder does not substitute an adjacent line for a corrupted one. One error-free line from a group of three is all that is needed, the rest being discarded.

The checked data is applied via a ten byte shift register 19 to the serial parallel converter 2 from which it is loaded into the computer.

Thus a simple computer installation can be provided.

Claims

1. A data storage converter for use as an interface between a small digital computer and a video recorder, which includes a first port which acts as an input from and an output to the computer, a second port which acts as an output to and an input from the video recorder, first conversion means to which data from the computer to be supplied to the video recorder is applied, which conversion means converts the data into a format suitable for reception by the recorder, a check number generator associated with said conversion means such that the data is supplied to the recorder with a check character for each block of n bytes, a synchronisation circuit via which the data for the recorder is applied to said first port from the conversion means and the check number generator, and synchronisation and check number checking circuits associated with the second port via which data from the recorder for application to the computer is applied to further conversion means which converts it to a format suitable for reception by the computer, the data being passed from said further conversion means to the first port for application to the computer.

2. A converter as claimed in claim 1, in which as the data passes from the computer to the recorder it is assembled into blocks of n bytes with a parity byte computed and attached to each block, in which each such block of (n + 1) bytes is recorded m times on the recorder with the blocks having modulo m sequence numbers, and m which as each block is read from the recorder to the computer its parity bytes and its sequence numbers are monitored to enable for each block the selection of one sound version.

3. A converter as claimed in claim 1 or 2, and which includes a microprocessor.

4. A data storage converter substantially as described with reference to the accompanying drawing.