GB2131640A

GB2131640A - Switching circuit

Info

Publication number: GB2131640A
Application number: GB08234259A
Authority: GB
Inventors: Peter Henry Saul; David James Mccabe; Geoffrey William Sumerling; John Flackett Dickson
Original assignee: Plessey Co Ltd
Current assignee: Plessey Co Ltd
Priority date: 1982-12-01
Filing date: 1982-12-01
Publication date: 1984-06-20
Also published as: GB2131640B

Abstract

A switching circuit suitable for realisation in bipolar integrated circuit technology and for high speed processes comprises a first transistor (Q1) of one polarity type having its base electrode coupled with an input (11) to be switched. The collector electrode of the first transistor is coupled with one side (10) of a source of supply potential and its emitter electrode is coupled with the circuit output (12). A second transistor (Q2) of the same polarity type has its collector electrode coupled with the base electrode of the first transistor (Q1), its base electrode coupled with a control input (13) and its emitter electrode coupled with the emitter electrode of a third transistor (Q3) again of the same polarity type. The third transistor (Q3) has its base electrode coupled with a second control input (15) and its collector electrode coupled with the emitter electrode of the first transistor (Q1) and also with the circuit output (12). The junction of the emitter electrodes of the second (Q2) and third (Q3) transistors are coupled with the other side (14) of the source of supplied potential via a current sink (R2). <IMAGE>

Description

SPECIFICATION Switching circuit This invention relates to a switching circuit which is suitable for realisation in any bipolar integrated circuit technology, but which is particular suitable to very high speed processes.

The circuit ofthe present invention has special application where an analogue signal must be sampled accurately underthe command of a clock signal.

Such circuits, of which the present invention forms a part, are commonly called track - and - hold or sample and - hold circuits. An alternative application, using a plurality of switching circuits constructed in accordance with the invention, is for an analogue multiplexer where under logic control, one of'n' possible analogue inputs can be routed to a common analogue output.

Switching circuits employing a single bipolartran sistorforswitching analogue signals are known but such circuits have the disadvantage thatthey are non linear with temperature and also require an off-set voltage to enable them to function. Another known analogue switching device is a diode bridge circuit.

This circuit has a fast switching capability but is difficultto drive in that a transformer drive is required.

in addition such bridge circuits are difficult to make in monolithicform and often employSchottkydiodes.

Switching circuits using MOS technology are also known and these have the advantage of good low resistance characteristics but are limited by their speed of operation which in the present state ofthe art is limited to 100 Khz.

The present invention seeks to provide a switching circuit which is suitable for implementation in bipolar integrated circuit technology and which is capable of very high speed operation.

According to the invention there is provided a switching circuit comprising afirsttransistorofone polarity type having its base electrode coupled with an input to be switched, its collector electrode coupled with one side of a source of supply potential and its emitter coupled with the circuit output, a second transistor of said one polarity type having its collector electrode coupled with the base electrode ofthe first transistor, its base electrode coupled with a control input and its emitter electrode coupled with the emitter electrode of a third transistor of said one polaritytype, the third transistor having its base electrode coupled with a second control input and its collector electrode coupled with the emitter electrode ofthe first transistor and with the circuit output, the junction of the emitters of the second and third transistors being coupled with the other side of said source of supplied potential via a current sink.

Drive to the switching circuit can be effected in several different ways, for example one ofthe control inputs may be provided with a bias voltage such that switching is effected by applying a switching voltage to the other control input. Another way of driving the switching circuit is to provide anitphase switching voltages which are coupled with different ones of the control inputs.

Biasing forthe switching circuit may be effected in several differentways. One way of providing the bias isto couple the base electrode ofthe first transistor with said one side of the source of supply potential via a resistor. Anothermethod ofapplyingabiastoforthe base electrode ofthe firsttransistorto be coupled with said one side of the source of supply potential via a current source formed by for example a transistor of opposite polarity type.

The firsttransistor may be coupled with the circuit input indirectly. The coupling may include a diode, a resistor, or a transistor.

A bias current source may be coupled between the inputto be switched and said other side ofthe source of supply potential. The bias current source may comprise a transistor of said one conductivity type having it base electrode coupled with the second control input, its emitter electrode coulpled with the emitter electrode of the third transistorand its collector electrode coupled with the inputto be switched.

The current sink may be an inpedance element e.g. a resistor or may be a current source e.g. a transistor or field effect transistor biased to provide a predetermined current.

The circuit output may be shunted by a capacitor.

In orderthatthe invention and its various other preferred features may be understood more easily, an embodimentthereofwill now be described, byway of example only, with reference to the drawings in which: Figure lisa schematic circuit diagram of a switching circuit constructed in accordance with the invention; Figure 2 is a schematic circuit diagram of a switching circuit constructed in accordance with the invention which includes a current bias; and Figure 3 is a schematic circuit diagram of a switching circuit constructed in accordance with the invention employing a current bias formed by an additional transistor.

Referring nowto Figure 1 a main switching element in this circuit is formed by an NPN transistor Q1 which has its collector electrode coupled to a positive supply line 10 its base electrode coupled to a circuit input 11 via a diode D1 and also coupled to the positive supply line 10 via a resistor R1, and its emitter electrode coupled to a circuit output 12 which is shunted by a capacitor C1. The base electrode of the transistor Q1 is coupled to the collector electrode of a second NPN transistor 02 the base electrode ofwhich is coupled to a first control input 13.The emitter electrode ofthe transistor Q2 is coupled to the emitter electrode of a third NPN transistor Q3 and the junction of the two emitters is coupled with a negative supply line 14 of the source of supply voltage via a resistor R2 which forms a current sink. The base electrode of the transistor a3 is connected to a second control input 15 whilstthe collector electrode is coupled with the emitter electrode ofthe transistor Q,.

The transistors 02 and Q3 act as steering elements and serve to direct a current Ii eitherthrough the transistor Q, via transistor Q3 orto bypass the transistor Q, via the transistor Q2. The circuit operation depends primarily on the transistors Qi Q2 Q3 and is as follows.

In the switch "on" state the voltage at control input 15 is arranged to be higher than at control input 13 by a sufficient margin that almost all ofthe current 11 flows through transistors Q1 and Q3 in the quiescent state.

Any input voltage at the circuit input 11 will be reproduced on the base of transistor Q, and will be followed by the emitter oftransistor Q and therefore will appear atthe output 12. The output capacitor C, is charged by transistor Qi or discharged by transistor Q3 so thatthe output voltage, after a suitable time, will be equal in voltage to the input 11.

When the control signals to inputs 13 and 15 are reversed, so that 13 is at a higher potential than 15, then all the current Ii is directed through transistor Q2.

Then, provided that 11 and R1 are suitably chosen, the transistor Q, isturned off i.e. conducts no current at all for all permissible conditions ofthe voltage at input 11 and output 12. As transistor Q3 is also non conducting, the output 12 is effectively isolated from all variations in other parts of the circuit, and hence the voltage of capacitor C1 is held constant at the value it had atthe instant of switching inputs 13 and 15. This is the "hold" mode of the switch.

The control may be effected by dual drive e.g. from a transformer or differential amplifier having antiphase outputs coupled each to individual control input 13 or 15 or alternatively a fixed bias may be applied to one of the control inputs and a variable switching input may be appliedto the other control input.

The embodiments ofthe invention illustrated in Figures 2 and 3 incorporate minor modifications to the circuit of Figure 1 and components which provide similar circuit functions to those illustrated in Figure 1 are given the same reference characters.

The circuit of Figure 2 is identical with that of Figure 1 exceptthata currentsource 12 is coupled between the negative voltage supply line 14 and the input 11.

This current source serves to bias the diode D,.

The arrangement shown in Figure 3 differs from that shown in Figure 1 in that a current source for biasing the diode D1 is provided by means of an NPN transistor 04. The transistor 04 has its base electrode coupled with the control input 15 its emitter electrode connected to the emitters of transistors Q2 and 03, and its collector electrode connected to the input 11. This arrangement provides a significant advantage in that when the switching circuit is "on" an identical current flows through transistors Q3 and O4so that the biasing voltage on the input and the voltage on the output track one anotherwith temperature variation. This serves to maintain a constant output with variation of temperature.

Various modifications to the described circuits may be made without departing from the scope of the invention. For example 1) The diode D1 may be dispensed with or replaced by a resistor.

2) The resistor R1 could be replaced by a current source e.g. a PNP transisitor current source biased to provide a predetermined current.

3) The output capacitor C1 may be dispensed with for example in applications to multiplexing.

4) Instead of the resistor R2 an alternative current sink may be employed e.g. a current generator. Such a current generator may be formed by a transistor or field effect transistor biased to provide a predetermined current.

5) Although NPN devices are preferred becausethey are the type that are normally available in the very fastest integrated circuit processes, the circuit could of course be fabricated using PNP transistors.

Some ofthe advantages ofthe circuit are: 1 ) It is very simple and without feedback it can be designed for very wide bandwidth.

2) Only a single type of bipolartransistor need be employed.

3) A sampling switch can be constructed to operate atvery high speeds particular if NPN devices, available in theveryfast integrated circuit processes, are employed.

4) The switch is entirely compatible with normal integrated circuit processing or can even be realised using discrete components.

5) Sample pulse feedth rough and input to output feedthrough are particular low compared with alternativetechniques, as there are two devices in signal path (D1 and 01) and two devices in the control path (03 and 01) which are turned off by the switching action.

6) The signal path impedence when the switch is "on" is always low: the input impedance is approximately equal to R1 (typically less than 1 Ohm) and the output impedance in the linear region is typically lessthan 10 Ohms.

7) In the "off" state, the impedance presented to the capacitor is limited only by the leakage of devices Q1 and 03, and would normally be less than 1 nanoamp.

8) The "on" to "off" impedance ratio is of the order of 107 at iowfrequencies.

CLAIMS (Filed on 30/11/83) 1. A switching circuit comprising a first transistor of one polaritytype having its base electrode coupled with an inputto be switched, its collector electrode coupled with one side of a source of supply potential and its emitter electrode coupled with the circuit output, a second transistor of said one polarity type having its collector electrode coupled with the base electrode of the firsttransistor, its base electrode coupled with a control input and its emitter electrode coupled with the emitter electrode of a third transistor of said one polaritytype, the third transistor having its base electrode coupled with a second control input and its collector electrode coupled with the emitter electrode ofthefirsttransistorandwith the circuit output,thejunction of the emitters of the second and third transistors being coupled with the other side of said source of supply potential via a current sink.

2. A switching circuit as claimed in claim 1, wherein one of the control inputs is provided with a bias voltage such that switching is effected by applying a switching voltage to the other control input.

3. A switching circuit as claimed in claim 1, wherein the control inputs are coupled with means for providing antiphase switching voltages.

4. A switching circuit as claimed in any one of the preceding claims, wherein the base electrode of the first transistor is coupled with said one side ofthe source of supply potential via a resistor.

5. Aswitching circuit as claimed in anyone of claims 1 to 3, wherein the base electrode ofthefirst

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. In the switch "on" state the voltage at control input 15 is arranged to be higher than at control input 13 by a sufficient margin that almost all ofthe current 11 flows through transistors Q1 and Q3 in the quiescent state. Any input voltage at the circuit input 11 will be reproduced on the base of transistor Q, and will be followed by the emitter oftransistor Q and therefore will appear atthe output 12. The output capacitor C, is charged by transistor Qi or discharged by transistor Q3 so thatthe output voltage, after a suitable time, will be equal in voltage to the input 11. When the control signals to inputs 13 and 15 are reversed, so that 13 is at a higher potential than 15, then all the current Ii is directed through transistor Q2. Then, provided that 11 and R1 are suitably chosen, the transistor Q, isturned off i.e. conducts no current at all for all permissible conditions ofthe voltage at input 11 and output 12. As transistor Q3 is also non conducting, the output 12 is effectively isolated from all variations in other parts of the circuit, and hence the voltage of capacitor C1 is held constant at the value it had atthe instant of switching inputs 13 and 15. This is the "hold" mode of the switch. The control may be effected by dual drive e.g. from a transformer or differential amplifier having antiphase outputs coupled each to individual control input 13 or 15 or alternatively a fixed bias may be applied to one of the control inputs and a variable switching input may be appliedto the other control input. The embodiments ofthe invention illustrated in Figures 2 and 3 incorporate minor modifications to the circuit of Figure 1 and components which provide similar circuit functions to those illustrated in Figure 1 are given the same reference characters. The circuit of Figure 2 is identical with that of Figure

1 exceptthata currentsource 12 is coupled between the negative voltage supply line 14 and the input 11.

This current source serves to bias the diode D,.

2) Only a single type of bipolartransistor need be employed.

8) The "on" to "off" impedance ratio is of the order of 107 at iowfrequencies.

transistor is coupled with said one side ofthe source of supply potential via a current source formed by a transistor of opposite polarity type.

6. A switching circuit as claimed in any one of the preceding claims, wherein the firsttransistoris coupled with the input to be switched via a diode.

7. Aswitching circuit as claimed in any one of the preceding claims, wherein a biascurrentsourceis coupled between the input to be switched and said other side ofthe source of supply potential.

8. A switching circuit as claimed in claim 7, wherein the bias current source comprises a transistor of said one conductivity type having its base electrode coupled with the second control input, its emitter electrode coupled with the emitter electrode ofthe third transistor and its collector electrode coupled with the input to be switched.

9. A switching circuit as claimed in any one ofthe preceding claims, wherein the current sink is an impedance element.

10. Aswitching circuit as claimed in any one of claims, 1 to 8, wherein the current sink is a current source.

11. A switching circuit as claimed in any one ofthe preceding claims wherein the circuit output is shunted by a capacitor.

12. A switching circuit substantially as described herein with reference to any one of Figures 1,2 or 3 of the drawings.