GB2131590A - Controlled visual display device - Google Patents

Abstract

A visual display device having an array of light sources and array of switches, the switches being controlled by latches in accordance with address signals applied to columns of the light sources and data signals applied in parallel to rows of the light sources. These signals are generated by a controller 53 having memories 38, 40 operating in conjunction with a micro-processors 34. The controller is addressable by an external microprocessor for programming sequential displays of different light patterns on array of light sources. The latches may additionally provide the switching function. A number of columns or arrays of light sources are controlled by a common controller 53. The light sources may include a triad of coloured lights. <IMAGE>

Description

SPECIFICATION Controlled visual display device This invention relates to a visual display device.

According to the present invention there is provided a visual display device having an array of light sources and an array of switches, said switches being coupled whereby, in use and on application of a power source to the device, each said light source is switchable to at least two conditions, at which the illumination provided by that light source differs, by corresponding switching of the condition of a respective said switch between first and second states; and cyclically operating control means for setting the condition of each said switch whereby in use the pattern of illumination provided by the light sources is cyclically variable. Preferably the array of light sources comprises a plurality of groups of said light sources each said group comprising two or more said light sources which, when illuminated, are of differing color.Each said group may comprise sources, which when illuminated, comprise an additive color mixing group capable of synthesizing the appearance of white light when viewed from a sufficient distance, or, alternatively two or more sources exhibiting colors of an additive mixing group capable of synthesizing the appearance of at least a limited range of different colors when different ones or combinations of ones of the group are illuminated. In one form of the invention, there are three sources in each said group.

In a preferred form, sqid control means includes a first memory having stored therein information as to patterns of switching of said switches and light sources, and a second memory for storing therein a program of intended sequential displays of selected ones of said patterns.

Further, it is preferred that the said control means includes programming means, such as a microprocessor, for establishing said program in said second memory. This programming means may be located at a location remote from the remainder of the device.

The invention is further described by way of example only with reference to the accompanying drawings in which: Figure 1 is a diagrammatic front view of a display device constructed in accordance with the invention; Figure 2 is a diagrammatic front view of one module incorporated into the device of Fig. 1; Figure 3 is a fragmentary view showing portion of a panel forming part of the module shown in Fig. 2; Figure 4 is a fragmentary view showing the arrangement of light sources within the device of Fig. 1; Figure 5 is a circuit diagram showing the arrangement of control circuitry for the light sources in the device of Fig. 1; Figure 6 is a diagram of a latch incorporated into the control circuitry of Fig. 5; and Figure 7 is a block diagram of a microprocessor control unit for the device of Fig. 1.

Referring firstly to Figs. 1 to 3 collectively, there is shown therein a display device 8 having eight modules 10, arranged in a rectangle one module high, each module being in turn made up of four panels 1 2 and each panel 1 2 having seven columns 14 of light sources 1 6. Light sources 1 6 in each column 14 are arranged in seven groups 20, each of three sources 16. The sources 16 within each group have three different colors when operated, such as red, blue and green, or red, green and orange. The light sources 1 6 within each group 20 are arranged in a triangular closely spaced configuration as shown in Fig.

4. The groups 20 of sources 1 6 are arranged in each panel 1 2 in a rectangular matrix of eight columns and seven rows.

Referring now to Fig 5, a part of a source driver circuit 80 shown therein is arranged whereby an electric power source (not shown) can be coupled to lamps 48 (a respective one of which is incorporated into each source 16) via a lamp driver circuit 22. Circuit 22 comprises a matrix of switches operable to condition respective ones of the lamps 48 to on or off conditions. In the off condition, there is substantially no light output from the lamp but in the on condition the lamp is brightly illuminated. There is one switch in driver circuit 22 for each of the lamps in the device 10.

The switches incorporated into circuit 22 are selectively conditionable to on or off states in accordance with the states of corresponding latches 24a incorporated into a latching circuit 24. These latches are in turn conditionable in accordance with data received thereby. There is one latch 24a for each lamp 48.

In this instance, each driver circuit 22 includes seven lamp drivers and each latching circuit 24 includes seven latches 24a. Thus, for each column 14 of twenty-one lamps, three circuits 22 and three circuits 24 are needed. For clarity however only one of each circuit is shown in Fig. 5.

The latches 24a are of the form shown in Fig. 6, each having a "data" input, a "clock" input and an "output enable" input and outputs Q and Q, one of which outputs is connected to the corresponding switch in lamp driver circuit 22.

Latches 24a for all lamps in a respective row extending across the whole of a panel 1 2 are connected in a manner described later in parallel at the "data" inputs thereof. All of the twenty-one latches corresponding to lamps in a column 14 have their "clock" inputs connected in parallel. Thus, particular latchs 24a in the matrix of such latches within latching circuit 24 are identifiable by unique combinations of "clock" and "data" connections.

The "enable" inputs of all of the latches 24a in circuit 24 are also connected together.

Simultaneous occurrence of appropriately polarized signals on the "enable", "clock" and "data" inputs to any latch 24a causes that latch to have its output state conditioned either to maintain a pre-existing output state, to change the output state from on to off or to change the output state from off to on.

Under control of a controller 53 described later the signal states appearing on the various inputs to the latches 24a are cycled at a rapid rate so that appropriately selected signals for the twenty one lamps in each of the columns in the device 8 are sequentially presented to the latches. Thus, "data" and "address" signals appearing on the data and clock inputs operate to latch or unlatch particular latches 24a when the clock and data inputs are appropriately conditioned and when an enable signal is applied to the latches on the aforementioned "enable" inputs. The enable signal may be a repetitively generated clock signal, the repetition rate of which establishes the cycling time of the device 8.

By generating appropriately timed signals, the latches 24a of the matrix of latches represented by circuit 24 may have the outputs thereof conditioned to on or off states in accordance with information contained in data and address signals applied thereto. Thus, the lamps 48 in the array of lamps represented by the columns 14 of groups 20 can be illuminated selectively in desired patterns with a new pattern establishable, if desired, at each such cycling of the latch inputs.

Fig. 5 also shows source driver circuit 80 as including a receiver 26 for twenty-one data input lines identifying rows in the columns 14 and an address receiver 28 which receives address information relating to the columns to be addressed. There is one receiver 26 and one receiver 28 for each module 12, these simply directing information signals from a controller 53 (described later) to components of driver circuit 80 associated with that module 1 2. Information signals from the receiver 28 are decoded by decoders 30 for application to the latches 24a in respective columns.

There is one decoder for each column 14, but only one decoder 30 is shown in Fig. 5 for clarity. Thus the output 30a, from each decoder 30 is coupled to respective latches associated with the lamps 48 of a respective column 1 4. The coupling is made to the "data" inputs of those latches. Information signal from the receivers 26 is directed on twentyone parallel output lines 26a therefrom to the latch circuits 24 of each module 12, so that each row of latches 24a is coupled, at the clock inputs thereof, to a respective one of the twenty-one "data" input lines from controller 53.

The controller 53 is shown in Fig. 7. It controls information signals addressed to the receivers 26 and 28 thus to control the pat tern of switching of the lamps 48 via the lamp driver circuits 22, latch circuits 24 and decoders 30. Controllers 53 includes a micro processor real time calendar clock 42 and an eight bit microprocessor 34 which generate the required information signals as to setting of the latches 24a which is required at parti cular times. Thus, the signals applied to the receivers 26, 28 are generated by these microprocessors. This information is decoded in a decoder 39 and then outputed on balanced driver circuits 36 supplying the necessary twenty-one data bits for identifying rows of lamps 48 and address bits for identifying columns of lamps 48.There may be eight address bits, to provide for identification of 256 columns of sources 1 6 in the present example. The aforementioned "enable" signal is also generated by controller 53, as a clock signal derived from a crystal oscillator 32.

The aforementioned cycling of the inputs of the latches 24a is effected by cycling of the output from controller 53. Thus the twenty one data output lines may be on successive operational cycles to provide information as to the intended state of illumination of lamps in successive columns 14 whilst the address outputs are cycled whereby to permit direction of each successive set of data presented on the data output lines to the latches 24a corre sponding to the successive columns. The de coders 30 are each responsive to particular unique addressings thereof to identify when the latches associated therewith are to be addressed.In accordance with the relative signal conditions prevailing at the "enable", "clock" and "data" inputs to each latch as it is so addressed, the condition of the latch is either reset to alter its output condition or not reset to maintain a previously prevailing con dition.

The microprocessor 34 operates in conjunc tion with first and second memories. The first memory is in the form of an EPROM 38 and this may have stored therein data, such as information as to necessary signal conditions required for generating particular patterns of illumination of the lamps 48, particularly al phabet letters, numerals or the like as well as, if if desired, information necessary to generate desired sequences of alteration of the display pattern of the lamps 48.The second memory is a random access memory 40 which may also be used to store predetermined patterns of illumination of the lamps 48 but which can also be programmed via a serial communi cation port 35 so as to operate in conjunction with the microprocessors 34 and crystal clock microprocessor 32 to effect a particular sequence of displays as otherwise stored either in the EPROM 38 or in memory 40. This sequence of operation as stored in the memory 40 may be free running, but more particularly may be controlled from the microprocessor 34 in conjunction with the clock 42 to effect changes of pattern at predetermined times as programmed into the memory 40, these times of change being assessed with reference to signals from the clock 42.The clock 42 also provides reference data enabling the microprocessor 34 to generate other signals permitting display by the device 8 of information such as the time of day.

Great flexibility of operation can be obtained by using a computing facility such as a microprocessor (not shown), possibly at a remote site, to access the controller 53, permitting the memory 40 to be programmed as desired, even while the device 8 is operating to display a pre-programmed sequence of displays. Thus, where the display device is used for advertising purposes, a number of different advertising messages may be programmed into the memory 40, together with information such as intended times of display and duration thereof and the controller will then operate with reference to the EPROM 38 and memory 40 to provide the necessary signals to display these messages.

The lamps 48 may be commercially available 24 volt filament lamps suitably filtered to control the color of the light emitted therefrom. The colors of the filters of the lamps in each group of sources 20 may be such as to cause the sources 1 6 in each group to comprise an additive color mixing set so that by selective illumination of ones of the sources within a group, the color of the group as viewed from a distance may be varied. Our copending application 8330829 filed the same day as the present application and entitled "Visual Display Device" describes one way of selecting the colqrs of the filters.

It is preferred that the lamps 48 are underrun by being supplied with a supply voltage of less than the rated voltage, say 22volts in the case of a 24volt lamp, so as to maximmise lamp life. Further, as shown in Fig. 5, it is preferred that the lamps 48 each have resistors R connected thereacross. By this expedient, it is possible to lower the turn-on surge current. It is also possible to arrange the drivers such that there is always a quiescent current through the lamps 48 in such a fashion as to limit the effects of thermal shock when turn-on occurs. This quiescent current may be made sufficiently low that the lamps are not normally perceived to be illuminated under normal lighting conditions when switched to off conditions.

By varying the data as provided from the controller 53, it is possible to effect illumiation of the sources 1 6 in any desired fashion and to produce colored images if desired.

Because of the graphic facility for updating the switching pattern presented by the latches and drive circuits for the sources 1 6 it is possible to vary the pattern of illumination in a very simple fashion so that by suitable programming it is possible to display written messages which move or which are contorted in accordance with predetermined patterns over a period of time.

In particular, by providing the external microprocessor with suitable programs it is possible to use that microprocessor to set up in memory 40 suitable control characters which will control display matters such as the following: (a) Setting of dispay colors - both foreground and background.

(b) Setting the speed at which a message will travel across the unit 1 2.

(c) Setting background flash rate and color or combination of colors.

(d) Setting foreground flash rate and color or combination of colors.

(e) Setting up optional character fonts, not stored already in EPROM 38.

(f) Setting up format over half or complete display area.

(g) Setting up double width characters.

(h) Setting up single width characters.

(i) Black and white graphics display.

(j) Color graphics mode.

(k) Automatic centering "on (I) Automatic centering "off".

(m) Display message shifting centre out.

(n) Display message shifting centre in.

(o) Display message scrolling up/down.

(p) Wipe message up/down.

(q) Wipe message left/right.

(h) Slide message up/down, right/left.

The described arrangement has been advanced merely by way of example. In particular, while an arrangement employing eight modules 10 of four panels 1 2 is described, it will be appreciated that the invention may be adapted to arrangements having other configurations. Again, whilst in the described arrangement the sources 1 6 are arranged in columns and rows they could be arranged in any other desired matrix. Futhermore, whilst, as described, the latches 24a in the circuit 24 are arranged in columns and rows corresponding to the columns and rows of the panels 12, this is not essential. In particular, it will be appreciated that the described arrangement results in there being a set of latches 24a associated with each column of sources 16, but where sets of latches could be associated with other groupings of the sources 16.

Also, in the described device 8, the latches 24a control separate switches in the circuit 22 which in turn control the lamps 48, but it would be possible to incorporate the switches so that their function was performed by the latches themselves.

The described arrangement has been advanced merely by way of explanation and many modifications may be made thereto without departing from the spirit and scope of the invention as defined in the appended

Claims (10)

claims. CLAIMS

1. A visual display device having an array of light sources and an array of switches, said switches being coupled whereby, in use and on application of a power source to the device, each said light source is switchable to at least two conditions, at which the illumination provided by that light source differs, by corresponding switching of the condition of a respective said switch between first and second states; and cyclically operating control means for setting the condition of each said switch whereby in use the pattern of illumination provided by the light sources is cyclically variable.

2. A visual display device as claimed in claim 1 wherein said control means includes a first memory having stored therein information as to patterns of switching of said switches and light sources, and a second memory for storing therein a program of intended sequential displays of selected ones of said patterns.

3. A visual display device as claimed in claim 1 wherein said control means includes memory means for storing therein information as to patterns of switching of said switches and light sources, and forzstoring therein a program of intended sequential displays of selected ones of said patterns.

4. A visual display device as claimed in claim 2 or claim 3 including programming means for establishing a said program in said memory means or in second memory.

5. A visual display device as claimed in any one of claims 1 to 4 wherein said switches are in the form of or are controlled by respective latches each capable of storing and holding a set condition in accordance with signals received from said control means.

6. A visual display device as claimed in claim 5 wherein said latches are arranged in sets, each set being selectively addressable in accordance with information supplied from the control means.

7. A visual display device as claimed in claim 6 wherein said latches are organised in sets thereof, and said signals from said control means include address signals cyclically and sequentially identifying said sets individually, the data signals cyclically and sequentially separately identifying all the latches in a said set when that set is identified by the said address signal, for establishing or maintaining a said set condition of the latches of that said set, in accordance with the then applying address signals.

8. A visual display device as claimed in claim 7 wherein respective latches of one said set are coupled to respective corresponding latches in each other of said sets for application of said data signals thereto and the latches of each set are themselves interconnected for application of the address signal identifying all of the latches of that set.

9. A visual display device as claimed in any preceding claim wherein said control circuit operates to reset the condition of each said switch only if that condition is to be changed.

10. A visual display device substantially as herein described with reference to the accompanying drawings.