GB2103908A

GB2103908A - Linear predictive coder

Info

Publication number: GB2103908A
Application number: GB8222093A
Authority: GB
Inventors: Michael John Shearme
Original assignee: General Electric Co PLC
Current assignee: General Electric Co PLC
Priority date: 1981-07-31
Filing date: 1982-07-30
Publication date: 1983-02-23
Also published as: GB2103908B

Abstract

A real-time linear predictive coder for deriving voice-model coded signals representing analogue speech input signals during a succession of time intervals comprising a hardware multiplier 10, an autocorrelator 9, a random access memory 6 and a 16- bit minimum microprocessor 8 all interconnected by way of a corresponding data highway 4. <IMAGE>

Description

SPECIFICATION Linear predictive coders The present invention relates to linear predictive coders.

Linear predictive coding of speech signals, to provide pulse-coded parameters in respect of a succession of, say 20 msec frame intervals, from which a reasonable-quality reproduction of the original speech may be synthesized, has been developed to the point where. each second of speech signal can be represented by 4 Kbits of coded parameters or less. This form of coding enables the economical transmission or storage of coded speech signals, for use for example in pre-recorded message systems, but in view of the large number of arithmetic operations involved in deriving the parameters in respect of each frame interval the coding process real-time linear predictive coding has not previously been practicable.

According to one aspect of the present invention a reai-time linear predictive coder for deriving voice-model coded signal representing analogue speech input signals comprises a multiplier, an auto-correlator, a random access memory and a microprocessor all inter-connected by way of a multipath data highway.

According to another aspect of the present invention a real-time linear predictive coder for deriving voice-model coded signals representing analogue speech intput signals during a succession of time intervals comprises a hardware multiplier, an autocorrelator, a random access memory and a 16-bit minimum microprocessor all interconnected by way of a corresponding data highway.

Preferably the autocorrelator is arranged to operate substantially independently of said microprocessor.

The analogue input signals may be applied to said coder by way of an analogue to digital convertor whose output is connected to said highway.

A linear predictive coder in accordance with the present invention will now be described by way of example with reference to the accompanying drawings, of which: Figure 1 shows the coder schematically, Figures 2 and 3 show respective sequences of operation of the coder of Figure 1, and Figure 4 shows in tabular form the number of arithmetic operations involved in the sequences of Figures 2 and 3.

Referring first to Figures 1 the coder is arranged to derive in respect of an analogue speech signal at an input 1 a voice-model coded output signal which, for each of a succession of 20 msec frame periods, comprises a series of parameters in binary digitally coded form indicating whether the input speech signal during that frame period was voiced or unvoiced or a mixture of the two, its pitch, and a set of coeficients for an electric filter which, in a speech synthesizer, will mimic electrically the acoustic characteristics of the vocal tract which generated the input speech signal.

The input analogue speech signal is first lowpass or band-pass filtered and applied by way of a sample and hold circuit 2 to an analogue to digital converor 3. During each frame period of 20 msec some 160 digitally coded amplitude samples are passed to a data bus 4 by way of a three state buffer 5 and from the data bus 4 to a random access memory 6.

A program for the coding sequence is held in a programmable read only memory 7, and the sequences shown in Figures 2 and 3 are carried out under the control of a 1 6-bit microprocessor 8 having a clock frequency of 8 MHz, which may for example be a Motorola M68000. Some of the arithmetical processes enumerated in the table of Figure 4 are carried out in a hardware autocorrelator 9 and a sixteen bit hardware multiplier 10 to enable the required number of operations to be carried out within the frame period of 20 mse9.

The chosen microprocessor 8 has twenty three address lines of which sixteen are used for addressing the memories 6 and 7 and other devices, and the multiplier 10 is addressed by means of four spare address lines, permitting up to sixteen multiplier functions to be addressed.

The use of these four address lines enables data from memory to be loaded directly into the multiplier 10 without passing through the microprocessor 8, allowing the multiplier 10 and the microprocessor 8 to operate simultaneously.

Since the access time for the read-only memory 7 is longer than that for the random access memory 6, the progam held in the memory 7 may be transfered to the memory 6 at the start of coding to increase the overall speed of operation.

As can be seen from the table of Figure 4 the pitch extraction autocorrelation involves the greatest number of operations although only to three-level accuracy. since it would not be practicable to make a sixteen-bit microprocessor perform this function the hardware autocorrelator 9 is provided. This autocorrelator 9 is arranged to operate largely independently of the microprocessor 8 and the multiplier 10 so that its operation does not affect the rest of the analysis process.

At the start of the pitch extraction process in any one frame period the autocorrelator 9 receives from the microprocessor 8 clipping level values based on the speech signal values held in store. It then receives filtered speech signal values, which are clipped in accordance with the clipping level values and entered in two parallel two-bit randome access memories (not shown).

The two identical clipped signals are then correlated with successively increasing time displacements to determine the period of the fundamental of the speech signal during the respective frame period. The autocorrelator 9 therefore requires access to the microprocessor 8 only at the beginning and end of its cycle of operation.

The sixteen-bit resolution required for the autocorrelation and matrix solution processes involved in deriving the filter coefficients is provided by the multiplier 10.

The coded output of the arrangement may be read out by way of a parallei output port 11 or a serial input/output port 12.

Claims

1. A real-time linear predictive coder for deriving voice-model coded signals representing analogue speech intput signals comprising a multiplier, an autocorrelator, a random access memory and a microprocessor all interconnected by way of a multipath data highway.

2. A real-time linear predictive coder for deriving voice-model coded signals representing analogue speech input signals during a succession of time intervals comprising a hardware multiplier, an autocorrelator, a random access memory and 1 6-bit microprocessor all interconnected by a 1 6-bit data highway.

3. A real-time linear predictive coder in accordance with Claim 2 wherein during the least part of each of said time intervals said multiplier and said autocorrelator are arranged to carry out arithmetical processes at least partially independently of said microprocessor.

4. A real-time linear predictive coder in accordance with Claim 3 wherein said autocorrelator is arranged to produce signals from which a measure of the pitch of the input speech signal during a time interval may be derived.

5. A real-time linear predictive coder in accordance with Claim 3 wherein said multiplier is arranged to produce signals from which may be derive a set of filter coefficients characterising a model of the vocal tract which uttered the input speech signal.

6. A real-time linear predictive coder substantially as hereinbefore described with reference to the accompanying drawing.