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GB2073947B - Integrated circuit encapsulation - Google Patents

Integrated circuit encapsulation

Info

Publication number
GB2073947B
GB2073947B GB8012093A GB8012093A GB2073947B GB 2073947 B GB2073947 B GB 2073947B GB 8012093 A GB8012093 A GB 8012093A GB 8012093 A GB8012093 A GB 8012093A GB 2073947 B GB2073947 B GB 2073947B
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
circuit encapsulation
encapsulation
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8012093A
Other versions
GB2073947A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Electronics UK Ltd
Original Assignee
Philips Electronic and Associated Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronic and Associated Industries Ltd filed Critical Philips Electronic and Associated Industries Ltd
Priority to GB8012093A priority Critical patent/GB2073947B/en
Publication of GB2073947A publication Critical patent/GB2073947A/en
Application granted granted Critical
Publication of GB2073947B publication Critical patent/GB2073947B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
GB8012093A 1980-04-11 1980-04-11 Integrated circuit encapsulation Expired GB2073947B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8012093A GB2073947B (en) 1980-04-11 1980-04-11 Integrated circuit encapsulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8012093A GB2073947B (en) 1980-04-11 1980-04-11 Integrated circuit encapsulation

Publications (2)

Publication Number Publication Date
GB2073947A GB2073947A (en) 1981-10-21
GB2073947B true GB2073947B (en) 1983-12-21

Family

ID=10512749

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8012093A Expired GB2073947B (en) 1980-04-11 1980-04-11 Integrated circuit encapsulation

Country Status (1)

Country Link
GB (1) GB2073947B (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4560580A (en) * 1982-09-30 1985-12-24 Phillips Petroleum Company Process for encapsulating articles with optional laser printing
US4654225A (en) * 1982-09-30 1987-03-31 Phillips Petroleum Company Laser printable polyarylene sulfide compositions process for encapsulating articles with optional laser printing
EP0106475A1 (en) * 1982-10-04 1984-04-25 Texas Instruments Incorporated Apparatus and method for semiconductor device packaging
FR2584862B1 (en) * 1985-07-12 1988-05-20 Eurotechnique Sa PROCESS FOR THE CONTINUOUS MANUFACTURE OF MICROMODULES FOR CARDS CONTAINING COMPONENTS, CONTINUOUS BAND OF MICROMODULES AND MICROMODULES CARRIED OUT BY SUCH A PROCESS
FR2590052B1 (en) * 1985-11-08 1991-03-01 Eurotechnique Sa METHOD FOR RECYCLING A CARD COMPRISING A COMPONENT, CARD PROVIDED FOR RECYCLE
FR2590051B1 (en) * 1985-11-08 1991-05-17 Eurotechnique Sa CARD COMPRISING A COMPONENT AND MICROMODULE WITH SIDING CONTACTS
US5065224A (en) * 1986-06-30 1991-11-12 Fairchild Semiconductor Corporation Low noise integrated circuit and leadframe
US5173621A (en) * 1986-06-30 1992-12-22 Fairchild Semiconductor Corporation Transceiver with isolated power rails for ground bounce reduction
KR960013630B1 (en) * 1986-06-30 1996-10-10 페어차일드 세미콘덕터 코퍼레이션 Ground Fluctuation Reduction Device in Integrated Circuits
US4946633A (en) * 1987-04-27 1990-08-07 Hitachi, Ltd. Method of producing semiconductor devices
DE4401588C2 (en) * 1994-01-20 2003-02-20 Gemplus Gmbh Method for capping a chip card module and chip card module

Also Published As

Publication number Publication date
GB2073947A (en) 1981-10-21

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee