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GB201121659D0 - Substrates for semiconductor devices - Google Patents

Substrates for semiconductor devices

Info

Publication number
GB201121659D0
GB201121659D0 GBGB1121659.5A GB201121659A GB201121659D0 GB 201121659 D0 GB201121659 D0 GB 201121659D0 GB 201121659 A GB201121659 A GB 201121659A GB 201121659 D0 GB201121659 D0 GB 201121659D0
Authority
GB
United Kingdom
Prior art keywords
layer
silicon
bonding layer
substrate
polycrystalline diamond
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
GBGB1121659.5A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Element Six Ltd
Original Assignee
University of Bath
Element Six Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Bath, Element Six Ltd filed Critical University of Bath
Priority to GBGB1121659.5A priority Critical patent/GB201121659D0/en
Publication of GB201121659D0 publication Critical patent/GB201121659D0/en
Priority to PCT/EP2012/075253 priority patent/WO2013087707A1/en
Priority to GB1222329.3A priority patent/GB2497664B/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

A composite substrate comprising a silicon wafer 10 and a silicon oxide layer 12 is provided with a bonding layer 14 on which a polycrystalline diamond layer 16 is grown. The composite wafer is removed using preferential etching which does not etch the bonding layer or the diamond layer. The bonding layer may be a different material to silicon or silicon dioxide or it may be silicon having a different crystal orientation to the underlying silicon portion of the composite wafer. An edge etch stop may be provided around edge regions of the bonding layer attached to the polycrystalline diamond layer (see figure 3). In an alternative method a doped, electrically conductive region is provided in a portion of the substrate to be removed and an electrically resistive layer is bonded to the polycrystalline diamond layer and the doped, electrically conductive portion of the substrate is removed by electrochemical etching or electrochemically assisted etching.
GBGB1121659.5A 2011-12-16 2011-12-16 Substrates for semiconductor devices Ceased GB201121659D0 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GBGB1121659.5A GB201121659D0 (en) 2011-12-16 2011-12-16 Substrates for semiconductor devices
PCT/EP2012/075253 WO2013087707A1 (en) 2011-12-16 2012-12-12 Substrates for semiconductor devices
GB1222329.3A GB2497664B (en) 2011-12-16 2012-12-12 Substrates for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB1121659.5A GB201121659D0 (en) 2011-12-16 2011-12-16 Substrates for semiconductor devices

Publications (1)

Publication Number Publication Date
GB201121659D0 true GB201121659D0 (en) 2012-01-25

Family

ID=45560565

Family Applications (2)

Application Number Title Priority Date Filing Date
GBGB1121659.5A Ceased GB201121659D0 (en) 2011-12-16 2011-12-16 Substrates for semiconductor devices
GB1222329.3A Expired - Fee Related GB2497664B (en) 2011-12-16 2012-12-12 Substrates for semiconductor devices

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB1222329.3A Expired - Fee Related GB2497664B (en) 2011-12-16 2012-12-12 Substrates for semiconductor devices

Country Status (2)

Country Link
GB (2) GB201121659D0 (en)
WO (1) WO2013087707A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6300662B2 (en) * 2014-06-20 2018-03-28 オリンパス株式会社 Semiconductor device and manufacturing method of semiconductor device
IL253085B (en) * 2017-06-20 2021-06-30 Elta Systems Ltd Gallium nitride semiconductor structure and process for fabricating thereof
US10692752B2 (en) 2017-06-20 2020-06-23 Elta Systems Ltd. Gallium nitride semiconductor structure and process for fabricating thereof
JP7480699B2 (en) * 2020-12-24 2024-05-10 株式会社Sumco Multilayer substrate using freestanding polycrystalline diamond substrate and its manufacturing method
CN112967923B (en) * 2021-02-05 2022-06-10 中国电子科技集团公司第十三研究所 Method for preparing terahertz diode with diamond substrate on large-size wafer
CN117646275A (en) * 2024-01-30 2024-03-05 北京大学 Preparation method of large-size high-thermal-conductivity III-nitride epitaxial material

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5131963A (en) * 1987-11-16 1992-07-21 Crystallume Silicon on insulator semiconductor composition containing thin synthetic diamone films
US4981818A (en) 1990-02-13 1991-01-01 General Electric Company Polycrystalline CVD diamond substrate for single crystal epitaxial growth of semiconductors
US5376579A (en) * 1993-07-02 1994-12-27 The United States Of America As Represented By The Secretary Of The Air Force Schemes to form silicon-on-diamond structure
US6509124B1 (en) * 1999-11-10 2003-01-21 Shin-Etsu Chemical Co., Ltd. Method of producing diamond film for lithography
US7132309B2 (en) 2003-04-22 2006-11-07 Chien-Min Sung Semiconductor-on-diamond devices and methods of forming
US7033912B2 (en) 2004-01-22 2006-04-25 Cree, Inc. Silicon carbide on diamond substrates and related devices and methods
US20060113545A1 (en) 2004-10-14 2006-06-01 Weber Eicke R Wide bandgap semiconductor layers on SOD structures
US7695564B1 (en) 2005-02-03 2010-04-13 Hrl Laboratories, Llc Thermal management substrate
GB0505752D0 (en) 2005-03-21 2005-04-27 Element Six Ltd Diamond based substrate for gan devices
US7595507B2 (en) 2005-04-13 2009-09-29 Group4 Labs Llc Semiconductor devices having gallium nitride epilayers on diamond substrates
US7749863B1 (en) * 2005-05-12 2010-07-06 Hrl Laboratories, Llc Thermal management substrates

Also Published As

Publication number Publication date
WO2013087707A1 (en) 2013-06-20
GB2497664A (en) 2013-06-19
GB201222329D0 (en) 2013-01-23
GB2497664B (en) 2015-02-11

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Legal Events

Date Code Title Description
COOA Change in applicant's name or ownership of the application

Owner name: ELEMENT SIX LIMITED

Free format text: FORMER OWNERS: ELEMENT SIX LIMITED;THE UNIVERSITY OF BATH,

AT Applications terminated before publication under section 16(1)