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GB1475199A - Circuit for avoiding the effects of contact chatter - Google Patents

Circuit for avoiding the effects of contact chatter

Info

Publication number
GB1475199A
GB1475199A GB4731274A GB4731274A GB1475199A GB 1475199 A GB1475199 A GB 1475199A GB 4731274 A GB4731274 A GB 4731274A GB 4731274 A GB4731274 A GB 4731274A GB 1475199 A GB1475199 A GB 1475199A
Authority
GB
United Kingdom
Prior art keywords
pulse
input
circuit
output
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4731274A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bosse Telefonbau GmbH
Original Assignee
Bosse Telefonbau GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosse Telefonbau GmbH filed Critical Bosse Telefonbau GmbH
Publication of GB1475199A publication Critical patent/GB1475199A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference

Landscapes

  • Manipulation Of Pulses (AREA)

Abstract

1475199 Suppressing contact chatter BOSSE TELEFONBAU GmbH 1 Nov 1974 [3 Nov 1973] 47312/74 Heading H3P A circuit for suppressing contact chatter comprises a D flip-flop which has its D input 24 connected to the circuit input 20 and is switched by a pulse at its clock input 23 a predetermined time after application or relase of a pulse to the input by which time contact chatter will have ceased. The input pulse at 20 is connected through an EXCLUSIVE-OR gate 2 and an AND gate 3 to reset and start a binary counter 1. When the count is complete, the output of counter 1 produces the delayed pulse to switch the flip-flop, and start an output pulse at 30. The flip-flop output 28 simultaneously changes from high to low so that the circuit is ready to perform the same switching sequence when the trailing edge of the input pulse arrives. To avoid phase uncertainty in the output pulse due to the clock cycle time, the counter 1 may be started by the input pulse after a short fixed delay instead of waiting for the next clock pulse, Fig. 2 (not shown).
GB4731274A 1973-11-03 1974-11-01 Circuit for avoiding the effects of contact chatter Expired GB1475199A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732355095 DE2355095B2 (en) 1973-11-03 1973-11-03 Circuit arrangement to avoid the effects of contact bounce

Publications (1)

Publication Number Publication Date
GB1475199A true GB1475199A (en) 1977-06-01

Family

ID=5897188

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4731274A Expired GB1475199A (en) 1973-11-03 1974-11-01 Circuit for avoiding the effects of contact chatter

Country Status (5)

Country Link
BE (1) BE821748A (en)
DE (1) DE2355095B2 (en)
FR (1) FR2250233A1 (en)
GB (1) GB1475199A (en)
IT (1) IT1025381B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2507028A1 (en) * 1981-05-29 1982-12-03 Hitachi Ltd ELECTRONIC CIRCUIT DEVICE, ESPECIALLY FOR USE IN AN ELECTRICALLY PROGRAMMABLE DEAD MEMORY
US4860230A (en) * 1983-12-22 1989-08-22 Alcatel N.V. Signal recognition system

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3133667C2 (en) * 1981-08-26 1986-06-19 Siemens AG, 1000 Berlin und 8000 München Arrangement for suppressing pulses generated by contact bouncing
DE3319616A1 (en) * 1982-07-08 1984-01-12 Teldix Gmbh, 6900 Heidelberg Circuit arrangement for generating noise-free switching pulses
US4862138A (en) * 1988-02-08 1989-08-29 Tektronix, Inc. Programmable comparator output filter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2507028A1 (en) * 1981-05-29 1982-12-03 Hitachi Ltd ELECTRONIC CIRCUIT DEVICE, ESPECIALLY FOR USE IN AN ELECTRICALLY PROGRAMMABLE DEAD MEMORY
US4860230A (en) * 1983-12-22 1989-08-22 Alcatel N.V. Signal recognition system

Also Published As

Publication number Publication date
BE821748A (en) 1975-02-17
DE2355095B2 (en) 1975-10-23
IT1025381B (en) 1978-08-10
FR2250233A1 (en) 1975-05-30
DE2355095A1 (en) 1975-05-15

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee