GB1287791A - A microcircuit and manufacture of same - Google Patents
A microcircuit and manufacture of sameInfo
- Publication number
- GB1287791A GB1287791A GB53604/69A GB5360469A GB1287791A GB 1287791 A GB1287791 A GB 1287791A GB 53604/69 A GB53604/69 A GB 53604/69A GB 5360469 A GB5360469 A GB 5360469A GB 1287791 A GB1287791 A GB 1287791A
- Authority
- GB
- United Kingdom
- Prior art keywords
- layer
- resist
- conductor
- gold
- conductors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004020 conductor Substances 0.000 abstract 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract 3
- 239000010931 gold Substances 0.000 abstract 3
- 229910052737 gold Inorganic materials 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- 238000000429 assembly Methods 0.000 abstract 1
- 230000000712 assembly Effects 0.000 abstract 1
- 229910010293 ceramic material Inorganic materials 0.000 abstract 1
- 238000000151 deposition Methods 0.000 abstract 1
- 230000008021 deposition Effects 0.000 abstract 1
- 238000004070 electrodeposition Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 229910000623 nickel–chromium alloy Inorganic materials 0.000 abstract 1
- 238000012216 screening Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4685—Manufacturing of cross-over conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N97/00—Electric solid-state thin-film or thick-film devices, not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
1287791 Circuit assemblies HONEYWELL INFORMATION SYSTEMS ITALIA SpA 31 Oct 1969 53604/69 Heading H1R A microcircuit comprises an insulating substrate 1 supporting conductors such as 2 each comprising a first thin layer 2a, a second thin layer 2b and an electrolytically deposited layer 2c, the conductors being separated from further conductors such as 4 crossing them by insulating layers 5. To construct the circuit, the substrate is covered with a vacuum deposited layer of nickel-chromium alloy, then a vacuum deposited gold layer followed by a layer of photo-sensitive resist material. A conductor pattern is defined on the resist layer using a mask and is exposed by solution of the resist layer covering it. After the electrolytic deposition of gold to form the third layer, the remaining photo-resist layer is removed and the underlying thin metal layers etched away. Alternatively it is the resist layer covering the unwanted part of the conductor layer which is first removed, followed by the unwanted conductive layer. Electrodeposition of gold follows removal of resist from the pattern. Then the insulating layer 5 is applied by silk-screening ceramic material and, as shown, the cross-over conductor 4 is formed in the same way as conductor 2. Alternatively it may be screen printed.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT846347 | 1968-10-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1287791A true GB1287791A (en) | 1972-09-06 |
Family
ID=11126731
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB53604/69A Expired GB1287791A (en) | 1968-10-31 | 1969-10-31 | A microcircuit and manufacture of same |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1287791A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2517503A1 (en) * | 1981-11-30 | 1983-06-03 | Nippon Electric Co | SUBSTRATE COMPRISING A PATTERN CONSISTING OF A GOLD ALLOY, A NOBLE METAL AND A BASE METAL, THE PATTERN BEING ISOLATED BY OXIDES OF NOBLE AND BASE METALS |
EP0098472A1 (en) * | 1982-07-02 | 1984-01-18 | International Business Machines Corporation | Method for decreasing plated metal defects by treating a metallic surface |
EP0374452A2 (en) * | 1988-12-23 | 1990-06-27 | Corning Incorporated | Hybrid circuits and thick film dielectrics used therein |
US7745735B2 (en) | 2003-07-12 | 2010-06-29 | Hewlett-Packard Development Company, L.P. | Cross-over of conductive interconnects and a method of crossing conductive interconnects |
-
1969
- 1969-10-31 GB GB53604/69A patent/GB1287791A/en not_active Expired
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2517503A1 (en) * | 1981-11-30 | 1983-06-03 | Nippon Electric Co | SUBSTRATE COMPRISING A PATTERN CONSISTING OF A GOLD ALLOY, A NOBLE METAL AND A BASE METAL, THE PATTERN BEING ISOLATED BY OXIDES OF NOBLE AND BASE METALS |
EP0098472A1 (en) * | 1982-07-02 | 1984-01-18 | International Business Machines Corporation | Method for decreasing plated metal defects by treating a metallic surface |
EP0374452A2 (en) * | 1988-12-23 | 1990-06-27 | Corning Incorporated | Hybrid circuits and thick film dielectrics used therein |
EP0374452A3 (en) * | 1988-12-23 | 1991-05-02 | Corning Incorporated | Hybrid circuits and thick film dielectrics used therein |
US7745735B2 (en) | 2003-07-12 | 2010-06-29 | Hewlett-Packard Development Company, L.P. | Cross-over of conductive interconnects and a method of crossing conductive interconnects |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed [section 19, patents act 1949] | ||
PLNP | Patent lapsed through nonpayment of renewal fees |