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GB1135403A - Method and apparatus for storing binary information utilising transistors - Google Patents

Method and apparatus for storing binary information utilising transistors

Info

Publication number
GB1135403A
GB1135403A GB1222865A GB1222865A GB1135403A GB 1135403 A GB1135403 A GB 1135403A GB 1222865 A GB1222865 A GB 1222865A GB 1222865 A GB1222865 A GB 1222865A GB 1135403 A GB1135403 A GB 1135403A
Authority
GB
United Kingdom
Prior art keywords
transistors
circuit
transistor
series
change
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1222865A
Inventor
Raymond Vincent Peacock
Hewson Nicholas Graham King
Thomas Klein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Components Ltd
Original Assignee
Mullard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mullard Ltd filed Critical Mullard Ltd
Priority to GB1222865A priority Critical patent/GB1135403A/en
Publication of GB1135403A publication Critical patent/GB1135403A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

1,135,403. Matrix stores. MULLARD Ltd. 10 Dec., 1965 [23 March, 1965], No. 12228/65. Heading G4C. [Also in Division H3] A bi-stable circuit suitable for use in an integrated matrix store comprises four insulated gate field effect transistors 1-4 arranged and cross-coupled substantially as shown, read out means (not shown) in series with the supply to detect a change of current, e.g. during change of state of the circuit and further field effect transistors to effect the change of state. As shown the circuit may be set by applying coincident pulses to the gate and substrate of a normally non-conducting transistor 8 and reset by applying a pulse to the gate of a normally non-conducting transistor 7. Both of these transistors may be replaced by a plurality of series transistor requiring coincident pulses for set and reset and transistor 8 may be replaced by a plurality of transistors connected in series between terminal 6 and earth (Figs. 3, 4 and 5, not shown). The circuit may be made integrally on a single base plane together with others to form a matrix and in the circuits of Figs. 4 and 5 the transistors (24, 25) and (28, 29) may be of N-type formed on the P substrate of transistors 3 and 4.
GB1222865A 1965-03-23 1965-03-23 Method and apparatus for storing binary information utilising transistors Expired GB1135403A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1222865A GB1135403A (en) 1965-03-23 1965-03-23 Method and apparatus for storing binary information utilising transistors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1222865A GB1135403A (en) 1965-03-23 1965-03-23 Method and apparatus for storing binary information utilising transistors

Publications (1)

Publication Number Publication Date
GB1135403A true GB1135403A (en) 1968-12-04

Family

ID=10000707

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1222865A Expired GB1135403A (en) 1965-03-23 1965-03-23 Method and apparatus for storing binary information utilising transistors

Country Status (1)

Country Link
GB (1) GB1135403A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2125339A1 (en) * 1971-02-11 1972-09-29 Siemens Ag

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2125339A1 (en) * 1971-02-11 1972-09-29 Siemens Ag

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