GB1033155A - Improvements relating to circuits for the transmission of digital code signals - Google Patents
Improvements relating to circuits for the transmission of digital code signalsInfo
- Publication number
- GB1033155A GB1033155A GB3376961A GB3376961A GB1033155A GB 1033155 A GB1033155 A GB 1033155A GB 3376961 A GB3376961 A GB 3376961A GB 3376961 A GB3376961 A GB 3376961A GB 1033155 A GB1033155 A GB 1033155A
- Authority
- GB
- United Kingdom
- Prior art keywords
- delay
- pulse
- electric
- sept
- binary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/388—Skewing
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Electrophonic Musical Instruments (AREA)
Abstract
1,033,155. Electric calculating apparatus; electric selective signalling. ELECTRIC & MUSICAL INDUSTRIES Ltd. Sept. 11, 1962 [Sept. 21, 1961]; Nov. 14, 1961], Nos. 33769/61 and 40621/61. Headings G4A and G4H. The need to wait until carries in a parallel adder have been propagated is obviated by the use of delay elements D in the input lines for the higher orders of binary addend and augend A, B, so that these higher-order bits arrive at their respective binary adders C simultaneously with the carries from lower orders. Thus, if D2A, D2B provide a delay t (equal to the time taken for C1 to produce its carry signal) then D3A, D3B provide delay 2t and DnA, DnB provide delay (n - 1)t. Provision of delays (n - 1)t, (n - 2)t, . . . at E1, E2, . . . ensures that simultaneous read-out is available at S1-Sn, and thus after a time somewhat greater than t has elapsed two further input numbers A, B may be applied for addition. The drawing of Provisional Specification 40621/61 shows read-out means for a cascade binary counter having stages C1-Cn, the lowest order of which is interrogated first by a B pulse which is then transmitted to further stages at a speed equal to that of a ripple carry pulse through the counter, so that the correct count is obtained at T1-Tn whenever a B pulse is applied.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB4062161 | 1961-11-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1033155A true GB1033155A (en) | 1966-06-15 |
Family
ID=10415793
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB3376961A Expired GB1033155A (en) | 1961-11-14 | 1961-09-21 | Improvements relating to circuits for the transmission of digital code signals |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB1033155A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2521322A1 (en) * | 1982-02-10 | 1983-08-12 | Sony Corp | CIRCUIT FOR PROCESSING DIGITAL SIGNALS, IN PARTICULAR A LOW SPEED WORKING CIRCUIT |
| GB2157032A (en) * | 1984-04-06 | 1985-10-16 | Standard Telephones Cables Ltd | Digital parallel odder |
-
1961
- 1961-09-21 GB GB3376961A patent/GB1033155A/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2521322A1 (en) * | 1982-02-10 | 1983-08-12 | Sony Corp | CIRCUIT FOR PROCESSING DIGITAL SIGNALS, IN PARTICULAR A LOW SPEED WORKING CIRCUIT |
| GB2157032A (en) * | 1984-04-06 | 1985-10-16 | Standard Telephones Cables Ltd | Digital parallel odder |
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