GB1009491A - Transmission systems - Google Patents
Transmission systemsInfo
- Publication number
- GB1009491A GB1009491A GB4592363A GB4592363A GB1009491A GB 1009491 A GB1009491 A GB 1009491A GB 4592363 A GB4592363 A GB 4592363A GB 4592363 A GB4592363 A GB 4592363A GB 1009491 A GB1009491 A GB 1009491A
- Authority
- GB
- United Kingdom
- Prior art keywords
- pulse
- distorted
- unit
- data
- comparator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Abstract
1,009,491. Telegraphy. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 21, 1963 [Dec. 18, 1962], No. 45923/63. Heading H4P. In a data transmission system in which the data is distorted prior to transmission to compensate for line characteristics, undistorted test pulses are transmitted initially and sampled at bit frequency at the receiver, where they are received distorted. The results of the sampling are returned to the transmitter where they are used to predistort the data to be transmitted. In a first embodiment, a distorted test pulse received from line 14 passes to unit 26 which senses the main peak and, via unit 29, enables gate 36 at the first peak in the distorted pulse. Unit 26 also generates bit rate clock pulses which step binary counter 34. After a K- bit delay (K = number of bit periods up to the maximum peak) the distorted pulse arrives at comparator 40. Comparator 40 is enabled at bit rate except during the main peak time and, when the distorted pulse differs from a certain potential, inhibits gate 36 via unit 29 and also passes a positive or negative pulse, indicating the sign of the difference, to register 46. Unit 48 now reads out the register, which also holds the binary count on counter 34 at the time the comparator pulsed, and the register's content is passed at slow speed to the transmitter where, by means of units 52, 60, 62, it modifies the next test pulse to be sent. This operation continues until counter 34 reaches full count, whereupon data may be transmitted, it being predistorted by units 52, 60, 62. A second embodiment, Fig. 2 (not shown), uses two comparators for positive and negative thresholds, the thresholds being gradually reduced to zero and the test pulses modified until the comparators give no output at each enabling pulse. Specification 1,009,493 is referred to.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US24549862A | 1962-12-18 | 1962-12-18 | |
US255385A US3242462A (en) | 1963-01-31 | 1963-01-31 | Transmission systems |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1009491A true GB1009491A (en) | 1965-11-10 |
Family
ID=26937281
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB4592363A Expired GB1009491A (en) | 1962-12-18 | 1963-11-21 | Transmission systems |
Country Status (2)
Country | Link |
---|---|
GB (1) | GB1009491A (en) |
NL (1) | NL301917A (en) |
-
1963
- 1963-11-21 GB GB4592363A patent/GB1009491A/en not_active Expired
- 1963-12-16 NL NL301917A patent/NL301917A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
NL301917A (en) | 1965-10-11 |
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