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GB0807485D0 - Method of applying a bump to a substrate - Google Patents

Method of applying a bump to a substrate

Info

Publication number
GB0807485D0
GB0807485D0 GBGB0807485.8A GB0807485A GB0807485D0 GB 0807485 D0 GB0807485 D0 GB 0807485D0 GB 0807485 A GB0807485 A GB 0807485A GB 0807485 D0 GB0807485 D0 GB 0807485D0
Authority
GB
United Kingdom
Prior art keywords
bump
conductive pad
applying
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
GBGB0807485.8A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Welding Institute England
Original Assignee
Welding Institute England
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Welding Institute England filed Critical Welding Institute England
Priority to GBGB0807485.8A priority Critical patent/GB0807485D0/en
Publication of GB0807485D0 publication Critical patent/GB0807485D0/en
Priority to TW098111928A priority patent/TW201001578A/en
Priority to PCT/GB2009/000972 priority patent/WO2009130442A1/en
Ceased legal-status Critical Current

Links

Classifications

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

A method of applying a bump to a conductive pad (2) on a substrate (1) having a passivation layer (3) over the conductive pad. The method comprises: a) providing a masking layer (11) over the passivation layer; b) patterning and developing the masking layer (11) to define a cavity (7) extending through the masking layer in alignment with the conductive pad (2); c) removing part of the passivation layer (3) exposed in the cavity (7) so as to expose the conductive pad; d) forming a bump (8) in the cavity contacting the conductive pad; and, e) removing the masking layer (11); the method further comprising applying a layer of solder (9) to the bump by immersing the substrate in a solder bath.
GBGB0807485.8A 2008-04-24 2008-04-24 Method of applying a bump to a substrate Ceased GB0807485D0 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GBGB0807485.8A GB0807485D0 (en) 2008-04-24 2008-04-24 Method of applying a bump to a substrate
TW098111928A TW201001578A (en) 2008-04-24 2009-04-10 Method of applying a bump to a substrate
PCT/GB2009/000972 WO2009130442A1 (en) 2008-04-24 2009-04-15 Method of applying a bump to a substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB0807485.8A GB0807485D0 (en) 2008-04-24 2008-04-24 Method of applying a bump to a substrate

Publications (1)

Publication Number Publication Date
GB0807485D0 true GB0807485D0 (en) 2008-06-04

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GBGB0807485.8A Ceased GB0807485D0 (en) 2008-04-24 2008-04-24 Method of applying a bump to a substrate

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GB (1) GB0807485D0 (en)
TW (1) TW201001578A (en)
WO (1) WO2009130442A1 (en)

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US9230934B2 (en) * 2013-03-15 2016-01-05 Taiwan Semiconductor Manufacturing Company, Ltd. Surface treatment in electroless process for adhesion enhancement
WO2015055247A1 (en) 2013-10-17 2015-04-23 Osram Opto Semiconductors Gmbh Method for producing a large number of support apparatuses which can be surface-mounted, arrangement of a large number of support apparatuses which can be surface-mounted, and support apparatus which can be surface-mounted
US11304313B2 (en) 2017-12-15 2022-04-12 Hewlett-Packard Development Company, L.P. Three-dimensional printing

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JPH07273439A (en) * 1994-03-31 1995-10-20 Du Pont Kk Solder bump formation method
JP3968554B2 (en) * 2000-05-01 2007-08-29 セイコーエプソン株式会社 Bump forming method and semiconductor device manufacturing method
JP3700563B2 (en) * 2000-09-04 2005-09-28 セイコーエプソン株式会社 Bump forming method and semiconductor device manufacturing method
JP2003243448A (en) * 2002-02-18 2003-08-29 Seiko Epson Corp Semiconductor device, method of manufacturing the same, and electronic device

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WO2009130442A1 (en) 2009-10-29
TW201001578A (en) 2010-01-01

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