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GB0114592D0 - Central processing unit architectures - Google Patents

Central processing unit architectures

Info

Publication number
GB0114592D0
GB0114592D0 GBGB0114592.9A GB0114592A GB0114592D0 GB 0114592 D0 GB0114592 D0 GB 0114592D0 GB 0114592 A GB0114592 A GB 0114592A GB 0114592 D0 GB0114592 D0 GB 0114592D0
Authority
GB
United Kingdom
Prior art keywords
processing unit
central processing
unit architectures
architectures
central
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
GBGB0114592.9A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Arris Global Ltd
Original Assignee
Pace Micro Technology PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pace Micro Technology PLC filed Critical Pace Micro Technology PLC
Priority to GBGB0114592.9A priority Critical patent/GB0114592D0/en
Publication of GB0114592D0 publication Critical patent/GB0114592D0/en
Priority to GB0211310A priority patent/GB2379531B/en
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
GBGB0114592.9A 2001-06-14 2001-06-14 Central processing unit architectures Ceased GB0114592D0 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GBGB0114592.9A GB0114592D0 (en) 2001-06-14 2001-06-14 Central processing unit architectures
GB0211310A GB2379531B (en) 2001-06-14 2002-05-17 Central processing unit architectures

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB0114592.9A GB0114592D0 (en) 2001-06-14 2001-06-14 Central processing unit architectures

Publications (1)

Publication Number Publication Date
GB0114592D0 true GB0114592D0 (en) 2001-08-08

Family

ID=9916636

Family Applications (2)

Application Number Title Priority Date Filing Date
GBGB0114592.9A Ceased GB0114592D0 (en) 2001-06-14 2001-06-14 Central processing unit architectures
GB0211310A Expired - Fee Related GB2379531B (en) 2001-06-14 2002-05-17 Central processing unit architectures

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB0211310A Expired - Fee Related GB2379531B (en) 2001-06-14 2002-05-17 Central processing unit architectures

Country Status (1)

Country Link
GB (2) GB0114592D0 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1165454A (en) * 1981-01-16 1984-04-10 Albert J. Weidner Odd byte memory accessing in data processing apparatus
US4561051A (en) * 1984-02-10 1985-12-24 Prime Computer, Inc. Memory access method and apparatus in multiple processor systems

Also Published As

Publication number Publication date
GB2379531B (en) 2005-05-25
GB0211310D0 (en) 2002-06-26
GB2379531A (en) 2003-03-12

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Legal Events

Date Code Title Description
AT Applications terminated before publication under section 16(1)