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FR3082656B1 - Circuit integre comprenant des macros et son procede de fabrication - Google Patents

Circuit integre comprenant des macros et son procede de fabrication Download PDF

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Publication number
FR3082656B1
FR3082656B1 FR1855325A FR1855325A FR3082656B1 FR 3082656 B1 FR3082656 B1 FR 3082656B1 FR 1855325 A FR1855325 A FR 1855325A FR 1855325 A FR1855325 A FR 1855325A FR 3082656 B1 FR3082656 B1 FR 3082656B1
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FR
France
Prior art keywords
macros
manufacturing
integrated circuit
macro
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1855325A
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English (en)
Other versions
FR3082656A1 (fr
Inventor
Hughes Metras
Fabien Clermidy
Didier Lattard
Sebastien Thuries
Pascal Vivet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1855325A priority Critical patent/FR3082656B1/fr
Priority to EP19180679.3A priority patent/EP3584825A1/fr
Priority to US16/443,441 priority patent/US10937778B2/en
Publication of FR3082656A1 publication Critical patent/FR3082656A1/fr
Application granted granted Critical
Publication of FR3082656B1 publication Critical patent/FR3082656B1/fr
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/18Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
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    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/22Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/14Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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    • H01L2224/802Applying energy for connecting
    • H01L2224/80201Compression bonding
    • H01L2224/80203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
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    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H01L2924/351Thermal stress
    • H01L2924/3512Cracking
    • H01L2924/35121Peeling or delaminating

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

L'invention concerne un niveau d'un circuit 3D, comprenant : un ou plusieurs circuits macros, chaque circuit macro comprenant une pluralité de cellules macros (202) agencées en une matrice (101), les cellules macros (202) étant séparées entre elles par des espaces ; et des vias d'interconnexion (110) disposés dans les espaces entre les cellules macros (202).
FR1855325A 2018-06-18 2018-06-18 Circuit integre comprenant des macros et son procede de fabrication Active FR3082656B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1855325A FR3082656B1 (fr) 2018-06-18 2018-06-18 Circuit integre comprenant des macros et son procede de fabrication
EP19180679.3A EP3584825A1 (fr) 2018-06-18 2019-06-17 Circuit intégré comprenant des macros et son procédé de fabrication
US16/443,441 US10937778B2 (en) 2018-06-18 2019-06-17 Integrated circuit comprising macros and method of fabricating the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1855325 2018-06-18
FR1855325A FR3082656B1 (fr) 2018-06-18 2018-06-18 Circuit integre comprenant des macros et son procede de fabrication

Publications (2)

Publication Number Publication Date
FR3082656A1 FR3082656A1 (fr) 2019-12-20
FR3082656B1 true FR3082656B1 (fr) 2022-02-04

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FR1855325A Active FR3082656B1 (fr) 2018-06-18 2018-06-18 Circuit integre comprenant des macros et son procede de fabrication

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US (1) US10937778B2 (fr)
EP (1) EP3584825A1 (fr)
FR (1) FR3082656B1 (fr)

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US20190385995A1 (en) 2019-12-19
FR3082656A1 (fr) 2019-12-20

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