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FR2996956B1 - Circuit integre comportant des transistors avec des tensions de seuil differentes - Google Patents

Circuit integre comportant des transistors avec des tensions de seuil differentes

Info

Publication number
FR2996956B1
FR2996956B1 FR1259762A FR1259762A FR2996956B1 FR 2996956 B1 FR2996956 B1 FR 2996956B1 FR 1259762 A FR1259762 A FR 1259762A FR 1259762 A FR1259762 A FR 1259762A FR 2996956 B1 FR2996956 B1 FR 2996956B1
Authority
FR
France
Prior art keywords
transistors
integrated circuit
threshold voltages
different threshold
different
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1259762A
Other languages
English (en)
Other versions
FR2996956A1 (fr
Inventor
Bastien Giraud
Philippe Flatresse
Jean-Philippe Noel
Frayer Bertrand Pelloux
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
STMicroelectronics SA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, STMicroelectronics SA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1259762A priority Critical patent/FR2996956B1/fr
Priority to PCT/EP2013/071340 priority patent/WO2014057112A1/fr
Priority to US14/435,004 priority patent/US9911737B2/en
Publication of FR2996956A1 publication Critical patent/FR2996956A1/fr
Application granted granted Critical
Publication of FR2996956B1 publication Critical patent/FR2996956B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191—Manufacturing their doped wells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
FR1259762A 2012-10-12 2012-10-12 Circuit integre comportant des transistors avec des tensions de seuil differentes Expired - Fee Related FR2996956B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1259762A FR2996956B1 (fr) 2012-10-12 2012-10-12 Circuit integre comportant des transistors avec des tensions de seuil differentes
PCT/EP2013/071340 WO2014057112A1 (fr) 2012-10-12 2013-10-11 Circuit integre comportant des transistors avec des tensions de seuil differentes
US14/435,004 US9911737B2 (en) 2012-10-12 2013-10-11 Integrated circuit comprising transistors with different threshold voltages

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1259762A FR2996956B1 (fr) 2012-10-12 2012-10-12 Circuit integre comportant des transistors avec des tensions de seuil differentes

Publications (2)

Publication Number Publication Date
FR2996956A1 FR2996956A1 (fr) 2014-04-18
FR2996956B1 true FR2996956B1 (fr) 2016-12-09

Family

ID=47833105

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1259762A Expired - Fee Related FR2996956B1 (fr) 2012-10-12 2012-10-12 Circuit integre comportant des transistors avec des tensions de seuil differentes

Country Status (3)

Country Link
US (1) US9911737B2 (fr)
FR (1) FR2996956B1 (fr)
WO (1) WO2014057112A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3025653B1 (fr) 2014-09-10 2017-12-22 Commissariat Energie Atomique Dispositif a cellules memoires sram comportant des moyens de polarisation des caissons des transistors de lecture des cellules memoires
US9842184B2 (en) * 2015-09-11 2017-12-12 Globalfoundries Inc. Method, apparatus and system for using hybrid library track design for SOI technology
US10079597B1 (en) * 2017-03-15 2018-09-18 Globalfoundries Inc. Circuit tuning scheme for FDSOI
US10096602B1 (en) * 2017-03-15 2018-10-09 Globalfoundries Singapore Pte. Ltd. MTP memory for SOI process

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002164544A (ja) * 2000-11-28 2002-06-07 Sony Corp 半導体装置
FR2944139B1 (fr) * 2009-04-01 2011-09-09 Commissariat Energie Atomique Circuit integre realise en soi presentant des transistors a tensions de seuil distinctes
FR2975803B1 (fr) * 2011-05-24 2014-01-10 Commissariat Energie Atomique Circuit integre realise en soi comprenant des cellules adjacentes de differents types
FR2980035B1 (fr) * 2011-09-08 2013-10-04 Commissariat Energie Atomique Circuit integre realise en soi comprenant des cellules adjacentes de differents types
FR2980640B1 (fr) * 2011-09-26 2014-05-02 Commissariat Energie Atomique Circuit integre en technologie fdsoi avec partage de caisson et moyens de polarisation des plans de masse de dopage opposes presents dans un meme caisson
FR2993404B1 (fr) * 2012-07-13 2014-08-22 Commissariat Energie Atomique Circuit integre sur soi comprenant un thyristor (scr) de protection contre des decharges electrostatiques
FR2993402B1 (fr) * 2012-07-13 2018-02-02 Commissariat Energie Atomique Circuit integre sur soi comprenant une diode laterale de protection contre des decharges electrostatiques
FR2993405B1 (fr) * 2012-07-13 2014-08-22 Commissariat Energie Atomique Circuit integre sur soi comprenant un transistor de protection sous-jacent
FR2993403B1 (fr) * 2012-07-13 2014-08-22 Commissariat Energie Atomique Circuit integre sur soi comprenant un triac de protection contre des decharges electrostatiques
FR2993406B1 (fr) * 2012-07-13 2014-08-22 Commissariat Energie Atomique Circuit integre sur soi comprenant un transistor bipolaire a tranchees d'isolation de profondeurs distinctes
FR2996386A1 (fr) * 2012-10-01 2014-04-04 St Microelectronics Sa Comparateur integre a hysteresis, en particulier realise dans une technologie fd soi

Also Published As

Publication number Publication date
US20150287722A1 (en) 2015-10-08
US9911737B2 (en) 2018-03-06
WO2014057112A1 (fr) 2014-04-17
FR2996956A1 (fr) 2014-04-18

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