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FR2888660B1 - Systeme redondance colonne pour une memoire en circuit integre - Google Patents

Systeme redondance colonne pour une memoire en circuit integre

Info

Publication number
FR2888660B1
FR2888660B1 FR0507548A FR0507548A FR2888660B1 FR 2888660 B1 FR2888660 B1 FR 2888660B1 FR 0507548 A FR0507548 A FR 0507548A FR 0507548 A FR0507548 A FR 0507548A FR 2888660 B1 FR2888660 B1 FR 2888660B1
Authority
FR
France
Prior art keywords
integrated circuit
circuit memory
column redundancy
redundancy system
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0507548A
Other languages
English (en)
Other versions
FR2888660A1 (fr
Inventor
Cyrille Dray
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0507548A priority Critical patent/FR2888660B1/fr
Priority to US11/484,343 priority patent/US7391661B2/en
Publication of FR2888660A1 publication Critical patent/FR2888660A1/fr
Application granted granted Critical
Publication of FR2888660B1 publication Critical patent/FR2888660B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/848—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by adjacent switching
FR0507548A 2005-07-13 2005-07-13 Systeme redondance colonne pour une memoire en circuit integre Expired - Fee Related FR2888660B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0507548A FR2888660B1 (fr) 2005-07-13 2005-07-13 Systeme redondance colonne pour une memoire en circuit integre
US11/484,343 US7391661B2 (en) 2005-07-13 2006-07-11 Column redundancy system for an integrated circuit memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0507548A FR2888660B1 (fr) 2005-07-13 2005-07-13 Systeme redondance colonne pour une memoire en circuit integre

Publications (2)

Publication Number Publication Date
FR2888660A1 FR2888660A1 (fr) 2007-01-19
FR2888660B1 true FR2888660B1 (fr) 2007-10-05

Family

ID=36463494

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0507548A Expired - Fee Related FR2888660B1 (fr) 2005-07-13 2005-07-13 Systeme redondance colonne pour une memoire en circuit integre

Country Status (2)

Country Link
US (1) US7391661B2 (fr)
FR (1) FR2888660B1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005092969A (ja) * 2003-09-16 2005-04-07 Renesas Technology Corp 不揮発性半導体記憶装置
KR20080095009A (ko) * 2007-04-23 2008-10-28 주식회사 하이닉스반도체 컬럼 리던던시 회로
US9484114B1 (en) * 2015-07-29 2016-11-01 Sandisk Technologies Llc Decoding data using bit line defect information

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100287019B1 (ko) * 1998-08-12 2001-04-16 윤종용 트루/컴플리먼트 리던던시 스킴을 가지는 반도체 메모리 장치
US6862230B2 (en) * 2002-03-19 2005-03-01 Broadcom Corporation Efficient column redundancy techniques
JP2004013961A (ja) * 2002-06-04 2004-01-15 Mitsubishi Electric Corp 薄膜磁性体記憶装置
JP3756873B2 (ja) * 2002-11-11 2006-03-15 沖電気工業株式会社 半導体記憶装置
US6807114B2 (en) * 2003-01-17 2004-10-19 Micron Technology, Inc. Method and system for selecting redundant rows and columns of memory cells
DE102004047330B4 (de) * 2004-09-29 2011-04-07 Qimonda Ag Integrierter Halbleiterspeicher

Also Published As

Publication number Publication date
US7391661B2 (en) 2008-06-24
FR2888660A1 (fr) 2007-01-19
US20070033450A1 (en) 2007-02-08

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090331