FR2659507A1 - Direct current to direct current converter - Google Patents

Abstract

Direct current to direct current converter of the switched-capacitor type, of small dimensions, in which the lower limit value of the input voltage acceptable is low and in which the ripple on the output voltage is small. An input energy source is directly coupled to an output smoothing capacitor (C3) when the input voltage becomes low. Its output voltage is set by setting the conduction resistance of switching elements (1 to 8), so as to switch the links of the capacitors.

Description

DIRECT CURRENT TO DIRECT CURRENT CONVERTER

  The present invention relates to a convert

  direct current to direct current, or converter

  DC / DC weaver of switched capacitor type The DC / DC converter of switched capacitor type charges a plurality of capacitors connected in series with a DC power supply, and switches the order of connections in series by means of switching Then a smoothing capacitor

  is charged by the energy charged by the first con-

  the aforementioned densifiers, alternatively, so that the smoothing capacitor provides a direct current output. For several years now, the switching type regulator has been used a lot as a DC / DC converter, because of its small size, its lightness and

  of its high yield We can predict a strong increase

  statement of demand for this type of regulator

  switching, in the form of a portable device

  However, the switching regulator used mainly

  currently also has magnetic parts,

  such as a transformer, choke coil and ana-

  gues, so that it has the disadvantage of being difficult to produce in the form of an integrated circuit, that is to say that there is a limit to its reduction in size. In order to solve this type of problem, Japanese Patent Application JP-A N O 58-58863 proposes

  a DC / DC converter of the switched capacitor type.

  The converter consists of a plurality of tran-

  switching sistors and a whole number of condensa-

  torers, so that it is easily achievable in circ-

baked integrated.

  Figure 1 is a circuit diagram of a

  DC / DC converter of the switched capacitor type.

  A DC power source 10 charges capacitors C 1 and C 2 The capacitors C 1 and C 2 are alternately discharged to charge a smoothing capacitor C 3 whose voltage at the terminals is applied to a receiver 11 Switching elements 1,2 and 8 connect the capacitors C 1 and C 2 in series and switch the order of the series connections A pulse signal O a is supplied to the switching elements 1,4,6 and 7, and a signal pulse O b is supplied to the switching elements 2,3,5 and 8, as conduction control signals respectively, the signals

  pulse O a and O b being illustrated in Figure 2.

  Period of high levels of pulse signals

  O a and O b corresponds to the conduction period of the elements

  switching elements The pulse signals O a and 0 b are not high at the same time As switching elements 1,4,6 and 7 are conductive when the pulse signal O a is at high level , the circuit shown in FIG. 3 is then obtained. Since the switching elements 5,8,2 and 3 are conductive when the pulse signal Ob is at high level, the circuit represented in FIG. 4 is then obtained. With the circuit shown in Figure 3, the capacitor C 1 charges and the capacitor C 2 discharges to charge the capacitor C 3 With the circuit of Figure 4, the charge and discharge of the capacitors C and C 2 are reversed The repetition of operations above has the effect that the capacitor

  C 3 supplies power to receiver 11.

  The above DC / DC converter conversion ratio of the switched capacitor type is

  essentially an integer value ratio For example-

  ple, when the converter is designed so that its input voltage is 12 V and its output voltage is 5 V, the convection ratio is 2: 1 Therefore,

  essentially, 10 V or more is required to get

  set the output voltage of 5 V You can set a voltage

  input sion too large by setting the access ratio

  switching activity, that is to say the activity ratio of the pulse signals O a and Ob On the other hand,

  V or more are actually necessary as ten-

  minimum permissible inlet load, because a fall of

  voltage is generated due to the resistance of the

  duction of the switching transistors Since the voltage drop is determined by the product of the resistance

  of conduction of the switching transistor and a

  rant of use flowing through the switching transistor, the value of the lower limit of the input voltage must be increased when the current

  of use or of receiver increases As already indicated

  qué, the output voltage is regulated by modification of the switching activity ratio However, in the case where the activity ratio is low, the rate of supply of voltage only by a smoothing capacitor on the output side increases, by so that the degree of inclusion of ripples increases. For this reason, DC / DC converters of this type have

  a fault in the stability of the output voltage when

  that they are used in the form of a converter whose output is 50 W or more, so that their use is limited to converters whose output is 5 W or less To avoid this drawback,

  we can consider increasing the switching frequency

  tion of the switching transistor or increasing the capacitance of the smoothing capacitor which gives the output voltage, or the like However, if the switching frequency becomes too large, the switching loss of the switching transistor

  In addition, the price of the device increases when

  that the capacity of the smoothing capacitor is increased.

  The first object of the present invention is to provide a DC / DC converter whose lower limit value of the admissible input voltage is lowered (in other words, which has a wide range of admissible input voltage), by direct coupling

  from a DC power source to a condensa-

smoothing.

  The second object of the invention is to provide a small DC / DC converter whose output voltage is regulated by adjusting the conduction resistance of the switching elements,

  and whose output voltage is only slightly undulated

lée.

  The third object of the invention is to pro-

  cure a dc / dc converter whose limit value

  lower of the admissible input voltage is lowered

  set by switching to active state of all elements

of commutation.

  The fourth object of the invention is to pro-

  cure a high efficiency DC / DC converter,

  by using an inductor on the input stage.

  In accordance with the present invention, these results are achieved by a DC / DC converter of the

  switched capacitor type, which includes a plurality

  reality of first capacitors charged by a DC energy source; a second capacitor

  smoothing which is charged by said first conden-

  which is connected to a receiver; a switching unit which comprises a plurality of switching elements arranged between the first capacitors and the DC power source and between the first capacitors and the second capacitor,

  these switching elements connecting the series in series

  lity of first capacitors and being able to change the order of the series links according to the on / off combination of the plurality of switching elements; a switching control unit for periodically changing said order of the serial links; and an auxiliary switching element which directly couples said

  DC energy source in the second conden-

sator.

  The various objects and characteristics above

  above of the invention, as well as others, will appear

  better in light of the detailed description below,

  with reference to the accompanying drawings in which: Figure 1 is a circuit diagram of a DC / DC converter of a conventional switched capacitor type; Figure 2 is a waveform diagram of the pulse signals driving the converter; Figures 3 and 4 are circuit diagrams of a DC / DC converter; Figure 5 is a main circuit diagram

  of a First embodiment of the present invention

  tion; Figure 6 is a circuit diagram of a switching control unit of the first embodiment; Figure 7 is a main circuit diagram of a second embodiment;

  Figure 8 is an explanatory drawing of the function

  operation of the first embodiment; FIG. 9 illustrates the waveforms of the signals of the first embodiment; Figure 10 is a main circuit diagram of a third embodiment; Fig. 11 is a circuit diagram of a switching control unit of the third embodiment; Figure 12 is a characteristic graph of a metal-oxide MOSFET transistor; Figures 13 and 14 illustrate the signal waveforms of the third embodiment; Figure 15 is a main circuit diagram of a fourth embodiment; Fig. 16 is a circuit diagram of a switching control unit of the fourth embodiment; Fig. 17 shows the signal waveforms of the fourth embodiment; Figure 18 is a main circuit diagram of a fifth embodiment; Fig. 19 is a circuit diagram of a switching control unit of the fifth embodiment; Fig. 20 shows the signal waveforms of the fifth embodiment;

  Figure 21 is a main circuit diagram

  pal of a sixth embodiment; and Figure 22 shows the waveforms of

  signals of the sixth embodiment.

  We now describe in detail the pre-

  of the invention.

  Figure 5 is a main circuit diagram of the first embodiment Figure 6 is a circuit diagram of its switching control unit A DC power source 10 comprising a

  battery or the like is connected to power terminals

  voltage input t 1 and t 2 The positive voltage input terminal t 1 is connected to a positive output terminal

  voltage t 1 o via a parallel circuit

  a series of switching elements 1 and 2 and a switching element 9 for back-up The negative voltage input terminal t 2 is directly connected to a

  negative voltage output terminal t 20 A circuit con-

  consisting of a first capacitor C 1 and a switching element 4 in series is connected in parallel to the

  switch 2 above The connected node of the condensa-

  C 1 and switching element 4 is connected

  to the negative voltage input terminal t 2 via the

  of a switching element 3 The negative terminal

  tive voltage input t 2 is connected to terminal po-

  voltage output sitive t 1 o mentioned above by means of

  diary of a circuit of switching elements 7 and 8 in series A circuit consisting of another first

  capacitor C 2 and a switching element 6 in se-

  rie is connected in parallel to the switching element

  tion 8 The connected node of the switching element

  6 and capacitor C 2 is connected to the posi-

  above-mentioned voltage input t 1, by means of

  re of a switching element 5 In addition, the positive voltage output terminal t 10 is connected to the negative voltage output terminal t 20 via

  a smoothing capacitor C 3, called the second

  densifier, a receiver 11 being connected between the terminals

  voltage output nes t 10 and t 20 The switching elements 1,2,3 and 9 above are for example MOSFET transistors Transistors of another type

  are acceptable as switching elements to be used

  read For switching elements 1,5 and 9, a P-channel MOSFET is used, and an N-channel MOSFET is used for switching elements other than the latter. The reason is that, when t MOSFET is used N-channel for switching elements

  1.5 and 9, the current does not become zero when a source

  this fleet at the time of its non-conduction On the other hand, as shown in Figure 7, one can use

  diodes in place of MOSFET transistors for components

  switching elements 3,4,7 and 8 In addition, it is possible to

  place only switching elements 4 and 8 with diodes (see figure 18) Any combination of switching elements and diodes is acceptable

  if it can connect the first capacitors in series

  tors C 1 and C 2, change the order of the series connections, and prevent reverse current from the second capacitor C 3 to the first capacitors C 1 and C 2 Although the MOSFET transistors, including the conduction resistance

  is low, can improve conversion efficiency

  the electrical energy of the converter more than in the case where diodes are used, the use of diodes is more advantageous as regards the price When the circuit is to be produced in the form of an integrated circuit, the diodes can save conductor space, compared to transistors Voltage

  input Vi coming from the positive voltage input terminal

  sion t 1 and the output voltage V O coming from terminal ne-

  voltage output gative t 10 are sent to a unit

  switch control described below.

  As shown in Fig. 6, a reference voltage unit 101 supplies a reference voltage Vr, based on the input voltage Vi, to a unit

  SR control module for the switching regulator

  aforementioned output voltage V O is respectively applied

  to a positive input terminal 102 a and 107 a of amplification

  respective differential sensors 102 and 107 A reference voltage V 1 supplied by a division potentiometer consisting of resistors R 1 and R 2 is applied to a

  negative input terminal 102 b of the different amplifier

  rentiel 102, and a reference voltage V 2 supplied by a division potentiometer made up of resistors in series R 3 and R 4 is applied to a negative input terminal 107 b of the differential amplifier 107 La

  reference voltage Vr is applied to the two potentiometers.

  very division The reference voltage V 1 corresponds

  at the required output voltage V O The reference voltage

  Rence V 2 is set to a value slightly less than V 1 = V 2 The output of the differential amplifier 102

  is applied to a comparator 104, and the output of the am-

  differential plifier 107 is applied to a comparator 108 The output of a triangular wave oscillator 103 is introduced into comparators 104 and 108 Les

  reference voltages V 3 and V 4 supplied by poten-

  division tiometers 109 a and 109 b are respectively

  introduced into the comparators 104 and 108 respectively

  The outputs of the respective comparators 104 and

  108 are respectively sent to the transis-

  respective tors Trl and Tr 2 * The pulse output of the

  Tri transistor is applied to a dissociating circuit

  pulse 105 to be dissociated into pulse signals

  drive O a and O b whose phases are mutually deca-

  lines of 1800 and which are respectively applied to control or excitation circuits 106 a and 106 b The pulse signals O a and O b are the same as those shown in FIG. 2 The pulse signal 0 a supplied to the control circuit 106 a is amplified to be sent to the aforementioned switching elements 4, 6 and 7 respectively (only to the switching element 6 in the embodiment of FIG. 7) O a is

  applied to switching element 1 via

  re of an inversion circuit (not shown) In addition, the pulse signal O b supplied to the control circuit 106 b is amplified to be applied to the aforementioned switching elements 3, 5 and 8 respectively (only at the switching element 2 in the embodiment

  in Figure 7) O b is applied to the switching element

  tion 5 A pulse signal O c coming from the transistor Tr 2 is sent to the control circuit 106 c to be

  inverted, amplified, and sent in the form of O c at 1 '-

  In addition, the control unit SR for the switching regulator,

  which includes the reference voltage unit 101, the bone

  triangular wave cillator 103, differential amplifiers 102 and 107 and comparators 104 and 108, may employ, for example, a control unit

  of double switching regulator type TL 1451 fa-

  bricked by Texas Instruments, Co Ltd. The differential amplifier 102 supplies a voltage Si which is the difference between the output voltage VO and the reference voltage V 1, that is to say the voltage VO desired at the output The comparator 104 compares the voltage 51 and the triangular wave voltage

  52 which is provided by the triangular wave oscillator

  area 103, and it supplies a pulse signal 53 which is at high level when the last voltage exceeds the first The reference voltage V 3 is entered in

  the differential amplifier 104 as a con-

  cut-off voltage sign for overvoltage protection The pulse signal 53 becomes a pulse width modulated signal whose width

  pulse varies according to the value of the voltage Si.

  The signal 53 is applied to the pulse dissociation circuit 105 via the transistor Trlî The pulse dissociation circuit 105 dissociates a pulse from the input pulse signal 53, into two outputs successively and alternately and, as

  shown in Figure 9, it provides the signals

  drive O a and O b which are mutually out of phase with 1800.

  When the pulse signals O a and O b are obtained by dissociation of the pulse signal 53 into two as described above, the activity ratio is 50% or less Consequently, the pulse signals O a and 0 b are not simultaneously high Otherwise

  said, all switching elements 1 to 8 only become

  do not conduct at the same time.

  il The differential amplifier 107 supplies a voltage corresponding to the difference between the output voltage VO and V 2 which is less than VO The output is applied to comparator 108 Comparator 108, in the same way as comparator 104, provides a signal pulse which becomes high in the period when the output of the differential amplifier 107 exceeds the triangular wave voltage 52 The transistor

  Tr 2 which receives this impulse at the input provides the

  general impulse O c shown in FIG. 9 The voltage

  reference voltage V 4 is applied to the differential amplifier 107 as voltage setpoint

  cutout for overvoltage protection.

  We now explain how the

  DC / DC converter constructed as described above.

  Suppose the input voltage is 12 V, the converter output voltage specification

  DC / DC is 5 V, and the allowable range of input voltage

  required is now 7 to 16 V When the voltage

  input voltage is 10 V or more without taking into account the voltage drop of the switching elements, the pulse signals O a, O b, O a and Ob to be applied to the switching elements 1,2,3, 4 and 8 are modulated

  in pulse width, in correspondence of the difference

  between V 2 and V, as indicated above, so that a stable output voltage of 5 V is obtained. More precisely, in the case where the input voltage is

  of 10 V or more (for example 12 V), the switching elements

  tation 1,4, 6 and 7 and the switching elements 2,3,5 and 8 operate alternately When the switching elements 1,4,6 and 7 are in the conducting state and the switching elements 2,3,5 and 8 are in the state

  non-conductive, the situation is represented by a

  equivalent cooked illustrated in FIG. 3 Consequently, the capacitor C 1 is charged with the difference of

  potential V 1 V O (= 12 5 = 7 V), the energy being of

  be part supplied to the receiver 11 by the discharge of the energy charged in the capacitor C 2 At the instant when the pulse of the pulse signal crosses 180, the switching elements 1,4,6 and 7 become unconscious

  conductors and switching elements 2,3,5 and 8 de-

  come drivers The above situation is represented

  sensed by an equivalent circuit illustrated in FIG. 4, the order of the series connections of the capacitors Cl and C 2 is reversed. Consequently, the capacitor C 2 which has been previously discharged is charged with the potential difference V 1 VO of the same way as above On the other hand, the capacitor C1 which was previously charged is discharged to supply energy to the receiver 11 By repetition of this operation at the frequency of the signals

  momentum O a and O b, the energy is successively supplied

  denies the receiver 11 In this situation the condensa-

  smoothing factor C 3 smooths the voltage fluctuations created by the frequency of the pulse signals or by the high frequency resulting from the on / off operation of the switching elements The output voltage VO is fixed by the supply voltage Vi and by the receiver 11 In the case where the output voltage VO is less than V 1 = VO due to a drop in the input voltage due to high consumption of the receiver, the pulse signal 53 is increased and , consequently, the activity ratio of the pulse signals O a and 0 b also increases On the contrary, in the case where the output voltage VO is greater than V 1 = VO due to an increase in the voltage d input or low consumption of the receiver, the activity ratio of the pulse signals O a and O b decreases Figures 9 (a)

  and (b) respectively represent the pulse signals

  sion O a and Obdansle a large receiver and a

small receiver.

  In a converter of this type, when the capacitors C 1 and C 2 are connected in series, we

  cannot maintain the output voltage V O at 5 V when-

  that the input voltage Vi is 10 V or less In fact, when the voltage Vi is little more than 10 V, VO is less than 5 V since there is a voltage drop in the switching elements 1,2 , When the output voltage V is less than V 2, the comparator 107 a supplies a voltage, so that the pulse signal O c shown in FIG. 9 (c) is generated The switching element 9 is made conductive by the pulse signal O c, the DC power source is directly coupled to the smoothing capacitor C 3, and the voltage across the smoothing capacitor C 3 is increased, so that the output voltage V is

  also increased As the voltage of the source of

  DC energy 10 is greater than 5 V, V o becomes V 2 or greater than vl = VO The required output voltage is maintained by this booster circuit, even if the input voltage decreases or if a large one is connected consumer.

  As described above, we obtain a converted-

  CC / CC sor in which the switching element 9 for back-up is provided and the smoothing capacitor C 3 is

charge.

  In the first and second embodiments

  sation shown in Figure 5 and Figure 7, the output voltage V is fixed by the activity ratio of the pulses O a and O b The setting, as explained in

  About Figures 1 and 2, is carried out in the same way

  only for the usual converter With this method

  of, like the second capacitor, i.e. the smoothing capacitor C 3, charges and discharges

  repeatedly, the output voltage V O presents an on-

  dulation We solve the problem of ripple by uti-

  large capacitance smoothing capacitor

  cited but there are limits both to price and to

  same to use In addition, in the case where the report

  activity is weak, the ripple tends to increase.

  In the third embodiment shown

  shown in Figures 10 and 11, transistors are used

  twist as switching elements and the voltage is adjusted

  output V V by their conduction resistance The activity ratio can be set to a little

  less than 0.5, and there is no need to lower

  be the activity ratio below 0.5, which

reduces ripple.

  The operation of this embodiment is explained below. The circuit shown in FIG. 10 differs from that shown in the

  Figure 5 only in that no provision is made for

  switching 9 for backup, and the pulse signal

  sion which controls the conduction of the switching elements

  tion differs from that of the first or second embodiments FIG. 11 represents a circuit for

generate the pulse signal.

  As shown in Figure 11, the voltage

  Vi input is supplied to a reference voltage unit

  rence 112, an overvoltage detection circuit 113 and a pulse generation circuit 114 The reference voltage unit 112 consists of a series circuit of a diode 109, a resistor 110 and d 'a

  Zener diode 111, a cathode of diode 109 being con-

  connected to a Zener diode cathode 111 When the overvoltage detection circuit 113 detects that the input voltage Vi is an overvoltage, its output is applied to the pulse generation circuit 114 to stop the output of the pulse signal generated in the pulse generation circuit 114 The pulse signal emitted by the pulse generation circuit

  114 entered a pulse dissociation circuit

  sion 115 The pulse dissociation circuit 115 supplies two pulse signals Oa and O b, the phases of which

  are mutually different from 1800 and whose reports

  activity ports are less than 50% The pulse signal O a is applied to a control circuit 118 ao, an AND circuit 120, a control circuit 118 a 2 and an OR circuit 121 The control circuit 118 a O is an amplification and inversion circuit and it supplies the pulse signal O a The pulse signal O b is applied to a control circuit 118 bo, a circuit of

  control 118 b 1, an OR circuit 122 and an AND circuit 123.

  The control circuit 118 b O is an amplifier circuit

  fication and inversion and it provides the pulse signal O b A reference voltage Vr is obtained at the connected node of

  resistor 110 and the Zener diode

  111 in the reference voltage unit 112 A voltage

  reference sion V 2, determined from the reference voltage Vr by means of a division potentiometer consisting of resistors R 1 and R 2, is introduced at a

  negative input terminal 119 b of a different amplifier

  rentiel 119, and a reference voltage V 1 obtained from

  drawing of the reference voltage Vr by means of a potentiometer

  division meter made up of resistors P and R is

  applied to a positive input terminal 116 a of an amplifier

* differential ficitor 116 On the other hand, the voltage obtained from the input voltage Vi by means of a division potentiometer consisting of resistors R 5 and R 6 (R 5 R 6) is applied to a terminal of positive input 119 a of a differential amplifier 119, and the aforementioned output voltage VO is applied to a

  negative input terminal 116 b of the different amplifier

profitable 116.

  The aforementioned reference voltage V 1, in the same way as in the first embodiment, fixes

  the required output voltage V O The reference voltage

  rence V 2 is fixed at a slightly lower value

  at the voltage VO The output of the amplifier differs

  ferential 119 has entered binari circuits

  respective stations 124, 125, 126 and 127 The binarization circuits 124, 125, 126 and 127 are circuits which supply high (low) level signals in the case where the input voltage is lower (higher)

  at a threshold value The respective outputs of the circuits

  binarization 124, 125, 126 and 127 are respected

  tively applied to the inputs of an OR circuit 121, an AND circuit 120, an OR circuit 122 and an AND circuit 123 The inputs of the AND circuits 120 and 123 coming from the binarization circuits 125 and 127 are active at the low state On the other hand, the output of the OR circuit 121 is applied to the input of a control circuit

  118 a P the output of circuit ET 120 to a circuit of pi-

  lot 118 al, the output of the circuit OR 122 to a circuit

  pilot baking 118 b 2, and the output of the ET 123 circuit

  to a control circuit 118 b 3 The output of the amplifier

  differential cator 116 is applied to a control voltage circuit 117, and the control voltage Vs at the output thereof is applied to the control circuits

  control 118 a 2 and 118 b 1 The control voltage circuit

  of 117 provides the required control voltage (MOSFET gate voltage) which must adjust the resistance of

  conduction of the respective MOSFET of the commu-

  aforementioned tation 2 and 6, depending on the voltage entered therein In other words, the control voltage V is supplied to the MOSFET as the gate-source voltage VGS of the MOSFET illustrated in FIG. 12 The voltage range

  of the control voltage Vs is fixed so that

  set the conduction resistance setting (or

  of the drain current IO) of the MOSFET The pulse signals

  sion O a, O a, O a 1 and O a respectively issued by the cir-

  control circuits mentioned above 118 a, 118 a 1, 118 a 2 and 118 a 3 are applied to respective switching elements 1, 4, 6 and 7, and the pulse signals job, O b 1, O b and 0 b respectively emitted by the control circuits 118 bo, 118 b 1, 118 b 2 and 118 b 3 are applied to elements

  respective switching elements 5, 2, 3 and 8.

  Figure 12 shows a feature

  an N-channel MOSFET used for components

  mutation 2, 3, 4, 6, 7 and 8 We understand that, when the grid voltage source VGS is 4 V or more, a sufficient drain current flows and, when it is less than 4 V, a drain current corresponding to

  the value of the voltage VGS circulates In this mode of

  reading, the pulse signals O a and O b control

  the conduction / non-conduction of the switching elements

  tion depending on what the gate-source voltage

  of 4 V or more is applied or not

  pulse O a 1 and Ob 1 control not only the conduction / non conduction of the switching elements but also the conduction resistance (or drain current) of the switching elements by application of the voltage

of 4 V or less.

  We now explain how the

  DC / DC converter constructed as described above.

  We assume that the input voltage is

  12 V, the output voltage specification of the conver-

  DC / DC weaver is 5 V, and the allowable range of the required input voltage is now 7 to 16 V. When the input voltage is 10 V or more regardless of the voltage drop due to the conduction resistance of the switching elements, a stable output voltage of 5 volts is obtained by sending the aforementioned pulse signals O a, Ta, O a 1, O b, O b and 0 b 1 to the switching elements 1 , 2,3, 4 and 8 In this situation, the voltage of the pulse signals is

  greater than 4 V The 116 differential amplifier

  protects the output voltage VO with V 1 = VO When the output voltage VO varies, the differential amplifier 116 supplies a voltage corresponding to the voltage variation at the control voltage circuit 117 The control voltage circuit 117 supplies a voltage command Vs linked to the voltage difference between the output voltage VO and the reference voltage V 1, for supply to the control circuits 118 a 2 and 118 b 1 The pulse signals Oa and O b are respectively applied to the circuits of control 118 a 2 and 118 b 1, and the control circuits 118 a 2 and 118 b 1 respectively provide,

  as shown in Figures 13 (c) and (d), the si-

  pulse signals O a 1 and O b 1 whose amplitudes vary in response to the control voltage Vs In addition, in the case where the input voltage Vi divided by the resistors

  R 5 and R 6 is greater than V 2, the differential amplifier

  tiel 119 provides a high level signal, all the outputs of the binarization circuits 124, 125, 126 and 127 are in the low state, and the control circuits

  118 to 3 and 118 to 1 provide a pulse signal O a, com-

  me represented in figure 13 (a) The circuits of

  control 118 b 2 and 118 b 3 provide an impulse signal

  sion 0 b, as shown in FIG. 13 (b) The MOSFET of the switching elements 6 and 2 which have received the pulse signals O a 1, O b 1, respectively, is subject to the aforementioned conduction resistance adjustment. next, the adjustment of the conduction resistance of the MOSFET of the switching elements 6 and 2 regulates the charge current supplied to the smoothing capacitor C 3 so as to adjust the charging voltage of the smoothing capacitor C 3 More precisely, when the voltage of VO output decreases due to high consumption of the receiver, the control voltage Vs increases and, as shown in dotted lines in FIGS. 13 (c) and

  (d), the amplitude of the pulse signals O a 1.0 b 1 aug-

  When the output voltage increases due to

  low consumption of the receiver, as shown

  felt in solid lines, the amplitude of the pulse signals

  Zion O a 1 and O b 2 decreases, so that the switching elements 6 and 2 are controlled in conduction / non-conduction and that the adjustment of the conduction resistance

  is carried out, to adjust the charge current of the condenser

  smoothing factor C 3, thus stabilizing the tension

output V to V.

  On the other hand, also in this third embodiment, in the case where the input voltage Vi decreases to 10 V or less, it is not possible to obtain the

  output voltage of 5 V In cases where the input voltage

rée Vi decreases and Vi 1 R 6

R 5 + R 6

  is less than the reference voltage V 2 or less,

  the differential amplifier supplies a voltage at

  see the binarization circuits 124, 125, 126 and 127.

  All binarization circuits emit high level signals Consequently, the outputs of the OR circuits 121 and 122 always become high, as

  shown in Figure 14 (a), so that the ele-

  switching elements 7 and 3 both remain in the conductive state On the other hand, the outputs of the AND circuits

  and 123 always become low, as re-

  shown in Figure 14 (b), so that the switching elements 4 and 8 both remain in the non-conductive state The pulse signals O a and O b applied

  to the control circuits 118 a O and 118 bo, as shown

  felt in FIGS. 14 (c) and (d), are the same as in the case of FIG. 13 The amplitude of the pulse signals O a and O b of the control circuits 118 a 2 and 118 b 1, as shown in FIGS. 14 (e) and (f), varies as a function of the control voltage V, and the two switching elements 6 and 2 are subjected to the aforementioned conduction resistance adjustment In this way, when the input voltage Vi decreases so that the required output voltage VO 'is not obtained the two switching elements 3 and 7 become conductive, the two switching elements 4 and 8 become non-conductive, the switching elements 1 and 2 are alternately conductive / non-conductive

  and the switching elements 5 and 6 are alternating

  conductive / non-conductive, all the switching elements being shown in FIG. 10,

  so that capacitors C 1 and C 2 are charged di-

  directly or alternately with the input voltage Vi Since the charged energy is supplied to the

  smoothing C 3 via the switching elements

  tion 2 and 6, the lowering of the output voltage V O due to the lowering of the input voltage Vi is prevented The acceptable input voltage range

  can be increased Since the charging current ve-

  from capacitors C 1 and C 2 for capacitor C 3

  is determined by the conduction resistance of the elements

  switching elements 2 and 6, the charging voltage from-

  comes appropriate and therefore the output voltage

V also becomes appropriate.

  In addition, it is desirable to provide the e-

  energy from the smoothing capacitor C 3 to the receiver 11 after having supplied it to a smoothing circuit consisting of a coil and a capacitor in order to eliminate the

transient noises.

  In the present embodiment, the conduction resistance of the N-channel MOSFETs is adjusted. The same effect is obtained when the resistance is adjusted.

  of conduction of P-channel MOSFETs (switching elements

  tion 1 and 5) In this case, the cost is not determined

  charging current of capacitor C 3, but the charging current of capacitors C and C 2 is acted on. Such a construction, to regulate the conduction resistance of a plurality of switching elements which become conductive at the same time, is also acceptable.

  In addition, as in the case of the second embodiment,

  tion shown in Figure 7, the commu-

  3,4,7 and 8 or only the commu-

  tation 4 and 8 can be replaced by diodes.

  In the embodiment shown in FIG. 10, the first capacitors Ci and C 2 are charged with the voltage Vi when the input voltage Vi decreases, and the second capacitor C 3 is charged with the above charge, but the construction below is also acceptable, in which a switching element 9 for backup is provided as in the embodiment of FIG. 5, the capacitor C 3 being

  directly charged with the input voltage Vi applied

  between its terminals Figures 15 and 16 represent

  the fourth embodiment conforms to this principle.

  The circuit shown in FIG. 15 is entirely

  identical to the circuit shown in figure The construction of the switching control unit shown in figure 16 differs a little from

  the one shown in Figure 11 More specifically

  The circuit after the outputs of the differential amplifiers 116 and 119 and the output of the pulse generation circuits 114 is different.

the various parts below.

  When the pulse generation circuit 114 outputs a pulse signal, the pulse signal is applied to the pulse dissociation circuit

  , which is the same as in the third mode

  and to an ET 130 circuit The dissociation circuit

  pulse ciation 115 provides pulse signals

  0 a and O b which are the same as in the real modes

  The above-mentioned pulse signal O a is applied to control circuits 138 a and 138 a 1, and the signal

  impulse Ob is applied to control circuits

  ge 138 b O and 138 b 1 The output of the differential amplifier 119 is sent to the input of the AND circuit 130

  the output of which is sent to a control circuit 138 c.

  In addition, the output of the aforementioned differential amplifier 116 is sent to a first control voltage circuit 117 and to a second voltage circuit.

  131 The first control voltage circuit

  of 117 provides the aforementioned required control voltage Vs which must adjust the conduction resistance of the MOSFET

  respective switching elements 2 and 6.

  The control voltage Vs is applied to the

  respective driving circuits 138 a 1 and 138 b 1 The two

  xth control voltage circuit 131 supplies a control voltage V 50 acting in the same way as the aforementioned control voltage circuit 117 The control voltage Vso is applied to the control circuit 138 c The pulse signal O a 1 supplied by the circuit

  138 a 1 is supplied to the switching element

  tion 6, the pulse signal O supplied by the control circuit 138 a O to the switching elements 4 and 7, and the inverted pulse signal O a to the switching element 1 The pulse signal O b provided by the

  control circuit 138 b O is sent to the control elements

  mutation 3 and 8, and the reverse pulse signal O b at switching element 5 The pulse signal O b sent by the control circuit 138 b 1 is sent

  to switching element 2 The ET 130 circuit trans-

  puts the pulse signal on the control circuit 138 c by transmission of the output pulse of the pulse generation circuit 114 in accordance with the output of the differential amplifier 119 in the case where the input voltage Vi is lower to the tension

  reference V 2 The pulse signal O c coming from the circuit

  pilot cue 138 c is sent to the switching element

  tion 9 The control circuits 138 a 1 138 b and 138 c are circuits which increase or decrease the amplitude of the input pulse signals, depending on the high / low state of the control voltage Vs or Vso . We now explain how the

  fourth embodiment The operation, when

that the entry Vi R 6

R 5 + R 6

  of the differential amplifier 119 is greater than

  the reference voltage V 21 is the same as in the third

  sith embodiment, the charging currents of the capacitors C 1 and C 2 which charge and discharge alternately and repetitively being controlled by the conduction resistance of the switching elements

  2 and 6, so that the voltage is stably obtained

  sion specified by V 1, i.e. an output voltage of 5 V for example Figures 17 (a) to (d) illustrate O a,

  0 b and O a 1 and O b 1 when the amplitude varies.

When Vi R 6

R 5 + R 6

  is less than V 2, the differential amplifier 119

  provides a high level signal as input to a circuit

cooked AND 130.

  ET circuit 130 provides the signal

  pulse O c entered from the pulse generation circuit 114 The control circuit 118 c provides the pulse signal Oc, as shown in FIG. 17 (e), for the conduction / non-conduction control of the element switching 9 extra In the period

  o switching element 9 for back-up is conducted

  tor, the DC power source 10 is directly coupled to the smoothing capacitor C 3, to raise the voltage of the smoothing capacitor C 3, thus preventing the output voltage from lowering

  V O supplied to the receiver 11 The amplitude of the signal

  pulse Oc increases, as shown in dotted lines in FIG. 17 (e), when the input voltage Vi is lower than the predetermined value of the output voltage V 0, in accordance with the control voltage V 50 supplied in response to the output voltage VO Par

  Consequently, the charging current of capacitor C 3 increases

  lie or decrease in response to the input voltage Vi which stabilizes the output voltage V O even when the input voltage Vi is lowered, which increases the

  acceptable input voltage range.

  In the fifth embodiment, re-

  shown in Figure 18, the switching elements 4 and 8 of the first embodiment are replaced

  by diodes 40 and 80, and a low-pass filter

  taking an inductance L O and a capacitor C is pre-

  seen on the output stage Loud noise,

  gaining the switching of the switching elements, are

  generated at the front and rear edges of the pulse signals

  Zion O a and O b The aforementioned low-pass filter absorbs parasitic noise, so that a DC voltage with little parasitic noise and ripple is supplied to the receiver 11 This embodiment is economically advantageous because of the use of

diodes 40 and 80.

  The operation of this embodiment is as follows In the case where the input voltage Vi is greater than twice the required output voltage

  VO, an order for the activity report of the

  impulse signals O a and O b either 50% or less is ef-

  performed in the same way as in the first embodiment in order to obtain VO, and, in the case where the input voltage V 1 is less than twice the required voltage V 0, a command so that the ratio of activity of the pulse signals O a and O b i.e. from O to 100% is

  to obtain V When the activity report

  pulse signals O a and O b exceeds 50%, there is a period where these signals are both high During this period, the capacitors C 1 and C 2 are connected in parallel and are charged with the input voltage Vi Consequently, the voltage of

required output V O is ensured.

  Figure 19 is a circuit diagram of the

  nite for switching control of the circuit represented in FIG. 18 Components similar to those of FIG. 6 are designated by the same references The output signal Si of the differential amplifier 102

  is introduced into comparator 104 and into a circuit

  level 1020 conversion cooked The output 52 of the bone

  triangular wave cillator 103 is also

  yée to the level 1020 conversion circuit The level 1020 conversion circuit supplies, as described below, the signal Si obtained by loading the voltage level of the signal Si, then supplying the signal Si to the comparator 108 The other inputs of the comparators

  194 etl O 8 are the triangular wave 52.

  The outputs 53 'and 53 of the respective comparators

  tifs 108 and 104 are sent to the transistors Tr 2 and Tri

  respectively, as a result of which the impulse signals

  Zion O a and Ob are generated The pulse signal O a is amplified in the control circuit 106 a and the control and inversion circuit 106 a ', the output Oa of the circuit

  106 a being applied to the commu-

  tation 6 and 7 and the output O a of the control circuit and

  switch 106 a 'being applied to the switching element

  tion 1 The pulse signal O b is amplified in the control circuit 106 b and in a control circuit

  and inversion 106 b ', the output O b of the pilot circuit

  step 106 b being applied to switching element 5, and the output O b of the piloting and reversing circuit 106 b 'being applied to switching elements 2 and 3 Figure 20 (a) represents the waveforms and the

  levels of the respective signals in the case where Vi is su-

  i greater than twice V 1 (= V 0) obtained from the reference voltage Vr by means of the division potentiometer formed by the resistors R 1 and R 2 The output 53 of the comparator 104, which compares SI representing the difference between VO and V 1 with the triangular wave 52,

  becomes 50% or less in activity report, as re-

  presented in the figure, O b, O b being generated in a cor-

  corresponding to the above The level conversion circuit 1020 calculates the difference Vs (= Vsl VS) between the voltage Vsl of the signal Sr and the DC component Vs of the signal 52 and it supplies the signal s.

  If 'having the level of Vsl, = Vs A Vs By cons-

  quent, the output 53 'of comparator 108, which compares the

  signal Si 'and the triangular wave 52, is such that re-

  presented in the figure, the phase of the inversion signal 53 'being shifted by 180 from that of the signal 53 As the transistors Tr 2 and Trl reverse the input signals 53' and 53 respectively, their respective outputs are 0 a and O b When the input signal Vi is lowered, VO

  decreases faster than V 1, the output Si of the comparison

  tor 102 being lowered as shown in the figure

  (b) Consequently, the relation between Si and Si 're-

  comes to the case of figure 20 (a), so that 53 (O b) and

  53 '(O a) have waveforms with an activity ratio

50% or more.

  In addition, the charge in this embodiment

  tion is carried out by parallel connection of capacitors C and C 2 to supply 10, while

  that that of the third embodiment is carried out

  killed by connection of capacitors C (1 and C 2 indivi-

  dual It is also possible, in the fifth

  mode of realization, to carry out the adjustment of the resistance

  conduction tance of one or other of the elements of

  switching, to control the load current.

  The sixth embodiment represented in FIG. 21 comprises the capacitor Ci and the inductance Li at the input stage. The construction is on the other hand the same as in the fifth embodiment. FIG. 22 represents a signal waveform of this embodiment In the circuit, it should be noted that the value of the voltage V on the input side of the switching unit is lowered by the voltage drop due

  the existence of inductance Li, compared to the tension

  viion of the continuous current energy source 10 The electrical energy transmission efficiency e of the

  DC / DC converter is represented by the equation below

  after: e = output voltage X 100% (1) input voltage For example, if the input voltage is

  12 V and the output voltage is 5 V, the condensa-

  Since C 1 and C 2 are connected in series, e is represented

  felt by the following equation: e = 5 X 100 = 83.3% In the case where the input voltage Vi is 10 V or less, for example 9 V, e is represented by the equation below after: e = 5 X 100 = 55.6% In the sixth embodiment, since the

  input voltage can be made different from the voltage

  sion of the DC power source 10 and brought to a lower value Ve, the denominator of equations (1) becomes smaller, from the difference between the voltage of the source and Ve, so that one obtains

  high efficiency and transmission of electrical energy

  It is also possible to provide, in all of the first to fifth embodiments, the capacitor

  Ci and the inductance Li on the input stage.

Claims (15)

  1 DC / DC converter of the switched capacitor type, characterized in that it comprises: a plurality of first capacitors (C 1, C 2) charged by a DC power source; a second smoothing capacitor (C 3), which is charged by said first capacitors and which is connected to a receiver (11); a switching unit which includes a   plurality of switching elements (1 to 8) arranged in   be the first capacitors and the DC power source, and between the first capacitors and   the second capacitor, which connects the most   reality of first capacitors and who is capable of   change the order of the serial connections according to the com-   conduction / non-conduction pairing of the plurality of switching elements; a switching control unit (SR) for periodically changing said order of the serial connections; and a switching element (9) for back-up,   which directly couples said energy source in   continuous rant at the second capacitor.   2 converter according to claim 1,   characterized in that said switching unit comprises   carries diodes to prevent reverse current going   from the second capacitor to the first capacitors.   3 Converter according to claim 1   or 2, characterized in that it further comprises an induc-   tance inserted between the current energy source   DC and the first capacitors (C 1 and C 2).   4 DC / DC converter of the switched capacitor type, characterized in that it comprises: a plurality of first capacitors (Cl, C 2) charged by a DC power source; a second capacitor (C 3) for smoothing, which is charged by said first capacitors and which is connected to a receiver (11); a switching unit which has a plurality of semiconductor switching elements (1 to 8) disposed between the first capacitors and the   DC power source, and between the pre-   first capacitors and the second capacitor, and which   is able to daisy chain the plurality of pre-   better capacitors and change the order of the terminals   xions in series according to the conduction / non-conduction combination of the plurality of semiconductor switching elements; and a switching control unit which periodically changes said order of the series connections by conduction / non-conduction control of said elements   semiconductor switch, and which regulates the resistance conduction tance.   5 Converter according to claim 4, characterized in that the switching elements the conduction resistance of which is to be adjusted are located   between the DC power source and the pre- better capacitors.   6 converter according to claim 4, characterized in that the switching elements, the conduction resistance of which must be adjusted, are located   between the first capacitors and the second condenser sator.   7 converter according to claim 4,   characterized in that said switching unit comprises   carries diodes to prevent reverse current from   flow from the second capacitor to the first con- densifiers.   8 Converter according to one of the claims   tions 4 to 7, characterized in that it further comprises an inductor to be interposed between the energy source in   direct current and the first capacitor.   9 Converter according to one of the claims   tions 4 to 8, characterized in that it further comprises a switching element (9) for back-up, which directly couples said DC energy source with the second capacitor.   DC / DC converter of the condensing type   switched torers, characterized in that it comprises: a plurality of first capacitors (C 1, C 2) charged by a DC energy source; a second capacitor (C 3) for smoothing, which is charged by said first capacitors and is connected to a receiver (11);   a switching unit which includes a plurality of   reality of semiconductor switching elements available   between the first capacitors and the power source   direct current, and between the first condensa-   teurs and the second capacitor, and who is capable   to connect the plurality of first condensers in series   and change the order of the series connections, or who is able to connect the first capacitors in parallel, depending on the combination of conduction / no   conduction of the plurality of semi-switching elements   conductors; and a switching control unit which periodically changes said order of the serial connections by conduction / non-conduction control of said semiconductor switching elements, adjusts the conduction resistance of semiconductor switching elements and connects the first capacitors in parallel by   conduction / non-conduction control of the components   semiconductor mutation in a predetermined case.   11 Converter according to claim 10, characterized in that the switching elements of which   the conduction resistance must be adjusted, can be found   wind between the DC power source and the first capacitors.   12 Converter according to claim 10, characterized in that the switching elements, the conduction resistance of which must be adjusted, are located   between the first capacitors and the second condenser sator.   13 Converter according to one of the claims   tions 10 to 12, characterized in that said switching unit comprises diodes to prevent reverse current from flowing from the second capacitor to the first capacitors.   14 Converter according to one of the claims   cations 10 to 13, characterized in that it comprises in or   be an inductance interposed between the energy source   in direct current and the first capacitors.   DC / DC converter of the condensing type   switched torers, characterized in that it comprises: a plurality of first capacitors (C 1, C 2) charged by a DC energy source; a second capacitor (C 3) for smoothing, which is charged by said first capacitors and which is connected to a receiver (11); a switching unit which includes a plurality of   reality of switching elements arranged between the   better capacitors and the current energy source   continuous, and between the first capacitors and the two   xth capacitor, and which is capable of connecting in series a plurality of first capacitors to the power source and of changing the order of the connections in series,   or connect them individually to the power source   gie, according to the combination of conduction / non-conduction of the plurality of switching elements; and a switching control unit which   periodically changes said order of connections to se-   laughs by command of conduction / non conduction of said   switching elements, and which connects the first con-   individually at the energy source in a predetermined case.   16 Converter according to claim 15,   characterized in that said switching unit comprises   carries diodes to prevent reverse current from   flow from the second capacitor to the first con-   densifiers. 17 Converter according to claim or 16, characterized in that it further comprises a   inductance interposed between the current energy source   continuous rant and the first capacitors.   18 Converter according to one of the claims   cations 15 to 17, characterized in that part or the   all of said switching elements are elements   semiconductor switching elements, and said unit   switch control adjusts the resistance   duction of semiconductor switching elements.