FR2496993A1 - VARIABLE CAPACITOR - Google Patents

Abstract

THE PRESENT INVENTION RELATES TO A VARIABLE CAPACITOR. ACCORDING TO THE INVENTION, IT INCLUDES A MASS OF A SEMICONDUCTOR CRYSTAL 11 HAVING AT LEAST ONE SLOPING SURFACE 20; A DIELECTRIC LAYER CONTROL SECTION 16, 17, PROVIDED FOR THE SLOPING SURFACE; A 13 CAPACITY READING SECTION PROVIDED ON ANOTHER GROUND SURFACE; A MEANS FOR APPLYING A REVERSE POLARIZATION TENSION TO THE CONTROL SECTION; AND A VARIABLE TENSION SOURCE 26 TO APPLY THE REVERSE POLARIZATION TENSION. THE INVENTION APPLIES IN PARTICULAR TO ELECTRONICS.

Description

1. The present invention relates to a variable capacitor enabling

to obtain a variation r

  regular and moderate capacity.

  A PN junction diode is generally used as the variable capacitance diode because when a reverse bias voltage is applied to the PN junction the carriers near the junction move to thereby form a dielectric layer and the thickness of the dielectric.

  dielectric layer is subjected to the polarization voltage

opposite.

  Such a traditional diode forming condensate

  variable voltage generator has a structure such that an electrode to which the bias voltage is applied serves

  also electrode to read the capacitance variation.

  Therefore, silln uses a mass with a concentration

  regular treatment, the characteristic of the variation of

  capacity is such that this variation of capacity is

  relatively moderate when a high voltage polarization

  This is followed by the need to control the diffusion profile by implantation of ions and S analogues. This represents a difficulty for the production of such devices and even if the control of the diffusion profile can be accomplished, it can be done only over a narrow range. Moreover, because of the structure described above, the design of the circuit is somewhat restricted. Moreover, with a supply voltage of S

  the order of 12V, which is a standard voltage in a

  ture and others, the thickness of the dielectric layer r formed according to the movement of the carriers is also

restraint.

  The present invention aims to solve

  the disadvantages mentioned above.

  According to the present invention there is provided a variable capacitor which comprises: E a mass of a semiconductor crystal having at least one sloping surface; - I I j. a dielectric layer control section provided under the sloped surface; a reading section of the capacity provided on another surface of the mass; means for applying a polarization voltage

  reverse the dielectric layer control section.

  cudgel; and a source of voltage -IariablIe to apply the bias voltage invlerse, The invent-ion will be small Co.-moseet d: other -'ut's

  characteristics, details and ava. -n of. = 1i = c.

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on the drawings.

  The figure shows a section i. e2 -etion, according to a PN variable capacitor 10. A mass of a semiconductor crystal having a N-type material having two sloping surfaces and a horizontal upper surface. In a central portion of the upper surface is formed a P-type region 12 as a first PN junction .A capacitance reading electrode 13 made of a metal material is formed in contact with the P-type region 12. Along the two sloping surfaces 20 placed on both sides of the P-type region 12, are received from other P-type regions 14 and 15 to form a second PN junction and a third PN junction, respectively. respective regions 14 and 15 of the P type are formed of control electrodes (bias electrodes) 16 and 17 made of a metallic material, along the bottom of the mass l1

  is formed an ohmic electrode 18 (opposite electrode).

  With this arrangement, when the reverse bias voltage VB is applied to the second and third PN junctions formed along the sloping surfaces 20, by a variable voltage source, the thickness of a dielectric layer 19 which is formed under the

  first PN junction varies moderately due to the existence

  This sloping surface 20. The capacitance variation is read at the capacitance reading electrode 13. Thus, the structure as shown in FIG.

  as a diode with variable capacity.

  Figure 2 showsin another embodiment according to the invention o is illustrated a real structure of a variable capacitor 21 Schottky. Between the upper surface of the mass 11 of the semiconductor crystal of a N-type material with the sloping surfaces 20 and a

  electrode 22 readability of a metal material

  that, is formed a barrier of Schottky. On both sides of the barrier and along the sloping surfaces 20 are formed the P-type regions 14 and 15 as first and second PN junctions, respectively. The control electrodes (polarisalon electrodes) 16 and 17 made of a metallic material are formed in contact with regions 14 and 15 of the type Prespectively. Moreover, the ohmic electrode (opposite electrode) 18 is formed on

along the bottom of the mass 11.

  With this arrangement, when a reverse bias voltage is applied to the first and second PN junctions formed along the sloping surfaces 20, the thickness of the dielectric layer 19 then formed under the Schottky barrier, varies moderately due to the presence Sloping surfaces 20. The capacitance variation then caused is read at the capacitance reading electrode 22. Thus, the structure shown in Figure 2

  also works as a diode with variable capacity.

  FIG. 3 shows another embodiment of the invention where the actual structure of a variable capacitor called MIS 23 is illustrated. The mass of the semiconductor crystal 11 of a N-type material has sloping surfaces along the surface. of which are formed the first and second PN junctions 14, 15, respectively. The control electrodes (bias electrode) 16 and 17 made of a metallic material are formed in contact with the P-type regions 14 and 15. Furthermore, at the upper surface of the mass 11 there is provided an insulator 24 which is stretched between the regions 14 and 15 of type P. An electrode

  capacity reading is provided on the isolator 24.

  Indeed, a MIS structure is formed on a central part.

  tral of the upper surface which is one of the upper surfaces of the mass 11. Moreover, the ohmic electrode (opposite electrode) 18 is provided along the bottom

or bottom of the mass 11.

  With this arrangement, when a reverse bias voltage is applied to the first and second PN junctions formed along the sloping surfaces 20, the thickness of the dielectric layer 19 formed under the MIS structure varies moderately due to the presence of the surfaces. slope 20. The variation of capacity then

  caused is read at the capacitance reading electrode.

  Thus, the structure as shown in FIG.

  also serves as a diode with variable capacity.

  In fact, the capacitor as described above works in the same way if the Netlarthdmi type P type region are formed in the opposite way. Without being restricted to the capacity reading section, the dielectric layer control section may also have a PN junction structure, a barrier structure of

Schottky or MIS structure.

  Figure 4 shows an equivalent circuit used

  in each of the variable capacitors of the modes of

  described above. Terminals a and b are polarization terminals for applying the reverse bias voltage to the first and second pnN junctors respectively, while terminals c and d are capacitance reading terminals for reading the variation of

the capacity.

  If C0 denotes the difference in capacitance obtained when the bias voltage of the Schottky barrier is zero and the polarization voltage of the MIS structure is zero without taking into consideration

  slip on flat tape and if CD indicates the diffi-

  As a result of the capacity gap obtained as the dielectric layer 19 increases, the capacitance difference C read at each of the capacitance reading sections (the electrodes 13, 22 and 25) can be expressed as follows.

1 =, 1 .. * .. * .. **** @ (1)

C O C0CD

  On the other hand, if the thickness of the dielectric layer is designated d, the electrode surface

  by S and the dielectric constant of the semi-crystalline

  conductor by E, respectively, the capacitance difference C of the dielectric layer can be expressed as follows D CD = Es S / d ...........

  (2) In order to design the variable capacitor so ... DTD: that it has a significant proportion of capacitance variation

  cited, the CD capacity can be studied to be low compared to the C0 capacity as is apparent from the reading of the expression (1), and the thickness of the layer

  dielectric d can be important.

  Traditionally, the thickness d of the dielectric layer is greatly limited due to the structure of the variable capacitor having only one electrode serving as a bias electrode and the electrode is capacitated. According to the present invention, however, the PN junctions are formed along the sloping surfaces, the thickness d of the dielectric layer 19 may vary moderately even if the supply voltage is of the order of 12V as mentioned above. above and the dielectric layer 19 can consequently become remarkably important in comparison with a traditional layer. Therefore, one can expect a remarkable increase in the variation of the capacity then read. Moreover, the variable amplitude of the capacitance with respect to the voltage can be designed so

appropriate.

  In particular in the structure MIS shown in FIG. 3, the proportion of variation of the capacitance Cmax / Cmin is expressed as follows: ## EQU1 ## .... (3) Cmin do B ú0 d The letter dO0 designates the thickness of the insulator

  24 and E0 is the dielectric constant of the insulator 24.

  With this arrangement, it is easy to raise the proportion

  about 70, which is extremely

  5 (a), (b) and (c) each illustrate another embodiment according to the invention. Figure 5 (a) shows a structure of an integrated circuit o a number of variable capacitors of the junction type

  PN are integrated in the mass 11 of the semi-conductar crystal.

  Variable capacitors are in alignment to allow

  thus to the device to obtain completely a character-

  desired capacity variation. In this case, the respective variable capacitors may be designed to have different characteristics of capacitance or

  to be used independently.

  Fig. 5 (b) illustrates a structure of the mass where also the central portion of the substrate for forming the capacity reading section comprises sloping surfaces 20 '. Thus, as the growth of the dielectric layer 19 receives another variation, a different capacitance variation characteristic can be obtained.

  Figure 5 (c) illustrates a structure of the mass

  o a number of variable capacitors are provided in the mass 11 of the semiconductor substrate in alignment in its longitudinal direction. The mass as constructed above can be used as it

  is if variable capacitors are connected in

  or otherwise it may be used as a part obtained by cutting it to the parts indicated by the

  dotted lines on the drawing.

  The sloping surfaces in the embodiments described above may receive a desired slope by means of known mechanical grinding means. On the other hand, by selecting a material having a specific crystal as a mass and choosing a suitable chemical attack liquid to thereby force the liquid to react on the mass, sloping surfaces having

  desired slope in all positions on the mass.

  As described above, since the present invention is arranged so that the thickness of the dielectric layer varies moderately by the fact that the dielectric layer control section is formed along sloping surfaces, the dielectric layer can grow significantly, thereby increasing the variation in capacity. On the other hand, although two dielectric layer control sections are provided for the application of the bias voltage by the control electrodes (bias electrodes) in the embodiments described above, the number of the control sections of the dielectric layer may be one or more only if the growth of the dielectric layer below the capacitance reading section can be effectively controlled.

Claims (9)

R E V E N D I C A T I 0 N S   A variable capacitor characterized in that it comprises: a mass of a semiconductor crystal (11) having at least one sloping surface (20); A dielectric layer control section (16, 17) provided under said sloping surface; a capacity reading section (13) provided on another surface of said mass;   means for applying a polar voltage   inverse to said dielectric layer control section; and a variable voltage source (26) for applying   said reverse bias voltage.   Capacitor according to Claim 1, characterized in that two or more sloping surfaces are formed and in that the control section of   dielectric layer mentioned above is provided under each said sloping surfaces.   3. Capacitor according to claim 2, characterized in that the surface of said mass on which is formed capacitance reading section aforementioned is sloping.   4. Capacitor according to any one of   preceding claims, characterized in that the   Ability reading section above has an MIS structure. 5. Capacitor according to any one of   Claims 1 to 3, characterized in that the section   capacity reading has a barrier structure of Schottky.   6. Capacitor according to any one of   Claims 1 to 3, characterized in that the section   reading of the aforementioned capacity has a structure to PN junction.   7. Capacitor according to any of   Claims 1 to 3, characterized in that the section of   said dielectric layer control has an MIS structure. 8. Capacitor according to any one of   Claims 1 to 3, characterized in that the section of   dielectric layer control mentioned above has a structure Schottky barrier.   9. Capacitor according to any one of   Claims 1 to 3, characterized in that the section of   dielectric layer control mentioned above has a structure PN junction.