FR2056894A1 - - Google Patents

Info

Publication number: FR2056894A1
Authority: FR; France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Application number

FR6926199A

Other languages

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

INFORMATIQUE CIE INTERNA

Original Assignee

INFORMATIQUE CIE INTERNA

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1969-07-31

Filing date

1969-07-31

Publication date

1971-05-07

1969-07-31 Application filed by INFORMATIQUE CIE INTERNA filed Critical INFORMATIQUE CIE INTERNA

1969-07-31 Priority to FR6926199A priority Critical patent/FR2056894A1/fr

1970-07-29 Priority to GB36748/70A priority patent/GB1269301A/en

1970-07-30 Priority to DE2037811A priority patent/DE2037811C3/en

1971-05-07 Publication of FR2056894A1 publication Critical patent/FR2056894A1/fr

1972-11-09 Priority to US27779D priority patent/USRE27779E/en

Status Pending legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Exchange Systems With Centralized Control (AREA)
Data Exchanges In Wide-Area Networks (AREA)
Multi Processors (AREA)
Bus Control (AREA)

FR6926199A 1969-07-31 1969-07-31 Pending FR2056894A1 (en)

Priority Applications (4)

Application Number	Priority Date	Filing Date	Title
FR6926199A FR2056894A1 (en)	1969-07-31	1969-07-31
GB36748/70A GB1269301A (en)	1969-07-31	1970-07-29	Numerical data processing systems
DE2037811A DE2037811C3 (en)	1969-07-31	1970-07-30	System for processing numerical information with a central storage of rather large capacity
US27779D USRE27779E (en)	1969-07-31	1972-11-09	Numerical data processing system

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
FR6926199A FR2056894A1 (en)	1969-07-31	1969-07-31

Publications (1)

Publication Number	Publication Date
FR2056894A1 true FR2056894A1 (en)	1971-05-07

Family

ID=9038361

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
FR6926199A Pending FR2056894A1 (en)	1969-07-31	1969-07-31

Country Status (4)

Country	Link
US (1)	USRE27779E (en)
DE (1)	DE2037811C3 (en)
FR (1)	FR2056894A1 (en)
GB (1)	GB1269301A (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
FR2465269B1 (en) *	1979-09-12	1985-12-27	Cii Honeywell Bull	ASYNCHRONOUS REQUEST SELECTOR IN AN INFORMATION PROCESSING SYSTEM
US4788640A (en) *	1986-01-17	1988-11-29	Intel Corporation	Priority logic system
US5341510A (en) *	1987-05-01	1994-08-23	Digital Equipment Corporation	Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor
US4941083A (en) *	1987-05-01	1990-07-10	Digital Equipment Corporation	Method and apparatus for initiating interlock read transactions on a multiprocessor computer system
US4949239A (en) *	1987-05-01	1990-08-14	Digital Equipment Corporation	System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
US4980854A (en) *	1987-05-01	1990-12-25	Digital Equipment Corporation	Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers
US4858116A (en) *	1987-05-01	1989-08-15	Digital Equipment Corporation	Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
JPS6491261A (en) *	1987-09-23	1989-04-10	Ibm	Data processing system and access
US5115507A (en) *	1987-12-23	1992-05-19	U.S. Philips Corp.	System for management of the priorities of access to a memory and its application
FR2625341A1 (en) *	1987-12-23	1989-06-30	Labo Electronique Physique	SYSTEM FOR MANAGING MEMORY ACCESS PRIORITIES AND ITS APPLICATION

1969
- 1969-07-31 FR FR6926199A patent/FR2056894A1/fr active Pending
1970
- 1970-07-29 GB GB36748/70A patent/GB1269301A/en not_active Expired
- 1970-07-30 DE DE2037811A patent/DE2037811C3/en not_active Expired
1972
- 1972-11-09 US US27779D patent/USRE27779E/en not_active Expired

Also Published As

Publication number	Publication date
DE2037811B2 (en)	1973-01-25
DE2037811A1 (en)	1971-02-11
USRE27779E (en)	1973-10-09
GB1269301A (en)	1972-04-06
DE2037811C3 (en)	1973-09-13

Publication	Publication Date	Title
AU465452B2 (en)	1975-09-11
AU429630B2 (en)	1972-10-26
FR2056894A1 (en)	1971-05-07
AU442375B2 (en)	1973-11-06
AU470301B1 (en)	1972-05-25
AU427401B2 (en)	1972-08-17
AU428074B2 (en)	1972-09-11
AU428131B2 (en)	1972-09-14
AU442357B2 (en)	1973-11-07
AU470661B1 (en)	1970-10-05
AU428129B2 (en)	1972-09-12
AU442380B2 (en)	1973-11-05
AU442463B2 (en)	1973-11-09
AU442535B2 (en)	1973-11-12
AU442538B2 (en)	1973-11-12
AU438128B2 (en)	1973-07-16
AU442285B2 (en)	1973-11-02
AU442322B2 (en)	1973-11-02
AU442554B2 (en)	1973-11-13
AU4540468A (en)	1971-04-01
AU4949169A (en)	1970-07-30
AU5228269A (en)	1970-09-24
CS150983B2 (en)	1973-09-17
CS148372B1 (en)	1973-02-22
CH1695069A4 (en)	1971-08-13

Legal Events

Date	Code	Title	Description
1977-10-28	CD	Change of name or company name
1977-10-28	TP	Transmission of property