FR1582686A - - Google Patents
Info
- Publication number
- FR1582686A FR1582686A FR1582686DA FR1582686A FR 1582686 A FR1582686 A FR 1582686A FR 1582686D A FR1582686D A FR 1582686DA FR 1582686 A FR1582686 A FR 1582686A
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
- H10D62/405—Orientations of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/049—Equivalence and options
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/115—Orientation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/91—Controlling charging state at semiconductor-insulator interface
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/973—Substrate orientation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US67645167A | 1967-10-19 | 1967-10-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1582686A true FR1582686A (fr) | 1969-10-03 |
Family
ID=24714587
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1582686D Expired FR1582686A (fr) | 1967-10-19 | 1968-09-03 |
Country Status (10)
Country | Link |
---|---|
US (1) | US3585464A (fr) |
JP (1) | JPS5141555B1 (fr) |
BE (1) | BE720739A (fr) |
CH (1) | CH484523A (fr) |
DE (1) | DE1802849B2 (fr) |
ES (1) | ES359297A1 (fr) |
FR (1) | FR1582686A (fr) |
GB (1) | GB1241057A (fr) |
NL (1) | NL6814919A (fr) |
SE (1) | SE352781B (fr) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3860948A (en) * | 1964-02-13 | 1975-01-14 | Hitachi Ltd | Method for manufacturing semiconductor devices having oxide films and the semiconductor devices manufactured thereby |
US3717515A (en) * | 1969-11-10 | 1973-02-20 | Ibm | Process for fabricating a pedestal transistor |
JPS4813572B1 (fr) * | 1969-12-01 | 1973-04-27 | ||
US3765961A (en) * | 1971-02-12 | 1973-10-16 | Bell Telephone Labor Inc | Special masking method of fabricating a planar avalanche transistor |
US3964089A (en) * | 1972-09-21 | 1976-06-15 | Bell Telephone Laboratories, Incorporated | Junction transistor with linearly graded impurity concentration in the high resistivity portion of its collector zone |
JPS58179174U (ja) * | 1982-05-24 | 1983-11-30 | 有限会社大川工芸 | 玉廻し玩具 |
US5198692A (en) * | 1989-01-09 | 1993-03-30 | Kabushiki Kaisha Toshiba | Semiconductor device including bipolar transistor with step impurity profile having low and high concentration emitter regions |
US5159429A (en) * | 1990-01-23 | 1992-10-27 | International Business Machines Corporation | Semiconductor device structure employing a multi-level epitaxial structure and method of manufacturing same |
DE10358985B3 (de) * | 2003-12-16 | 2005-05-19 | Infineon Technologies Ag | Halbleiterbauelement mit einem pn-Übergang und einer auf einer Oberfläche aufgebrachten Passivierungsschicht |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL277330A (fr) * | 1961-04-22 | |||
US3437890A (en) * | 1963-05-10 | 1969-04-08 | Ibm | Diffused-epitaxial scanistors |
DE1514082C3 (de) * | 1964-02-13 | 1984-08-30 | Kabushiki Kaisha Hitachi Seisakusho, Tokio/Tokyo | Feldeffekt-Transistor |
US3461003A (en) * | 1964-12-14 | 1969-08-12 | Motorola Inc | Method of fabricating a semiconductor structure with an electrically isolated region of semiconductor material |
USB460009I5 (fr) * | 1965-06-01 | |||
US3380153A (en) * | 1965-09-30 | 1968-04-30 | Westinghouse Electric Corp | Method of forming a semiconductor integrated circuit that includes a fast switching transistor |
-
1967
- 1967-10-19 US US676451A patent/US3585464A/en not_active Expired - Lifetime
-
1968
- 1968-09-03 FR FR1582686D patent/FR1582686A/fr not_active Expired
- 1968-09-12 BE BE720739D patent/BE720739A/xx not_active Expired
- 1968-10-02 GB GB46759/68A patent/GB1241057A/en not_active Expired
- 1968-10-12 DE DE19681802849 patent/DE1802849B2/de active Pending
- 1968-10-15 CH CH1539468A patent/CH484523A/de not_active IP Right Cessation
- 1968-10-16 SE SE13947/68A patent/SE352781B/xx unknown
- 1968-10-18 NL NL6814919A patent/NL6814919A/xx unknown
- 1968-10-18 ES ES359297A patent/ES359297A1/es not_active Expired
-
1973
- 1973-05-23 JP JP48056947A patent/JPS5141555B1/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE1802849A1 (de) | 1969-04-30 |
GB1241057A (en) | 1971-07-28 |
NL6814919A (fr) | 1969-04-22 |
ES359297A1 (es) | 1970-06-01 |
JPS5141555B1 (fr) | 1976-11-10 |
US3585464A (en) | 1971-06-15 |
BE720739A (fr) | 1969-02-17 |
SE352781B (fr) | 1973-01-08 |
DE1802849B2 (de) | 1972-10-19 |
CH484523A (de) | 1970-01-15 |