FR1490406A - Perfectionnements aux dispositifs d'emmagasinage intermédiaire à ligne à retard - Google Patents

Perfectionnements aux dispositifs d'emmagasinage intermédiaire à ligne à retard

Info

Publication number: FR1490406A
Authority: FR; France
Prior art keywords: refinements; storage devices; delay line; intermediate storage; line intermediate
Prior art date: 1965-09-16
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired

Application number

FR7996A

Other languages

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Business Machines Corp

Original Assignee

International Business Machines Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1965-09-16

Filing date

1966-08-18

Publication date

1967-07-28

1966-08-18 Application filed by International Business Machines Corp filed Critical International Business Machines Corp

1967-07-28 Application granted granted Critical

1967-07-28 Publication of FR1490406A publication Critical patent/FR1490406A/fr

Status Expired legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C21/00—Digital stores in which the information circulates continuously

FR7996A 1965-09-16 1966-08-18 Perfectionnements aux dispositifs d'emmagasinage intermédiaire à ligne à retard Expired FR1490406A (fr)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US487887A US3413615A (en)	1965-09-16	1965-09-16	Delay line buffer storage circuit

Publications (1)

Publication Number	Publication Date
FR1490406A true FR1490406A (fr)	1967-07-28

Family

ID=23937521

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
FR7996A Expired FR1490406A (fr)	1965-09-16	1966-08-18	Perfectionnements aux dispositifs d'emmagasinage intermédiaire à ligne à retard

Country Status (5)

Country	Link
US (1)	US3413615A (fr)
BE (1)	BE685721A (fr)
ES (1)	ES331240A1 (fr)
FR (1)	FR1490406A (fr)
NL (1)	NL6612999A (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3810126A (en) *	1972-12-29	1974-05-07	Gen Electric	Recirculation mode analog bucket-brigade memory system
US5796673A (en)	1994-10-06	1998-08-18	Mosaid Technologies Incorporated	Delay locked loop implementation in a synchronous dynamic random access memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US2694748A (en) *	1952-02-18	1954-11-16	John T Mullia	Television signal reproducing system
US2876352A (en) *	1955-12-27	1959-03-03	Bell Telephone Labor Inc	Self-correcting pulse circuits
NL232406A (fr) *	1957-10-21
US2978680A (en) *	1957-12-06	1961-04-04	Bell Telephone Labor Inc	Precession storage delay circuit
US3074048A (en) *	1959-03-20	1963-01-15	Raytheon Co	Signal delay systems

1965
- 1965-09-16 US US487887A patent/US3413615A/en not_active Expired - Lifetime
1966
- 1966-08-18 FR FR7996A patent/FR1490406A/fr not_active Expired
- 1966-08-19 BE BE685721D patent/BE685721A/xx unknown
- 1966-09-15 ES ES0331240A patent/ES331240A1/es not_active Expired
- 1966-09-15 NL NL6612999A patent/NL6612999A/xx unknown

Also Published As

Publication number	Publication date
ES331240A1 (es)	1967-11-01
BE685721A (fr)	1967-02-01
US3413615A (en)	1968-11-26
NL6612999A (fr)	1967-03-17

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