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ES394087A1 - Un metodo de establecer conexiones relativamente aisladas entre los terminales de conductores metalicos dispuestos en un bastidor de montaje y un sustrato aislante. - Google Patents

Un metodo de establecer conexiones relativamente aisladas entre los terminales de conductores metalicos dispuestos en un bastidor de montaje y un sustrato aislante.

Info

Publication number
ES394087A1
ES394087A1 ES394087A ES394087A ES394087A1 ES 394087 A1 ES394087 A1 ES 394087A1 ES 394087 A ES394087 A ES 394087A ES 394087 A ES394087 A ES 394087A ES 394087 A1 ES394087 A1 ES 394087A1
Authority
ES
Spain
Prior art keywords
conductor ends
insulating substrate
relatively insulated
establishing relatively
insulated connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES394087A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of ES394087A1 publication Critical patent/ES394087A1/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Multi-Conductor Connections (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
ES394087A 1970-08-12 1971-08-10 Un metodo de establecer conexiones relativamente aisladas entre los terminales de conductores metalicos dispuestos en un bastidor de montaje y un sustrato aislante. Expired ES394087A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7011885A NL7011885A (es) 1970-08-12 1970-08-12

Publications (1)

Publication Number Publication Date
ES394087A1 true ES394087A1 (es) 1974-11-16

Family

ID=19810763

Family Applications (1)

Application Number Title Priority Date Filing Date
ES394087A Expired ES394087A1 (es) 1970-08-12 1971-08-10 Un metodo de establecer conexiones relativamente aisladas entre los terminales de conductores metalicos dispuestos en un bastidor de montaje y un sustrato aislante.

Country Status (10)

Country Link
US (1) US3780432A (es)
JP (1) JPS5110072B1 (es)
AU (1) AU463465B2 (es)
BR (1) BR7105101D0 (es)
CA (1) CA964379A (es)
DE (1) DE2136201C3 (es)
ES (1) ES394087A1 (es)
FR (1) FR2102211B1 (es)
GB (1) GB1293710A (es)
NL (1) NL7011885A (es)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3893234A (en) * 1972-07-03 1975-07-08 Sierracin Corp Edge improvement for window with electrically conductive layer
US3909934A (en) * 1972-12-02 1975-10-07 Licentia Gmbh Method of producing a measuring head for measuring electrical components
JPH033604U (es) * 1989-06-02 1991-01-16
EP0464232B1 (de) * 1990-06-30 1994-03-16 Dr. Johannes Heidenhain GmbH Lötverbinder und Verfahren zur Herstellung einer elektrischen Schaltung mit diesem Lötverbinder
US5184206A (en) * 1990-10-26 1993-02-02 General Electric Company Direct thermocompression bonding for thin electronic power chips
DE4429002A1 (de) * 1994-08-16 1996-02-22 Siemens Nixdorf Inf Syst Anschlußstiele für elektronische Bausteine mit flächigen Anschlußfeldern
WO2008045416A1 (en) * 2006-10-06 2008-04-17 Microsemi Corporation High temperature, high voltage sic void-less electronic package

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3396461A (en) * 1962-12-04 1968-08-13 Engelhard Ind Inc Printed circuit board and method of manufacture thereof
GB1087861A (en) * 1963-04-18 1967-10-18 Sealectro Corp Improvements in electrical socket connectors and other electrical contact devices
US3340347A (en) * 1964-10-12 1967-09-05 Corning Glass Works Enclosed electronic device
US3381081A (en) * 1965-04-16 1968-04-30 Cts Corp Electrical connection and method of making the same
US3390308A (en) * 1966-03-31 1968-06-25 Itt Multiple chip integrated circuit assembly
US3371148A (en) * 1966-04-12 1968-02-27 Radiation Inc Semiconductor device package and method of assembly therefor
US3434940A (en) * 1966-07-21 1969-03-25 Mc Donnell Douglas Corp Process for making thin-film temperature sensors
US3618200A (en) * 1970-04-17 1971-11-09 Matsuo Electric Co Method of manufacturing chip-shaped passive electronic components

Also Published As

Publication number Publication date
FR2102211A1 (es) 1972-04-07
FR2102211B1 (es) 1976-05-28
CA964379A (en) 1975-03-11
AU463465B2 (en) 1975-07-31
US3780432A (en) 1973-12-25
DE2136201C3 (de) 1978-05-24
DE2136201B2 (de) 1977-09-22
JPS5110072B1 (es) 1976-04-01
GB1293710A (en) 1972-10-25
NL7011885A (es) 1972-02-15
DE2136201A1 (de) 1973-08-16
AU3212171A (en) 1973-02-15
BR7105101D0 (pt) 1973-04-12

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