ES2113454T3 - Procedimiento para el reconocimiento de errores de direccionamiento en memorias para palabras de datos digitales codificadas binarias. - Google Patents
Procedimiento para el reconocimiento de errores de direccionamiento en memorias para palabras de datos digitales codificadas binarias.Info
- Publication number
- ES2113454T3 ES2113454T3 ES93112827T ES93112827T ES2113454T3 ES 2113454 T3 ES2113454 T3 ES 2113454T3 ES 93112827 T ES93112827 T ES 93112827T ES 93112827 T ES93112827 T ES 93112827T ES 2113454 T3 ES2113454 T3 ES 2113454T3
- Authority
- ES
- Spain
- Prior art keywords
- data words
- recognition
- procedure
- digital data
- binary coded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1016—Error in accessing a memory location, i.e. addressing error
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1032—Simple parity
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
LAS PALABRAS DE DATOS SON COMPLETADAS EN UNA PARIDAD DETERMINADA, EN LA MEMORIA (SM) INSCRITA, DE TAL MODO QUE EN LA SUCESION DE PALABRAS DE DATOS ACUMULADAS, UNA DESPUES DE OTRAS A UNA DISTANCIA PERIODICA RESPECTIVA DE UNA DE LAS PALABRAS DE DATOS, SE COMPLETA DE FORMA CORRESPONDIENTE LA OTRA PARIDAD COMO PALABRA DE DATOS RESTANTE. EN LA LECTURA SE INVESTIGAN LOS BITS DE PARIDAD DE LAS PALABRAS DE DATOS TRATADAS QUE DISCREPAN.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP93112827A EP0643350B1 (de) | 1993-08-10 | 1993-08-10 | Verfahren zum Erkennen von Adressierungsfehlern bei Speichern für digitale binärcodierte Datenwörter |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2113454T3 true ES2113454T3 (es) | 1998-05-01 |
Family
ID=8213160
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES93112827T Expired - Lifetime ES2113454T3 (es) | 1993-08-10 | 1993-08-10 | Procedimiento para el reconocimiento de errores de direccionamiento en memorias para palabras de datos digitales codificadas binarias. |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0643350B1 (es) |
AT (1) | ATE163779T1 (es) |
DE (1) | DE59308225D1 (es) |
DK (1) | DK0643350T3 (es) |
ES (1) | ES2113454T3 (es) |
GR (1) | GR3026495T3 (es) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ATE384331T1 (de) | 2001-11-12 | 2008-02-15 | Siemens Ag | Speichertest |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1047437B (it) * | 1975-10-08 | 1980-09-10 | Cselt Centro Studi Lab Telecom | Procedimento e dispositivo per il controllo in linea di memorie logiche sequenziali operanti a divisione di tempo |
US4103823A (en) * | 1976-12-20 | 1978-08-01 | International Business Machines Corporation | Parity checking scheme for detecting word line failure in multiple byte arrays |
-
1993
- 1993-08-10 ES ES93112827T patent/ES2113454T3/es not_active Expired - Lifetime
- 1993-08-10 AT AT93112827T patent/ATE163779T1/de active
- 1993-08-10 EP EP93112827A patent/EP0643350B1/de not_active Expired - Lifetime
- 1993-08-10 DK DK93112827T patent/DK0643350T3/da active
- 1993-08-10 DE DE59308225T patent/DE59308225D1/de not_active Expired - Fee Related
-
1998
- 1998-04-03 GR GR980400678T patent/GR3026495T3/el unknown
Also Published As
Publication number | Publication date |
---|---|
ATE163779T1 (de) | 1998-03-15 |
GR3026495T3 (en) | 1998-07-31 |
DK0643350T3 (da) | 1998-09-28 |
EP0643350A1 (de) | 1995-03-15 |
EP0643350B1 (de) | 1998-03-04 |
DE59308225D1 (de) | 1998-04-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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