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ES2100860T3 - Dispositivo de regularizacion de caudal de circuitos virtuales que utilizan una via de transmision con multiplex temporal asincronico. - Google Patents

Dispositivo de regularizacion de caudal de circuitos virtuales que utilizan una via de transmision con multiplex temporal asincronico.

Info

Publication number
ES2100860T3
ES2100860T3 ES90119244T ES90119244T ES2100860T3 ES 2100860 T3 ES2100860 T3 ES 2100860T3 ES 90119244 T ES90119244 T ES 90119244T ES 90119244 T ES90119244 T ES 90119244T ES 2100860 T3 ES2100860 T3 ES 2100860T3
Authority
ES
Spain
Prior art keywords
virtual circuit
cells
path
division multiplexing
asynchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90119244T
Other languages
English (en)
Inventor
Bihan Denis Le
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Nokia Inc
Original Assignee
Alcatel CIT SA
Nokia Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA, Nokia Inc filed Critical Alcatel CIT SA
Application granted granted Critical
Publication of ES2100860T3 publication Critical patent/ES2100860T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L12/5602—Bandwidth control in ATM Networks, e.g. leaky bucket
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H04L2012/5636—Monitoring or policing, e.g. compliance with allocated rate, corrective actions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5647—Cell loss
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5651—Priority, marking, classes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5679—Arbitration or scheduling

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

DISPOSITIVO DE REGULARIZACION DEL GASTO DE CIRCUITOS VIRTUALES PRESTANDO UNA VIA DE TRANSMISION CON MULTIPLEXACION TEMPORAL ASINCRONA EN LA CUAL LAS CELULAS ENTRANTES DE UNA VIA CON MULTIPLEXACION TEMPORAL ASINCRONA DE ENTRADA (MTR), COMPORTAN UNA CABEZA QUE CONTIENE UNA INFORMACION DE DESTINACION QUE PUEDE SER TRATADA COMO UNA IDENTIDAD DE CIRCUITO VIRTUAL, ESTAN DIRIGIDAS HACIA UNA MEMORIA DE CELULAS (MT) QUE COMPRENDE UNA PLURALIDAD DE MEMORIAS TAMPON DE CIRCUITOS VIRTUALES (MA1, MA2,..., MAN), CADA CELULA ESTA ORDENADA EN LA MEMORIA TAMPON DE CIRCUITO VIERTUAL ASOCIADA AL CIRCUITO VIRTUAL AL CUAL ESTA CELULA PERTENECE Y LAS CELULAS SALIENTES DE UNA VIA CON MULTIPLEXACION TEMPORAL ASINCRONA DE SALIDA (MTE) ESTAN EN ESTAS MISMAS MEMORIAS TAMPON DE CIRCUITOS VIRTUALES (MA1, MA2,..., MAN). UNOS MEDIOS DE MANDO (MC) ESTAN ADEMAS PREVISTOS, AGENCIADOS DE SUERTE QUE LAS CELULAS A EMITIR SOBRE LA VIA SALIENTE ESTEN EN LAS MEMORIAS TAMPON EN UN ORDEN TAL QUE LAS CELULAS SALIDAS DE UNA MISMA MEMORIA TAMPON DE CIRCUITO VIRTUAL SEAN ESPACIADAS UNA CON OTRA AL MENOS UN INTERVALO DETERMINADO POR ESTE CIRCUITO VIRTUAL.
ES90119244T 1989-10-12 1990-10-08 Dispositivo de regularizacion de caudal de circuitos virtuales que utilizan una via de transmision con multiplex temporal asincronico. Expired - Lifetime ES2100860T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8913341A FR2653284B1 (fr) 1989-10-12 1989-10-12 Dispositif de regularisation de debit de circuit virtuels empruntant une voie de transmission a multiplexage temporel asynchrone.

Publications (1)

Publication Number Publication Date
ES2100860T3 true ES2100860T3 (es) 1997-07-01

Family

ID=9386323

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90119244T Expired - Lifetime ES2100860T3 (es) 1989-10-12 1990-10-08 Dispositivo de regularizacion de caudal de circuitos virtuales que utilizan una via de transmision con multiplex temporal asincronico.

Country Status (7)

Country Link
EP (1) EP0422549B1 (es)
AT (1) ATE151216T1 (es)
CA (1) CA2027499C (es)
DE (1) DE69030349T2 (es)
DK (1) DK0422549T3 (es)
ES (1) ES2100860T3 (es)
FR (1) FR2653284B1 (es)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2694671A1 (fr) * 1992-08-06 1994-02-11 Trt Telecom Radio Electr Dispositif de réarrangement de débits de circuits virtuels en transmission à multiplexage temporel asynchrone.
EP0589288B1 (de) * 1992-09-23 2001-12-05 Siemens Aktiengesellschaft Verfahren zum Multiplexen von virtuellen Kanälen auf eine Übertragungsleitung
FR2699299B1 (fr) * 1992-12-16 1995-02-24 Christian Wipliez Procédé de génération de gigue cellules dans un signal incident transmis en mode ATM et dispositif de mise en Óoeuvre.
FR2700902B1 (fr) * 1993-01-22 1995-02-24 Thomson Csf Procédé de gestion du débit de messages codés numériquement transportés par un réseau asynchrone, notamment un réseau ATM, et dispositif pour sa mise en Óoeuvre.
FR2707023B1 (es) * 1993-06-24 1995-09-22 Boyer Jacqueline
EP0748086A1 (en) * 1995-06-09 1996-12-11 Siemens Aktiengesellschaft Method for scheduling message cells leaving an ATM node
US6208655B1 (en) 1996-11-27 2001-03-27 Sony Europa, B.V., Method and apparatus for serving data
EP0847216A1 (en) * 1996-11-27 1998-06-10 Sony Europa B.V. Apparatus, system and method for sending/receiving data to/from an ATM-network
DE69636458T2 (de) * 1996-11-27 2007-03-15 Sony Service Centre (Europe) N.V. Verfahren zur Verkehrsformung und Verkehrformer
CN106396037B (zh) 2012-03-30 2019-10-15 艺康美国股份有限公司 过乙酸/过氧化氢和过氧化物还原剂用于处理钻井液、压裂液、回流水和排放水的用途

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4630261A (en) * 1984-07-30 1986-12-16 International Business Machines Corp. Integrated buffer management and signaling technique

Also Published As

Publication number Publication date
EP0422549A1 (fr) 1991-04-17
ATE151216T1 (de) 1997-04-15
FR2653284B1 (fr) 1994-05-06
DK0422549T3 (da) 1997-09-22
CA2027499A1 (fr) 1991-04-13
EP0422549B1 (fr) 1997-04-02
CA2027499C (fr) 1999-12-28
FR2653284A1 (fr) 1991-04-19
DE69030349D1 (de) 1997-05-07
DE69030349T2 (de) 1997-07-17

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