EP4233495A1 - Substrate for an electronic chip - Google Patents

Abstract

The present description relates to a substrate (108) for an electronic chip (110), comprising: a first printed circuit board (300); a first conductive region (310), intended to receive the chip and located on a first face (108i) of the first board; and a second conductive region (320), intended to receive a thermal connector (200) and located on a second face (108s) of the first board, opposite the first face, the first region being connected to the second region by at least one conductive through-via (330) located plumb with the first region.

Description

DESCRIPTION

Microchip carrier

This application claims the priority of the French patent application 20/10777 which will be considered as forming an integral part of the present description.

Technical area

This description relates generally to electronic devices and, more particularly, electronic chip carriers.

Prior technique

[0002] Supports are known that make it possible to mechanically maintain and cool an electronic chip, for example a chip adapted to operate in a cryogenic environment. Such supports are often expensive, bulky and equipped with a limited number of contact recovery elements of the chip.

Summary of the invention

[0003] There is a need to improve existing electronic chip carriers.

[0004] One embodiment overcomes all or part of the drawbacks of known electronic chip carriers.

[0005] One embodiment provides an electronic chip carrier comprising: a first printed circuit board; a first conductive region, intended to receive the chip, located on a first face of the first card; and a second conductive region, intended to receive a thermal connector, located on a second face of the first card, opposite the first face, the first region being connected to the second region by at least one through conductor via, located directly above the first region.

According to one embodiment, the via is filled with a thermally conductive material.

According to one embodiment, the via is hollow and has side walls coated with a thermally conductive material.

According to one embodiment, the chip is a chip adapted to operate at cryogenic temperatures, preferably a chip comprising superconducting circuits.

According to one embodiment, one or more third conductive regions, preferably four third conductive regions, are inserted between the first region and the second region, the via connecting the third regions together.

According to one embodiment: the first region is formed in a first level of metallization, located on the first face of the first card; the second region is formed in a second level of metallization, located on the second face of the first card; and each third region is formed in a separate third metallization level, located between the first and second faces of the first card.

According to one embodiment, superposed metallization levels are separated by an insulating layer

[0012] According to one embodiment, the first region has an area of about 50 mm ² .

[0013]According to one embodiment, the first card comprises approximately one hundred first contact elements of the chip. According to one embodiment, the first contact recovery elements are located on the same side of the first card, with respect to the first region.

According to one embodiment, the first card, of substantially rectangular shape, has a length of approximately 12 cm and a width of approximately 3 cm.

According to one embodiment, the support further comprises at least a second printed circuit board, superimposed on the first board.

[0017]According to one embodiment, each second card comprises second contact recovery elements intended to be connected to third contact recovery elements of the chip by conductive wires.

[0018] One embodiment provides a system comprising: at least one support as described; at least one electronic chip, adapted to operate in a cryogenic environment; at least one cold source; and at least one thermal connector, connecting the support to the cold source.

Brief description of the drawings

These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments made on a non-limiting basis in relation to the attached figures, among which:

Figure IA is a sectional view, schematic and partial, of an example of a cryogenic system of the type to which apply, by way of example, the embodiments described;

Figure IB is a sectional view, schematic and partial, of another example of a cryogenic system of the type to which apply, by way of example, the embodiments described;

Figure 2 is a side view, schematic and partial, of yet another example of a cryogenic system of the type to which apply, by way of example, the embodiments described;

[0023] Figure 3 is a sectional view, schematic and partial, of an embodiment of an electronic chip carrier;

Figure 4 is a top view, schematic and partial, of the embodiment of the electronic chip carrier exposed in relation to Figure 3;

Figure 5 is another top view of the embodiment of the electronic chip carrier exposed in relation to Figures 3 and 4;

Figure 6 is a sectional view, schematic and partial, of another embodiment of an electronic chip carrier;

Figure 7 is a top view, schematic and partial, of the embodiment of the electronic chip carrier exposed in relation to Figure 6;

Figure 8 is a top view, schematic and partial, of yet another embodiment of an electronic chip carrier; and

[0029] Figure 9 is a sectional view of the electronic chip carrier of Figure 8.

Description of embodiments

The same elements have been designated by the same references in the different figures. In particular, the structural and/or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements useful for understanding the embodiments described have been represented and are detailed. In particular, the installation and connection of chips on these supports are not detailed, the invention being compatible with the usual techniques for installing and connecting chips on supports.

[0032] Unless otherwise specified, when reference is made to two elements connected together, this means directly connected without intermediate elements other than conductors, and when reference is made to two elements connected or coupled together, this means that these two elements can be connected or be linked or coupled via one or more other elements.

[0033] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "rear", "up", "down", "left", "right", etc., or relative, such as the terms "above", "below", "upper", "lower", etc., or to qualifiers of orientation, such as the terms "horizontal", "vertical", etc. ., reference is made, unless otherwise specified, to the orientation of the figures.

[0034] Unless specified otherwise, the expressions “about”, “approximately”, “substantially”, and “of the order of” mean to within 10%, preferably within 5%.

Figure IA is a sectional view, schematic and partial, of an example of cryogenic system 1 of the type to which apply, by way of example, the embodiments described. The cryogenic system 1 comprises a cryostat 100, for example a dilution cryostat using two isotopes of helium. The cryostat 100 is, in FIG. 1A, symbolized by a substantially cylindrical double-walled container containing a cryogenic fluid 102, liquid helium in this example. A measuring rod 104 penetrates inside the cryostat 100 through a flange or plug 106 closing off an upper opening or upper orifice of the cryostat 100. The flange 106 allows the introduction of the measuring rod 104 while ensuring a sealing, or by limiting a rate of leakage, between the inside and the outside of the cryostat 100. By way of example, the cryostat 100 is a Dewar vessel.

At a first end of the measuring rod 104 (the lower end of the rod 104, in Figure IA) is fixed a support 108 of an electronic chip 110. The electronic chip 110 is a chip adapted to operate at cryogenic temperatures (in other words in a cryogenic environment), preferably a chip comprising superconducting circuits.

The support 108 is intended to perform several functions. In particular, the support 108 makes it possible to: mechanically hold the chip 110, in particular during phases of introduction and withdrawal of the measuring rod 104 from the cryostat 100; optimally cooling the chip 110, by exposing one or more surfaces thereof to a cryogenic environment; link or connect the chip 110 to one or more devices located outside the cryostat 100.

The support 108 comprises contact recovery elements 112. The contact recovery elements 112 of the chip 110 are, in the example of Figure IA, connected to a first cable 114. The cable 114 is connected or connected to a connection box 116 located at a second end of the measuring rod 104 (the upper end of the rod 104, in figure IA), external to the cryostat 100. The connection box 116 is, for example, a junction box comprising terminals (not shown) adapted to the transmission of signals from or to the chip 110. In the example of FIG. 1A, the measuring rod 104 is hollow. This allows the cable 114 to pass inside the measuring rod 104. In this example, the connection box 116 is connected to an electronic device 118 (DEV) via a second cable 120.

Signals can thus be exchanged between the inside and the outside of the cryostat 100. More specifically, as illustrated in FIG. 1A, signals can be exchanged between the chip 110 and the electronic device 118 via: contact recovery elements 112; the first cable 114; the connection box 116; and the second cable 120.

The cooling of the chip 110 takes place thanks to a cold source. In the example of FIG. IA, the cold source consists of the cryogenic fluid 102 (here, liquid helium) contained in the cryostat 100. The chip 110 can be cooled indirectly, for example by placing the support 108 and chip 110 inside an enclosure 122 as shown in Figure IA. The enclosure 122, inside which a partial vacuum can exist, makes it possible to avoid any direct contact of the support 108 and of the chip 110 with the cryogenic fluid 102.

Alternatively, the chip 110 is cooled directly. This corresponds, for example, to a configuration where the support 108 is at least partially immersed in the cryogenic fluid 102, the enclosure 122 then being omitted.

In the system 1, the number of contact recovery elements 112 of the chip 110 is generally conditioned by the dimensions and by a geometry of the support 108. The dimensions and the geometry of the support 108 are themselves constrained by dimensions and by a geometry of the upper opening of the cryostat 100, closed off by the flange 106, to allow free introduction and removal of the measuring rod 104.

In a case where the upper opening of the cryostat 100 (of substantially circular section, in this example) has a small internal diameter, for example less than 5 cm, the number of contact recovery elements 112 of the chip 110 is heavily limited. This often proves problematic, particularly when chip 110 is a microprocessor exchanging many signals with electronic device 118.

One could have thought of widening the upper opening of the cryostat 100 to make it possible to increase the number of contact recovery elements 112 of the chip 110. However, in the cryogenic system 1, the aim is generally to reach and maintain close to chip 110 a very low temperature, for example of the order of -269° C. (i.e. approximately 4.2 K) or of the order of -273.15 C and -271° C in one case where the external pressure of the Dewar is reduced by pumping the cryogenic fluid in the gaseous state, the pumping being carried out for example by a hole (not shown) passing through the flange 106. It is sought in particular to avoid or limit any heat exchange which may occur, for example at the flange 106, between the inside and the outside of the cryostat 100, because such exchanges are liable to penalize the operation of the chip 110. that the upper opening of the cryostat 100 has an exchange surface, therefore an internal diameter, as small as possible.

Figure IB is a sectional view, schematic and partial, of another example of the cryogenic system of the type to which apply, by way of example, the embodiments described.

Unlike the cryogenic system 1 of FIG. 1A, which provides for cooling the chip 110 by immersion in the cryogenic fluid 102, the cryogenic system 1' provides for cooling the chip 110 by conduction.

In the example shown, the cryogenic system the comprises a cryostat 150 in which is placed the chip 110 to be cooled. The cryostat 150 comprises for example a reservoir 152. The reservoir 152 is for example intended to contain a first cryogenic fluid.

In the example shown, the cryostat 150 further comprises another tank 154. The tank 154 is for example intended to contain a second cryogenic fluid, for example different from the first cryogenic fluid.

[0050] By way of example, the first cryogenic fluid is liquid nitrogen and the second cryogenic fluid is liquid helium.

For example, a saturation vapor pressure of the tank 154 is obtained reduced by pumping the second cryogenic fluid in the gaseous state, for example in order to take advantage of the excellent properties of thermal conductivity of the superfluid helium in below the lambda point. This also makes it possible to reduce the temperature of the chip 110 with respect to the temperature that would be obtained without pumping. Similar arrangements can be implemented for tank 152. In the orientation of Figure IB, a plate 156 is for example in contact with the lower wall of the tank 154. The plate 156, called cold plate, is for example intended to receive the chip 110. The plate 156 allows for example to optimize a thermal transfer between the reservoir 154 and the chip 110. The plate 156 plays for example the role of a thermal conductor. By way of example, the plate 156 is made of a thermally conductive material, for example a metal.

In the example shown, the reservoir 154, the plate 156 and the chip 110 are located in a vacuum enclosure 158. The enclosure 158 is for example intended to create a partial vacuum around the chip 110.

[0054] Although this has not been shown in FIG. 1B, the cryostat 150 may include other elements such as pumps, anti-radiation screens, etc. In particular, the cryostat may for example comprise a helium 3 ( ³ He) reservoir, for example interposed between the plate 156 and the chip 110, or a device making it possible to regulate the temperature of the chip 110 to a value higher than that of plate 156.

Figure 2 is a side view, schematic and partial, of yet another example of cryogenic system 2 of the type to which apply, by way of example, the embodiments described. The cryogenic system 2 of FIG. 2 has common elements with the cryogenic systems 1 and 1' of FIGS. IA and IB. These elements will not be described again below.

[0056] In the cryogenic system 2, the chip 110 is mounted on a first face 108i of the support 108 (the lower face of the support 108, seen from the side and in section in FIG. 2). A thermal connector 200 is arranged, facing the chip 110, on a second face 108s of the support 108 (the face upper support 108, in Figure 2), opposite the first face 108i.

The thermal connector 200 is made of at least one thermally conductive material, that is to say having a thermal conductivity at ambient temperature greater than 60 Wm ^.KC ¹ . By way of example, the thermal connector 200 is made of a metal or a metal alloy, for example an alloy of tin and copper. A cold source 202 (SOURCE), allowing the chip 110 to be cooled, is linked or connected to the thermal connector 200.

In the example of Figure 2, connections by wires (wire bonding) 204 make it possible to connect the connection pads (not shown) of the chip 110 to the contact recovery elements 112 of the support 108. An electrical connector 206 is connected, preferably connected, to contact recovery elements 112. Electrical connector 206 is connected, preferably connected, to electronic device 118 (DEV) via a third cable 208. As illustrated in FIG. 2 , signals can be exchanged between the chip 110 and the electronic device 118 via: connecting wires 204; contact recovery elements 112; connector 206; and cable 208.

In system 2, the thermal connector 200 is not in direct contact with the chip 110. The chip 110 is in fact separated from the thermal connector 200 by the thickness, denoted E, of the substrate 108 seen from the side in figure 2. The thickness E is at the origin of a thermal resistance between the thermal connector 200 and the chip 110. This thermal resistance, which is all the greater as the thickness E is important and as the support 108 is thermally insulating, harms the cooling of the chip 110 by the cold source 202.

One could have thought of implanting the thermal connector 200 directly on the chip 110. However, this would have caused great difficulties in terms of connection of the support 108 to the contact recovery elements 112 of the chip 110. One could also have thought of reducing the thickness E of the support 108. However, this would have tended to weaken the support 108 too much. It will also degrade the signal transmission quality.

[0061] Figure 3 is a sectional view, schematic and partial, of an embodiment of the support 108 of the electronic chip.

According to this embodiment, the support 108 comprises a printed circuit board 300. The orientation of Figure 3 is reversed with respect to that of Figure 2. In the orientation of Figure 3: the first face 108i corresponds to the upper face of the support 108 and to an upper face of the card 300; and the second face 108s corresponds to the lower face of the support 108 and to a lower face of the card 300.

[0063] On the side of face 108i, card 300 includes a first conductive region 310 intended to receive chip 110 (DIE). Chip 110 is, as illustrated in FIG. 3, placed on and in contact with first region 310. First region 310 is preferably formed in a first level of metallization 312 located on face 108i of card 300. In the orientation of FIG. 3, the first level of metallization 312 corresponds for example to an upper level of metallization of the card 300.

[0064] On the side of face 108s, card 300 includes a second conductive region 320 intended to receive the thermal connector 200 (CONNECTOR) . The thermal connector 200 is, as illustrated in FIG. 3, arranged on and in contact with the second region 320. The second region 320 is preferably formed in a second level of metallization 322 located on the face 108s of the card 300. The second region 320 is opposite the first region 310. In the orientation of FIG. 3, the second metallization level 322 corresponds for example to a lower metallization level of the card 300.

According to this embodiment, the first region 310 is connected to the second region 320 by conductive vias 330 passing through the card 300, therefore the support 108, in all its thickness E. The conductive vias 330 are located at the verticality of the first region 310 and the second region 320, so as to form thermal conduction paths of length substantially equal to the thickness E of the card 300.

The conductive vias 330 are for example completely filled with at least one thermally conductive material, preferably a thermal and electrically conductive material, for example copper. As a variant, only the internal walls of the conductive vias 330 are coated with the thermal conductive material, for example in a case where the support 108 is immersed in the cryogenic fluid. The thermal connector 200 then has, for example, through-holes, aligned with respect to the hollow conductive vias 330, so as to allow circulation of the cryogenic fluid inside the vias 330. The heat exchanges are thus further improved by allowing the work of thermal convection by the cryogenic fluid.

Still according to this embodiment, the printed circuit board 300 comprises at least one third conductive region 340, preferably four third regions 340, interposed between the first region 310 and the second region 320. The third region(s) 340 are respectively formed in third intermediate metallization levels 342, located between the face 108i and the face 108s of the card 300. The third regions 340 are connected between them by the conductive vias 330. Thus, as illustrated in FIG. 3, the conductive vias 330 connect together the first, second and third regions 310, 320 and 340 of the card 300.

The first, second and third metallization levels 312, 322 and 342 are separated from each other by electrically insulating layers 350. In other words, two superimposed metallization levels, therefore two superimposed regions, are separated by an insulating layer 350.

One of the advantages of the embodiment described in relation to FIG. 3 is to allow improved thermal conduction between the chip 110 and the thermal connector 200, and thermal convection by the cryogenic fluid in the case of hollow vias 330, in particular compared to a support 108 which would not include any conductive via 330. The chip 110 can thus be cooled more effectively by the cold source 202 (not shown in FIG. 3) connected to the thermal connector 200.

Figure 4 is a top view, schematic and partial, of the embodiment of the electronic chip support 108 exposed in relation to Figure 3. Figure 3 corresponds, for example, to a section along the plane AA of Figure 4.

According to a preferred embodiment, the first region 310 of the first metallization level 312 located on the face 108i of the support 108 has, seen from above in FIG. 4, dimensions approximately equal to those of the chip 110. Still according to this preferred embodiment, the first region 310 is square in shape and has a side of approximately 7 mm. The region 310 therefore occupies an area of approximately 50 mm ² in area of the card 300.

The distribution of the conductive vias 330 can be designed to optimize the cooling of the chip 110. In particular, conductive vias 330 can advantageously be located under areas of the chip 110 that it is desired to preferentially cool. The number and geometry of the conductive vias 330 can also be adjusted according to the thermal performance to be achieved.

[0073] Figure 5 is another top view of the embodiment of the electronic chip support 108 exposed in relation to Figures 3 and 4.

According to this embodiment, the support 108 has, seen from above in Figure 5, a substantially rectangular shape. The support 108 preferably has a length of about 12 cm and a width of about 3 cm.

[0075] The support 108 comprises the contact recovery elements 112 of a chip 110 (not shown in Figure 5). The support 108 preferably comprises approximately one hundred contact recovery elements 112. Each contact recovery element 112 is connected, preferably connected, to a connection pad 502 located on the periphery of the first region 310 intended to receive the chip. . Conductive tracks 504 and through conductive vias 506 make it possible to connect each connection pad 502 to a contact recovery element 112.

By way of example, the through-conducting vias 506 are entirely filled with a metal, for example copper. Alternatively, the through-conducting vias 506 are hollow and their side walls are coated with a metal, for example copper. copper. According to a preferred embodiment, the contact recovery elements 112 are all arranged on the same side of the card 300 with respect to the first region 310 (on the left side with respect to the first region 310, in FIG. 5) . In FIG. 5, certain connection pads 502 are connected to the contact recovery elements 112 by conductive tracks 504 formed on the front face of the card 300, for example in the first level of metallization 312. Other connection pads 502 are connected to the contact recovery elements 112 by conductive tracks 504 formed on the front face and by conductive tracks (not visible) formed on the rear face of the card 300, these tracks being interconnected by the conductive vias 506.

The contact recovery elements 112 together form a connector 508 making it possible to convey up to 96 independent channels, or 48 differential channels.

[0079] Holes 510 can be provided in the card 300 in order to provide mechanical support or grounding of the support 108.

The arrangement of the contact recovery elements of the card 300 makes it possible to minimize the width of the support 108. A more compact support 108 is thus obtained, which facilitates its use in a cryogenic environment, in particular its passage through the orifice of a cryostat.

[0081] Although an example is shown in FIG. 5 in which the support 108 comprises around a hundred contact recovery elements 112, those skilled in the art are able to provide a greater number of contacts 112, for example by reducing the width of the tracks 504 and increasing the number of layers of the map 300. [0082] Figure 6 is a sectional view, schematic and partial, of another embodiment of an electronic chip support 108'.

The support 108' of FIG. 6 comprises common elements with the support 108 of FIG. 3. These common elements will not be detailed again below.

The support 108' of FIG. 6 differs from the support 108 of FIG. 3 mainly in that the support 108' has only one via 330 connecting the first region 310 to the second region 320. One of the advantages of the embodiment described in relation to Figure 6 is to allow a significant reduction in the thermal resistance between the chip 110 and the thermal connector 200, while preserving the mechanical retention provided by the support 108 '.

According to the embodiment represented, the card 300 comprises intermediate levels 342 separated by insulating layers 350. However, the via 330 of the support 108' does not contact any third region formed in an intermediate metallization level. The via 330 and the regions 310 and 320 can be made of the same material, preferably copper.

According to another embodiment, a so-called “double-sided” printed circuit board is used, in other words a board that does not have third levels of metallization, interposed between the first level of metallization 312 and the second level of metallization. 322. The first level 312 and the second level 322 are in this case separated by a single insulating layer 350.

[0087] FIG. 7 is a top view, schematic and partial, of the embodiment of the electronic chip support 108′ exposed in relation to FIG. 6. FIG. 6 corresponds, for example, to a section along the plane BB of figure 7.

According to a preferred embodiment, the conductive via 330 of the support 108' has, seen from above in FIG. 7, a section of substantially square shape. As illustrated in FIG. 7, the via 330 is inscribed in the square formed by the chip 110 and in the square formed by the first region 310.

The position, the dimensions and/or the geometry of the via conductor 330 of the support 108' are designed to optimize the cooling of the chip 110. In particular, the section of the via conductor 330 of the support 108' can be adjusted according to thermal and/or mechanical performance to be achieved. In the case of hollow conductive vias 330, the dimensions of these vias can also be adjusted so as to obtain a flow rate of cryogenic fluid producing a heat transfer suitable for cooling the chip 110.

[0090] Figure 8 is a top view, schematic and partial, of yet another embodiment of a support 800 of electronic chip. Figure 9 is a sectional view, along the plane CC of Figure 8, of the support 800 of electronic chip.

In the example shown, the support 800 comprises three superimposed printed circuit boards 802 (PCB1), 804 (PCB2) and 806 (PCB3). The card 804 partially covers the upper face of the card 802. The card 806 partially covers the upper face of the card 804. More precisely, in the example represented, the card 804 has a central recess, of rectangular shape, exposing a of the upper face of the card 802. In the example represented, the card 806 also has a central recess, of rectangular shape and of greater dimensions to the recess of the board 804, exposing a portion of the top face of the board 804.

In the example shown, the chip 110 is on and in contact with the upper face of the card 802, inside the recess of the card 804. The recesses of the cards 804 and 806 are for example substantially centered with respect to chip 110.

In the example shown, the exposed parts of the upper faces of the cards 802, 804 and 806 comprise contact recovery elements 808, for example connection pads. The upper face of the chip 110 comprises, for example, contact recovery elements 810, for example connection pads. The contact recovery elements 810 of the chip 110 are for example connected to the contact recovery elements 808 of the cards 802, 804 and 806 by conductive wires 812.

In the example shown, the card 802 intended to receive the chip 110 comprises conductive vias 814. The vias 814 are for example similar to the vias 330 previously described in relation to FIG. 3. The vias 814, which can be hollow to allow the passage of the cryogenic fluid, for example superfluid, and thus increase the heat transfers, are for example located directly above the chip 110. Although this is not shown, a connector is for example placed on the side of the underside of card 802, in contact with vias 814, so as to cool chip 110.

As illustrated in FIG. 9, the support 800 can comprise one or more other vias 816. The vias 816 extend for example from the upper face of the card 804 or of the card 806 to the lower face of the card. 802. [0096] An advantage of the support 800 is that the stacking of the printed circuit boards 802, 804, 806 makes it possible to provide a greater number of contacts 808 than in the case of a support comprising only a single card. of printed circuit. Compared to the support 108 previously described in relation to FIG. 5, the support 800 makes it possible to have an even greater number of contacts while maintaining substantially identical external dimensions. By way of example, the support 800 can comprise approximately two one hundred 808 contacts per card, or approximately six hundred 808 contacts in total.

[0097] Although an example has been shown in which the support 800 comprises a stack of three cards 802, 804 and 806, those skilled in the art are able to adapt the number of cards in the stack of the support 800, for example depending on the number of contacts 810 of chip 110.

Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art. In particular, the production of a support making it possible to receive several chips and/or several thermal connectors on the same printed circuit board is within the abilities of those skilled in the art based on the indications above.

Furthermore, those skilled in the art are able to combine the embodiments of the support 108, 108' described in relation to FIGS. 3 to 7 with the embodiment of the support 800 described in relation to FIGS. 9.

[0100] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art based on the functional indications given above. In particular, the sizing and distribution conductive vias 330 plumb with the chip 110 to be cooled is within the abilities of those skilled in the art based on the indications above.

Claims

Support (108; 108'; 800) of an electronic chip (110) comprising: a first printed circuit board (300; 802); a first conductive region (310), intended to receive the chip, located on a first face (108i) of the first card; a second conductive region (320), intended to receive a thermal connector (156; 200), located on a second face (108s) of the first card, opposite the first face; and one or more third conductive regions (340), preferably four third conductive regions, interposed between the first region (310) and the second region (320), the first region being connected to the second region by at least one via (330 814) through conductor, located directly above the first region, the via also connecting the third regions together. Support according to Claim 1, in which the via (330; 814) is filled with a heat-conducting material. Support according to Claim 1, in which the via (330; 814) is hollow and has side walls coated with a heat-conducting material. Support according to any one of Claims 1 to 3, in which the chip (110) is a chip adapted to operate at cryogenic temperatures, preferably a chip comprising superconducting circuits. A medium according to any of claims 1 to 4, wherein: the first region (310) is formed in a first level of metallization (312), located on the first face (108i) of the first card (300; 802); the second region (320) is formed in a second metallization level (322), located on the second face (108s) of the first card; and each third region (340) is formed in a separate third metallization level (342), located between the first and second faces of the first card. Support according to claim 5, in which superimposed levels of metallization (312, 322, 342) are separated by an insulating layer. Support according to any one of claims 1 to 6, in which the first region (310) has an area of approximately 50 mm ² . Support according to any one of Claims 1 to 7, in which the first card (300; 802) comprises approximately one hundred first contact recovery elements (112; 808) of the chip (110). Support according to claim 8, in which the first contact recovery elements (112; 808) are located on the same side of the first card (300: 800), with respect to the first region (310). Support according to any one of claims 1 to 9, in which the first card (300; 802), of substantially rectangular shape, has a length of approximately 12 cm and a width of approximately 3 cm. Support according to any one of claims 1 to 10, further comprising at least a second printed circuit board (804, 806), superimposed on the first board (802). Support according to claim 11, in which each second card comprises second contact recovery elements (808) intended to be connected to third contact recovery elements (810) of the chip (110) by conductive wires (812) . System (1'; 2) comprising: at least one support (108; 108'; 800) according to any one of Claims 1 to 12; at least one electronic chip (110), adapted to operate in a cryogenic environment; at least one cold source (202; 152, 154); and at least one thermal connector (156; 200), connecting the support to the cold source.