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EP3754848B1 - Ci de communication en champ proche et procédé pour dispositif de communication mobile - Google Patents

Ci de communication en champ proche et procédé pour dispositif de communication mobile Download PDF

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Publication number
EP3754848B1
EP3754848B1 EP19305792.4A EP19305792A EP3754848B1 EP 3754848 B1 EP3754848 B1 EP 3754848B1 EP 19305792 A EP19305792 A EP 19305792A EP 3754848 B1 EP3754848 B1 EP 3754848B1
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EP
European Patent Office
Prior art keywords
transistor
current
integrated circuit
switch
power supply
Prior art date
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Application number
EP19305792.4A
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German (de)
English (en)
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EP3754848A1 (fr
Inventor
Fabien Boitard
Ludovic Oddoart
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NXP BV
Original Assignee
NXP BV
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Publication date
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Priority to EP19305792.4A priority Critical patent/EP3754848B1/fr
Priority to CN202010499802.7A priority patent/CN112118032B/zh
Publication of EP3754848A1 publication Critical patent/EP3754848A1/fr
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Publication of EP3754848B1 publication Critical patent/EP3754848B1/fr
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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/70—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0063—High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load

Definitions

  • the present specification relates to a near field communications (NFC) integrated circuit for a mobile communications device.
  • the present specification also relates to a mobile communications device including the near field communications (NFC) integrated circuit.
  • the present specification further relates to a method of operating a mobile communications device.
  • the Universal Integrated Circuit Card In an OFF state of a mobile communications device such as a mobile phone, the Universal Integrated Circuit Card (UICC) is not directly supplied by the mobile communications device platform.
  • a Near Field Communications (NFC) chip of the mobile communications device may therefore need to use an internal regulator to supply the UICC in order to perform secure transactions.
  • NFC Near Field Communications
  • a simple switch may be used to supply the external UICC from an internal regulator, such as a central supply of the NFC chip.
  • This solution may generally only be used when the mobile communications device is in its OFF state, in which case the external UICC does not get any supply from phone platform.
  • the switch may be low ohmic in order to provide a supply that is compliant with the ETSI standard (1.62V @ 10ma).
  • United States patent application publication number US 2013/0169059 A1 discloses systems, methods and platforms for power multiplexer switching operations.
  • the system may include a new field communication module configured to receive power through a radio frequency channel; a subscriber identity module circuit configured with a supply voltage port; and a power multiplexer circuit configured to controllably couple the SIM circuit supply voltage port to the NFC module, wherein the NFC module provides a supply voltage to the SIM circuit such that the SIM circuit is operable in the absence of primary device power source.
  • a near field communications (NFC) integrated circuit for a mobile communications device, the integrated circuit comprising:
  • the provision of the current control circuit can protect components of the near field communications integrated circuit against a current peak that may be drawn to load an external capacitance on the universal integrated circuit card supply, leading to a drop in voltage on the power supply rail as the first transistor is switched to an on state to couple the power supply rail to the power supply output. This drop in voltage may otherwise cause a reset of the near field communications integrated circuit, or other functionality problems relating to the operation of the internal components of the near field communications integrated circuit, which are also supplied from the power supply rail.
  • the current control circuit includes a first switch; a second switch, wherein a gate of the first transistor is coupleable to reference potential via the second switch; a second transistor having a gate coupleable to the gate of the first transistor via the first switch, and a third transistor and a fourth transistor, wherein a gate of the third transistor is coupled to a gate of the fourth transistor.
  • the second transistor and the fourth transistor may be coupled in series between the power supply rail and a first current source.
  • the first transistor and the third transistor may be coupled in series between the power supply rail and a second current source.
  • a node located between the fourth transistor and the first current source may be coupled to a node located between the gate of the second transistor and the first switch.
  • a node located between the third transistor and the second current source may be coupled to the gates of the third transistor and fourth transistor.
  • the current control circuit may be operable in an initial step for switching the first transistor to the on state to close the first switch and to open the second switch. In this way, current flow from the power supply rail to the power supply output may be governed by a ratio of currents flowing through the first transistor and the second transistor. This can allow current to be drawn to load the external capacitance on the universal integrated circuit card supply without leading to a drop in voltage on the power supply rail in the initial step.
  • the current control circuit may be operable in a next step for switching the first transistor to the on state to open the first switch and to close the second switch.
  • the first transistor may thus be fully switched to its on state to provide power from the power supply rail to the power supply output.
  • the first transistor may subsequently (i.e. in the next step) be fully switched on (by operating the first and second switches using the control signals) without leading to the aforementioned drop in voltage on the power supply rail.
  • the current control circuit may further include a fifth transistor coupled in series with the first transistor and a third current source.
  • the fifth transistor may have a gate coupled to a node located between the first switch and the gate of the first transistor.
  • the fifth transistor may also have a first current terminal coupled to a node located between the first transistor and the power supply output.
  • the fifth transistor may further have a second current terminal coupled to said third current source.
  • the current control circuit may be operable to produce control signals for operating the first switch and the second switch dependent upon a current at the second current terminal.
  • the fifth transistor may thus be used to determine the appropriate time at which the first transistor may be fully switched on without leading to the aforementioned drop in voltage on the power supply rail. For instance, this may be done by determining whether the current at the second current terminal of the fifth transistor exceeds a reference current provided by the third current source.
  • the current control circuit may further include a sixth transistor and a seventh transistor forming a current mirror.
  • An input of the current mirror may be coupled to a node located between the second current terminal of the firth transistor and the third current source.
  • the current control circuit may be operable to use an output of the current mirror to produce the control signals.
  • the input of the current mirror may for instance receive a current determined by the difference between the current at the second current terminal of the firth transistor and the reference current provided by the third current source. This can allow the current mirror to determine when the current at the second current terminal of the firth transistor exceeds the reference current provided by the third current source, for generating the appropriate control signals for the first and second switches.
  • the current control circuit may further include a latch.
  • the latch may have an input coupled to the output of the current mirror.
  • the latch may have an output.
  • the output of the latch may be coupled to the first switch via an inverter, for providing a first the control signal to the second switch.
  • the output of the latch may also be coupled to the second switch for providing a second said control signal to the second switch.
  • the output of the current mirror may thus be used to program the latch, and the output of the latch may be used to produce the control signals for operating the first switch and the second switch.
  • Some of the transistors of the current control circuit may be matched. Matching the transistors involves providing substantially equally sized transistors so that the same current flows through each transistor when substantially the same voltages are applied to the terminals of the transistors.
  • the first and fifth transistors may be substantially matched. This can allow the fifth transistor to be used accurately to detect desaturation in the first transistor.
  • the first and second transistors may be substantially matched. This can allow the desired load current I load to flow to the power supply output. In particular, this can allow a copy of the reference current I1 to be obtained, in order to limit I load as the first transistor is being switched to its on state.
  • the third and fourth transistors may be substantially matched. This can allow the same drain voltage to be obtained on the first transistor and the second transistor.
  • a mobile communications device including the near field communications (NFC) integrated circuit of any of claims 1 to 10.
  • NFC near field communications
  • the mobile communications device may, further include the universal integrated circuit card (UICC).
  • UICC universal integrated circuit card
  • the mobile communications device may be operable to provide power to the universal integrated circuit card without providing power to the universal integrated circuit card from the near field communications (NFC) integrated circuit when the mobile communications device is in an on state.
  • NFC near field communications
  • FIG. 1 shows a mobile communications device 10 in accordance with an embodiment of this disclosure.
  • the mobile communications device 10 may for instance be a mobile phone, or any other device incorporating a universal integrated circuit card (UICC) and having near field communications (NFC) functionality.
  • UICC universal integrated circuit card
  • NFC near field communications
  • the mobile communications device 10 may include a housing 2, a display 4 and one or more user input devices, such as button(s) 6.
  • the mobile communications device 10 includes a universal integrated circuit card 20.
  • the housing 2 may include an opening 8, to allow the universal integrated circuit card 20 to be installed.
  • the housing 2 may contain a battery 12 for powering the mobile communications device 10.
  • the mobile communications device 10 includes a near field communications (NFC) integrated circuit 14.
  • the near field communications integrated circuit 14 may located inside the housing 2.
  • the near field communications integrated circuit 14 may provide functionality such as secure payment functionality for the mobile communications device 10. This functionality may involve the use of the universal integrated circuit card 20.
  • the battery 12 While the mobile communications device 10 is switched on, the battery 12 may be used to provide power to the universal integrated circuit card 20 via the main internal power supply of the mobile communications device 10. This can allow the mobile communications device 10 to connect with a cellular network, and can also power the universal integrated circuit card 20 during provision of the aforementioned near field communications functionality.
  • the near field communications integrated circuit 14 may provide power to the universal integrated circuit card 20, when near field communications functions are required.
  • Figure 2 shows a circuit 100 for a mobile communications device of the kind shown in Figure 1 .
  • VBAT 102 represents the power supply received by the near field communications integrated circuit 14.
  • This power supply may be regulated by an internal regulator 104 of the near field communications integrated circuit 14, e.g. using a transistor 106.
  • the regulated power provided by the internal regulator 104 may be provided to a power supply rail 110 (VDD) of the near field communications integrated circuit 14.
  • the power supply rail 110 may be used to provide regulated power to components (e.g. a processor, memory etc.) of the near field communications integrated circuit 14.
  • the power supply rail 110 may have an internal or external capacitance CVDD 108.
  • the power supply rail 110 may, for instance, operate at 1.8V.
  • SIMVCC 116 represents the power supply to the universal integrated circuit card 20 of the mobile communications device 10.
  • the SIMVCC 116 may, for instance, be a power supply pin for the universal integrated circuit card 20.
  • SIMVCC 116 has an external capacitance CSIMVCC 118.
  • PMUVCC 112 represents the main internal power supply of the mobile communications device 10 (which may be provided by a power management unit of the mobile communications device 10).
  • a control signal 122 may be asserted to switch on transistor 114, for providing power to SIMVCC 116 from PMUVCC 122.
  • the control signal 122 may be de-asserted.
  • a control signal 126 may be asserted to switch on transistor 120, to connect SIMVCC 116 to ground, thereby to ensure that no power is provided to SIMVCC 116.
  • the near field communications integrated circuit 14 may provide power to the universal integrated circuit card 20 - this may be implemented by coupling the power supply rail 110 to SIMVCC 116.
  • control signal 124 may be asserted for switching on transistor 128, thereby to provide a path from the power supply rail 110 to SIMVCC 116.
  • Control signal 126 may also be de-asserted, to switch off transistor 120, thereby to disconnect SIMVCC 116 from ground.
  • transistor 128 were to be fully switched on immediately, this may give rise to the aforementioned current peak that may be drawn to load an external capacitance CSIMCC 118 on the universal integrated circuit card supply. This may in turn lead to a drop in voltage on the power supply rail 110 as the transistor 128 is switched on. This drop in voltage may cause a reset of the near field communications integrated circuit 14, or other functionality problems relating to the operation of the internal components (e.g. a processor, memory etc.) of the near field communications integrated circuit 14, which are also supplied from the power supply rail 110.
  • the internal components e.g. a processor, memory etc.
  • the transistor 128 may typically be low ohmic (that is to say that the transistor 128 has a low on state resistance R on ), so that the power supply provided to the universal integrated circuit card 20 by the near field communications integrated circuit 14 with minimal losses (e.g. to comply with the ETSI standard (1.62V @ 10mA).
  • the low on state resistance R on of the transistor 128 may exacerbate the above mentioned problem relating to the current peak that may be drawn to load an external capacitance on the universal integrated circuit card supply.
  • the near field communications integrated circuit 14 is provided with a current control circuit 130.
  • the current control circuit 130 may operate to manage the switching on of the transistor 128.
  • the current control circuit 130 may operate to limit the flow of current from the power supply rail 110 to SIMVCC 116, until it is safe to fully turn on the transistor 128 without causing a voltage drop on the power supply rail 110.
  • FIGS 3 and 4 show a circuit 200 for a mobile communications device of the kind shown in Figure 1 , in accordance with an embodiment of this disclosure.
  • the circuit 200 in Figures 3 and 4 incorporates features implementing the current control circuit 130 shown in Figure 2 , as well as the transistor 128, the power supply rail 110, and SIMVCC 116.
  • the circuit 200 includes a first switch 228 and a second switch 214, which are used to implement the current control function as the transistor 128 is being switched on.
  • the switching on of the transistor 128 may comprise two main stages.
  • Figure 3 shows the circuit 200 with the first switch 228 and the second switch 214 configured for the first stage
  • Figure 4 shows the circuit 200 with the first switch 228 and the second switch 214 configured for the second stage.
  • the circuit 200 includes a first transistor 128, which corresponds to the transistor 128 described above in relation to Figure 2 .
  • the circuit 200 also includes a second transistor 204, a third transistor 210 and a fourth transistor 208.
  • the transistors 128, 204, 208, 210 may each be a p-type MOSFET, although this is not essential, and other kinds of transistor may be used instead.
  • each transistor 128, 204, 208, 210 will be of the same type (i.e. p-type or n-type).
  • the circuit 200 also includes a first switch 228 and a second switch 214.
  • Each switch 228, 214 may be implemented using a transistor.
  • Each transistor 128, 204, 208, 210 may be implemented using a MISFET (e.g. a MOSFET). Any suitable kind of MISFET may be chosen (e.g. enhancement/depletion mode transistors may used).
  • a gate of the first transistor 128 is coupleable to reference potential via the second switch 214. When the second switch is closed, the gate of the first transistor 128 is connected to the reference potential, which may be chosen such that the closing of the second switch 214 causes the first transistor 128 to be fully switched on.
  • the reference potential may, for instance be ground.
  • the second transistor 204 has a gate coupleable to the gate of the first transistor 128 via the first switch 228. Accordingly, the gates of the first transistor 128 and the second transistor 204 may be selectively coupled and decoupled by closing and opening the first switch 228.
  • the gates of the third transistor 210 and a fourth transistor 208 are coupled together.
  • the second transistor 204 and the fourth transistor 208 are coupled in series between the power supply rail 110 and a first current source 222.
  • the first transistor 128 and the third transistor 210 are coupled in series between the power supply rail 110 and a second current source 224.
  • Each current source 222, 224 provides a reference current (I1, I2).
  • a node located between the fourth transistor 208 and the first current source 222 is coupled to a node located between the gate of the second transistor 204 and the first switch 228.
  • a node located between the third transistor 210 and the second current source 224 is coupled to the gates of the third transistor 210 and fourth transistor 208.
  • first switch 228 In the first stage of switching on the first transistor 128, the first switch 228 is closed and the second switch 214 is open (as shown in Figure 3 ). In the second stage of switching on the first transistor 128, the first switch 228 is open and the second switch 214 is closed (as shown in Figure 4 ).
  • the switches 228, 214 are controlled by the current control circuit 130 using control signals.
  • a first control signal 240 (SW_DIS) is used to open and close the first switch 228 and a second control signal 230 (SW_EN) is used to open and close the second switch 214.
  • the circuit 200 may be provided with further features for generating the first control signal 240 and the second control signal 230. These will now be described below.
  • the current control circuit may further comprise a fifth transistor 206.
  • the fifth transistor 206 may be coupled in series with the first transistor 128 and a third current source 226.
  • the third current source 226 provides a reference current (I3).
  • the fifth transistor 206 may be implemented using a MISFET (e.g. a MOSFET). Any suitable kind of MISFET may be chosen (e.g. enhancement/depletion mode transistors may used).
  • the fifth transistor 206 is the same type (i.e. p-type or n-type) as the first transistor 128.
  • the fifth transistor 206 may have a gate that is coupled to a node located between the first switch 228 and the gate of the first transistor 128.
  • the fifth transistor 206 may also have a first current terminal (the source in this example) coupled to a node located between the first transistor 128 and a power supply output of the near field communications integrated circuit 14.
  • the power supply output of the near field communications integrated circuit 14 is represented in Figures 3 and 4 as SIMVCC 116.
  • the fifth transistor 206 may also have a second current terminal (the drain in this example) coupled to the third current source 226.
  • the current control circuit 130 may be operable to produce first control signal 240 and the second control signal 230 dependent upon a current at the second current terminal of the fifth transistor 206.
  • the current control circuit 130 may further include a sixth transistor 212 and a seventh transistor 220.
  • the sixth transistor 212 and the seventh transistor 220 form a current mirror. As shown in Figures 3 and 4 , to implement the current mirror:
  • the input of the current mirror is coupled to a node located between the second current terminal of the firth transistor 206 and the third current source 226.
  • the input of the current mirror measures a difference between the current at the second current terminal of the firth transistor 206 and the reference current provided by third current source 226.
  • the current at the output of the current mirror is governed by this difference.
  • the output of the current mirror may be coupled to the power supply rail 110 via a fourth current source 227.
  • the fourth current source 227 provides a reference current (I4).
  • the current control circuit is operable to use the output of the current mirror to produce the first control signal 240 and the second control signal 230.
  • the current control circuit 130 may further include a latch 250.
  • the latch 250 may have an input that is coupled to the output of the current mirror.
  • An inverter 242 may be coupled between the input of the latch 250 and the output of the current mirror. Accordingly, the output of the current mirror may be used to set/reset the latch 250.
  • the latch 250 may also have an output.
  • the output of the latch 250 may be coupled to the first switch 228 via an inverter 244. This can allow the latch 250 and inverter 244 to produce the first control signal 240 and supply it to first switch 228.
  • the output of the latch 250 may also be coupled to the second switch 214. This can allow the latch 250 to produce the second control signal 230 and supply it to second switch 214. Note that when the output of the latch 250 is low, the first control signal 240 is high, whereby the first switch 228 is closed, and second control signal 230 is low, whereby the second switch 214 is open (see Figure 3 ). Conversely, when the output of the latch 250 is high, the first control signal 240 is low, whereby the first switch 228 is open, and second control signal 230 is high, whereby the second switch 214 is closed (see Figure 4 ).
  • the switching on of the first transistor 128 may be implemented in two stages. In the first stage:
  • the current I load (see Figure 3 ) is initially associated with loading the external capacitance CSIMCC 118 on the universal integrated circuit card supply SIMVCC 116.
  • I load may be fixed by the first current source 222 (which provides the first reference current I1) and the ratio of the first transistor 128 to the second transistor 204.
  • the third transistor 210 and the fourth transistor 208 can ensure that the drain to source voltage V ds of the first transistor 128 copies to the second transistor 204.
  • the third transistor 210 and the fourth transistor 208 may be substantially matched, to obtain the same drain voltage on the first transistor 128 and the second transistor 204, thereby to allow a good copy of V ds to be made in this way.
  • SIMVCC 116 is low. Accordingly, the gate to source voltage V gs of the fifth transistor 206 is greater than zero. Because of this the second current terminal of the fifth transistor 206, and consequently the input to the current mirror remain low. Therefore, the first control signal 240 remains high and the second control signal 230 remains low.
  • the voltage at SIMVCC 116 will begin to rise. Consequently, the fifth transistor 206 will, at some point, begin to conduct. As the voltage at SIMVCC 116 continues to rise, the current in the fifth transistor 206 will eventually exceed the reference current (I3) provided by the third current source 226. Because of this, current will begin to flow into input of the current mirror (in this example, the sixth transistor 212 begins to conduct), which in turn will pull down the output (COMP_OUT) of the current mirror. This pulling down of the output (COMP_OUT) of the current mirror will, via the inverter 242, cause the latch 250 to be set, initiating the second stage of the switching on of the first transistor 128.
  • I3 reference current
  • the setting of the latch 250 changes the state of the first control signal 240 (via the inverter 244) from high to low and the second control signal 230 changes state from low to high.
  • This causes the first switch 128 to open, which decouples the gate of the first transistor 128 from the gate of the second transistor 204.
  • This also causes the second switch 214 to close which couples the gate of the first transistor 128 to a reference voltage (e.g. ground), which causes the first transistor 128 to be fully switched on, allowing the first transistor 128 to provide a (e.g. low ohmic, compliant with the ETSI standard (1.62V @ 10ma)) path to pass current from the power supply rail 110 to SIMVCC 116.
  • a reference voltage e.g. ground
  • the reference current (I3) provided by the third current source 226 may be chosen such that the second current terminal of the sixth transistor 212 and accordingly the input (CHECK) of the current mirror, goes high once this voltage condition is reached.
  • the first transistor 128 and the second transistor 204 may be substantially matched. This can allow a copy of the reference current I1 to be obtained, in order to limit the current I load in the first stage.
  • the first transistor 128 and the fifth transistor 206 may be substantially matched. This can allow the fifth transistor 206 to be used accurately to detect desaturation in the first transistor 128.
  • the ratio between the first transistor 128 and the second transistor 204 may be substantially the same as the ratio between the third transistor 210 and the fourth transistor 208, as well as the ratio between the reference currents (I1, I2) provided by the first current source 222 and the second current source 224.
  • the integrated circuit includes a power supply rail for providing a regulated supply of power to components within the integrated circuit.
  • the integrated circuit also includes a first transistor coupled between the power supply rail and a power supply output of the integrated circuit for selectively providing power to a universal integrated circuit card (UICC) of the mobile communications device from the power supply rail while the mobile communications device is in an off state.
  • the integrated circuit further includes a current control circuit for controlling the operation of the first transistor to prevent a drop in voltage on the power supply rail as the first transistor is switched to an on state to couple the power supply rail to the power supply output.

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  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
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  • Semiconductor Integrated Circuits (AREA)
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Claims (12)

  1. Circuit intégré de communication en champ proche (NFC) (14) pour un dispositif de communication mobile, le circuit intégré comprenant :
    un rail d'alimentation électrique (110) pour assurer une alimentation électrique régulée sur des composants à l'intérieur du circuit intégré ;
    un premier transistor (128) couplé entre le rail d'alimentation électrique et une sortie d'alimentation électrique (116) du circuit intégré pour fournir sélectivement de l'énergie électrique à une carte à circuit intégré universelle (UICC) du dispositif de communication mobile depuis le rail d'alimentation électrique tandis que le dispositif de communication mobile est dans un état désactivé ; et
    un circuit de commande de courant (130) pour commander le fonctionnement du premier transistor pour empêcher une chute de la tension sur le rail d'alimentation électrique lorsque le premier transistor est commuté dans un état activé pour coupler le rail d'alimentation électrique sur la sortie d'alimentation électrique,
    caractérisé en ce que le circuit de commande de courant comprend :
    un premier commutateur (228) ;
    un second commutateur (214), dans lequel une grille du premier transistor peut être couplée à un potentiel de référence via le second commutateur ;
    un deuxième transistor (204) comportant une grille pouvant être couplée à la grille du premier transistor via le premier commutateur, et
    un troisième transistor (210) et un quatrième transistor (208), dans lequel une grille du troisième transistor est couplée à une grille du quatrième transistor,
    dans lequel le deuxième transistor et le quatrième transistor sont couplés en série entre le rail d'alimentation électrique et une première source de courant (222), le deuxième transistor étant couplé au rail d'alimentation électrique et le quatrième transistor étant couplé à la première source de courant,
    dans lequel le premier transistor et le troisième transistor sont couplés en série entre le rail d'alimentation électrique et une deuxième source de courant (224), le premier transistor étant couplé au rail d'alimentation électrique et le troisième transistor étant couplé à la deuxième source de courant,
    dans lequel un noeud localisé entre le quatrième transistor et la première source de courant est couplé à un noeud localisé entre la grille du deuxième transistor et le premier commutateur, et
    dans lequel un noeud localisé entre le troisième transistor et la deuxième source de courant est couplé aux grilles du troisième transistor et du quatrième transistor.
  2. Circuit intégré selon la revendication 1, dans lequel le circuit de commande de courant peut être rendu opérationnel au niveau d'une étape initiale pour commuter le premier transistor dans l'état activé pour fermer le premier commutateur et pour ouvrir le second commutateur, d'où il résulte qu'une circulation de courant depuis le rail d'alimentation électrique jusqu'à la sortie d'alimentation électrique est gouvernée par un rapport de courants circulant au travers du premier transistor et du deuxième transistor.
  3. Circuit intégré selon la revendication 2, dans lequel le circuit de commande de courant peut être rendu opérationnel au niveau d'une étape suivante pour commuter le premier transistor dans l'état activé pour ouvrir le premier commutateur et pour fermer le deuxième commutateur, d'où il résulte que le premier transistor est complètement commuté dans ledit état activé pour fournir de l'énergie électrique depuis le rail d'alimentation électrique sur la sortie d'alimentation électrique.
  4. Circuit intégré selon l'une quelconque des revendications précédentes, dans lequel le circuit de commande de courant comprend en outre un cinquième transistor couplé en série avec le premier transistor et une troisième source de courant, le cinquième transistor comportant :
    une grille couplée à un noeud localisé entre le premier commutateur et la grille du premier transistor ;
    une première borne de courant couplée à un noeud localisé entre le premier transistor et la sortie d'alimentation électrique ; et
    une seconde borne de courant couplée à ladite troisième source de courant,
    dans lequel le circuit de commande de courant peut être rendu opérationnel pour produire des signaux de commande pour le fonctionnement du premier commutateur et du second commutateur en fonction d'un courant au niveau de ladite seconde borne de courant.
  5. Circuit intégré selon la revendication 4, dans lequel le circuit de commande de courant comprend en outre un sixième transistor et un septième transistor formant un miroir de courant, dans lequel :
    une entrée du miroir de courant est couplée à un noeud localisé entre la seconde borne de courant du cinquième transistor et la troisième source de courant ; et
    dans lequel le circuit de commande de courant peut être rendu opérationnel pour utiliser une sortie du miroir de courant pour produire lesdits signaux de commande.
  6. Circuit intégré selon la revendication 5, dans lequel le circuit de commande de courant comprend en outre un moyen de verrouillage comportant :
    une entrée couplée sur la sortie du miroir de courant ; et
    une sortie couplée sur :
    le premier commutateur via un inverseur, pour appliquer un premier dit signal de commande sur le second commutateur ; et
    le second commutateur pour appliquer un second dit signal de commande sur le second commutateur.
  7. Circuit intégré selon l'une quelconque des revendications 4 à 6, dans lequel les premier et cinquième transistors sont sensiblement en adaptation.
  8. Circuit intégré selon l'une quelconque des revendications précédentes, dans lequel les premier et deuxième transistors sont sensiblement en adaptation.
  9. Circuit intégré selon l'une quelconque des revendications précédentes, dans lequel les troisième et quatrième transistors sont sensiblement en adaptation.
  10. Dispositif de communication mobile incluant le circuit intégré de communication en champ proche (NFC) selon l'une quelconque des revendications précédentes.
  11. Dispositif de communication mobile selon la revendication 10, comprenant en outre ladite carte à circuit intégré universelle (UICC).
  12. Dispositif de communication mobile selon la revendication 11, dans lequel le dispositif de communication mobile peut être rendu opérationnel pour fournir de l'énergie électrique à la carte à circuit intégré universelle sans fournir de l'énergie électrique à la carte à circuit intégré universelle depuis le circuit intégré de communication en champ proche (NFC) lorsque le dispositif de communication mobile est dans un état activé.
EP19305792.4A 2019-06-20 2019-06-20 Ci de communication en champ proche et procédé pour dispositif de communication mobile Active EP3754848B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP19305792.4A EP3754848B1 (fr) 2019-06-20 2019-06-20 Ci de communication en champ proche et procédé pour dispositif de communication mobile
CN202010499802.7A CN112118032B (zh) 2019-06-20 2020-06-04 用于移动通信装置的近场通信集成电路、移动通信装置及其操作方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP19305792.4A EP3754848B1 (fr) 2019-06-20 2019-06-20 Ci de communication en champ proche et procédé pour dispositif de communication mobile

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EP3754848A1 EP3754848A1 (fr) 2020-12-23
EP3754848B1 true EP3754848B1 (fr) 2023-11-15

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CN (1) CN112118032B (fr)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5080424B2 (ja) * 2008-11-10 2012-11-21 富士通テレコムネットワークス株式会社 電源装置
JP5587135B2 (ja) * 2010-10-28 2014-09-10 ルネサスエレクトロニクス株式会社 無線通信用半導体装置
US9236912B2 (en) * 2011-11-22 2016-01-12 Fairchild Semiconductor Corporation Dual input single output power multiplexer for near field communication application
CN103390379B (zh) * 2012-05-11 2016-08-31 意法半导体研发(深圳)有限公司 用于功率驱动器电路应用的电流斜率控制装置
EP2738671B1 (fr) * 2012-12-03 2017-08-23 Nxp B.V. Procédé et système pour commander des opérations dans un dispositif de communication mobile qui est activé pour une communication en champ proche (NFC)
WO2016183736A1 (fr) * 2015-05-15 2016-11-24 华为技术有限公司 Dispositif mobile ayant une fonction de communication sans fil en champ proche
EP3125065B1 (fr) * 2015-07-31 2018-12-19 Power Integrations Switzerland GmbH Communiquant à travers une isolation galvanique

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CN112118032A (zh) 2020-12-22
EP3754848A1 (fr) 2020-12-23
CN112118032B (zh) 2023-05-26

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