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EP2629329A3 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

Info

Publication number
EP2629329A3
EP2629329A3 EP13154314.2A EP13154314A EP2629329A3 EP 2629329 A3 EP2629329 A3 EP 2629329A3 EP 13154314 A EP13154314 A EP 13154314A EP 2629329 A3 EP2629329 A3 EP 2629329A3
Authority
EP
European Patent Office
Prior art keywords
principal surface
semiconductor device
pectinate
downsizing
heat dissipation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP13154314.2A
Other languages
German (de)
French (fr)
Other versions
EP2629329A2 (en
Inventor
Tomoaki Uno
Tetsuya Kawashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of EP2629329A2 publication Critical patent/EP2629329A2/en
Publication of EP2629329A3 publication Critical patent/EP2629329A3/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
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    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Dc-Dc Converters (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Wire Bonding (AREA)

Abstract

A conventional semiconductor device used for a power supply circuit such as a DC/DC converter has problems of heat dissipation and downsizing, in particular has the problems of heat dissipation and others in the event of downsizing.
A semiconductor device has a structure formed by covering a principal surface of a semiconductor chip having the principal surface and a plurality of MIS type FETs formed over the principal surface with a plurality of metal plate wires having pectinate shapes; allocating the pectinate parts alternately in a planar view over the principal surface; and further electrically coupling the plural metal plate wires to a plurality of terminals.
EP13154314.2A 2012-02-15 2013-02-07 Semiconductor device and manufacturing method thereof Withdrawn EP2629329A3 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012030383A JP5787784B2 (en) 2012-02-15 2012-02-15 Semiconductor device

Publications (2)

Publication Number Publication Date
EP2629329A2 EP2629329A2 (en) 2013-08-21
EP2629329A3 true EP2629329A3 (en) 2017-07-12

Family

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EP13154314.2A Withdrawn EP2629329A3 (en) 2012-02-15 2013-02-07 Semiconductor device and manufacturing method thereof

Country Status (6)

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US (2) US9236321B2 (en)
EP (1) EP2629329A3 (en)
JP (1) JP5787784B2 (en)
KR (1) KR20130094234A (en)
CN (1) CN103268877B (en)
TW (1) TWI601269B (en)

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TWI607675B (en) * 2013-12-13 2017-12-01 台達電子企業管理（上海）有限公司 Dc/dc power module and dc/dc power system assembly
JP6444647B2 (en) * 2014-08-06 2018-12-26 ルネサスエレクトロニクス株式会社 Semiconductor device
US9324819B1 (en) 2014-11-26 2016-04-26 Delta Electronics, Inc. Semiconductor device
US10600753B2 (en) 2015-08-28 2020-03-24 Texas Instruments Incorporated Flip chip backside mechanical die grounding techniques
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JP6694588B2 (en) * 2016-06-01 2020-05-20 株式会社ジェイテクト Semiconductor module
JP2019046991A (en) * 2017-09-04 2019-03-22 ルネサスエレクトロニクス株式会社 Semiconductor device and method of manufacturing the same
WO2019054998A1 (en) * 2017-09-13 2019-03-21 Intel Corporation Active silicon bridge
JP2019114675A (en) * 2017-12-25 2019-07-11 ルネサスエレクトロニクス株式会社 Semiconductor device
CN109742069A (en) * 2019-02-28 2019-05-10 深圳市泰德半导体有限公司 Power supply chip encapsulating structure
JP7548714B2 (en) 2019-03-25 2024-09-10 ローム株式会社 Electronic device, method for manufacturing electronic device, and lead frame
CN111463188B (en) * 2020-05-03 2025-02-18 矽力杰半导体技术(杭州)有限公司 Packaging structure for power converters
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Also Published As

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US9236321B2 (en) 2016-01-12
JP2013168475A (en) 2013-08-29
EP2629329A2 (en) 2013-08-21
US20130207256A1 (en) 2013-08-15
CN103268877B (en) 2017-04-12
TW201349456A (en) 2013-12-01
TWI601269B (en) 2017-10-01
JP5787784B2 (en) 2015-09-30
KR20130094234A (en) 2013-08-23
CN103268877A (en) 2013-08-28
US20160049315A1 (en) 2016-02-18

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