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EP2394275B1 - Electrical multilayered component - Google Patents

Electrical multilayered component Download PDF

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Publication number
EP2394275B1
EP2394275B1 EP10701703.0A EP10701703A EP2394275B1 EP 2394275 B1 EP2394275 B1 EP 2394275B1 EP 10701703 A EP10701703 A EP 10701703A EP 2394275 B1 EP2394275 B1 EP 2394275B1
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EP
European Patent Office
Prior art keywords
electrical component
component according
layer
dielectric layer
multilayer electrical
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EP10701703.0A
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German (de)
French (fr)
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EP2394275A1 (en
Inventor
Thomas Feichtinger
Georg Krenn
Thomas Pürstinger
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TDK Electronics AG
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TDK Electronics AG
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/102Varistor boundary, e.g. surface layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/12Overvoltage protection resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/18Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals

Definitions

  • DE 10 2004 058 410 A1 is an electrical multilayer component with ESD protection element known.
  • DE 10 2004 010001 A1 an electrical component which has a stack of ceramic layers which form a base body and electrode layers arranged therebetween, which form a capacitor. A phase shifter is applied to a ceramic layer.
  • the electrode layers are electrically conductively connected by means of through-contacts running in the interior of the main body with contact surfaces.
  • the invention is defined by the features of claim 1.
  • the object of the present invention is to specify a multilayer electrical component comprising an ESD protection device with a low breakdown voltage and a low ESD clamping voltage.
  • an electrical multilayer component having a base body with at least two outer electrodes.
  • the electrical multilayer component has at least one first and at least one second inner electrode, which are electrically conductively connected to one outer electrode each are.
  • the inner electrode is connected directly or via plated-through holes in the multilayer component with the outer electrode.
  • the electrical multilayer component has at least one ceramic varistor layer.
  • the ceramic varistor layer comprises at least the first inner electrode.
  • the first inner electrode is preferably largely surrounded by the ceramic varistor layer, wherein the first inner electrode is freely contactable at least in the region of the contact to the outer electrode.
  • the first inner electrode is applied directly to the varistor layer.
  • the multilayer electrical component comprises at least one dielectric layer.
  • the dielectric layer is arranged at least between a varistor layer and at least one further layer.
  • the further layer comprises the second inner electrode.
  • the second inner electrode is largely enclosed by the further layer, wherein the second inner electrode is freely contactable at least in the region of the contact with its outer electrode.
  • the second inner electrode is preferably applied directly to the further layer.
  • the dielectric layer has at least one opening.
  • the opening may be formed as a breakthrough, as a recess or as a cavity.
  • the opening in the dielectric layer is filled with a semiconducting material or a metal. Preferably, the opening is completely filled. In a further embodiment, however, single or multiple closed or open cavities are present in the filling of the opening.
  • the semiconductive material with which one or more openings in the dielectric layer are filled comprises a varistor ceramic.
  • the varistor ceramic, with which the opening in the dielectric layer is filled, is preferably identical to the varistor ceramic of the further varistor layer.
  • the varistor ceramic in the opening of the dielectric layer is different from the ceramic of the varistor layer.
  • the semiconducting material comprises a resistance material.
  • the metal with which one or more openings of a dielectric layer are filled comprises a metal, which preferably comprises silver, palladium, platinum, silver palladium or other suitable metals.
  • openings in the dielectric layer may be filled with different materials.
  • all openings of a dielectric layer are filled with the same material.
  • the main body of the electrical multilayer component comprises cover packages, which terminate the basic body of the multilayer component in the thickness direction upwards and downwards.
  • the cover packages each comprise at least one dielectric layer.
  • the cover packages of the multilayer electrical component and the dielectric layers having at least one opening may comprise the same material. In a further embodiment, it is also possible for the cover packages and the dielectric layer to comprise different materials.
  • the dielectric layer zirconia (ZrO 2 ) or a zirconia-glass composite
  • the dielectric layers may also comprise other suitable materials.
  • the electrical multilayer component has one or more plated-through holes, so-called vias, with which individual or all internal electrodes of the electrical multilayer component are connected to the external contacts.
  • the external contacts of the electrical multilayer component are formed as an array (row or matrix arrangement).
  • LGA Land Grid Array
  • BGA Ball Grid Array
  • the internal electrodes of the electrical multilayer component are preferably connected to the external contacts via plated-through holes.
  • the dielectric layer which comprises at least one opening, is designed such that it forms an ESD discharge gap together with at least two adjacent varistor layers and two overlapping internal electrodes.
  • the opening in the dielectric layer is filled with a semiconducting material or a metal, in particular by a method of printing on the dielectric layer, in such a way that a so-called catch pad known per se is formed.
  • a via can be arranged thereon, whereby a free-standing electrode structure is formed over the dielectric layer.
  • the electrical multilayer component has the function of a varistor with integrated ESD protection component.
  • the varistor preferably has a capacity of less than 1 pF.
  • the ESD protection component of the multilayer electrical component is preferably designed such that it has an ESD breakdown voltage of less than 20 V at 1 mA current.
  • the ESD protection component of the electrical multilayer component preferably has an ESD clamping voltage of less than 500 V.
  • An electrical multilayer component as described above has a reduction in the total capacitance of the component, especially as a result of the arrangement of the small capacitance of the dielectric layer connected in series with the varistor capacitance.
  • the clamping voltage of the electrical multilayer component is only slightly increased by the dielectric layer compared to conventional multilayer components.
  • the specified clamping voltage of the ESD protection component is essentially dependent on the distance between the inner electrode layers.
  • the total capacitance of the electrical multilayer component is significantly reduced, as a result of which the current-carrying capacity and pulse stability of the component are further increased.
  • FIG. 1 a first embodiment of a multilayer electrical component is shown, which comprises a base body 1. On the side surfaces of the base body 1 are Outer electrodes 2, 2 'are arranged, which are conductively connected to the inside of the main body 1 lying inside electrodes 3, 4.
  • the main body 1 has a varistor layer 5, which comprises a first inner electrode 3.
  • the first inner electrode 3 is largely enclosed by the varistor layer 5.
  • the electrical multilayer component has a further layer 7, which in the illustrated embodiment is designed as a further varistor layer.
  • the further layer 7 comprises a second inner electrode 4, which is largely enclosed by the further layer 7.
  • a dielectric layer 6 is arranged, which has an opening 8.
  • the opening 8 is filled with a semiconductive material or a metal.
  • the main body 1 of the electrical multilayer component is terminated in the thickness direction by cover packages 9, 9 ', the cover packages 9, 9' preferably each comprising at least one dielectric layer.
  • FIG. 2 shows a further embodiment of the electrical multilayer component.
  • the structure of the electric multilayer component is almost identical to the structure in FIG FIG. 1 wherein the first inner electrode 3 is applied on a surface of the varistor layer 5 and the second inner electrode 4 is applied on a surface of the further layer 7.
  • the first inner electrode is arranged between the varistor layer 5 and the cover package 9.
  • the second inner electrode 4 is arranged between the further layer 7 and the further second cover package 9 '.
  • FIG. 3 shows a further embodiment of the electrical multilayer component.
  • the electrical multilayer component has a main body 1 in which a varistor layer 5 is arranged, on which a first inner electrode 3 is arranged. In the thickness direction, the first inner electrode 3 and the varistor layer 5 are closed by a first cover package 9 upwards.
  • a dielectric layer 6 is arranged below the varistor layer 5, which has openings 8. The openings 8 are filled with a semiconducting material or metal.
  • second internal electrodes 4 are arranged on the underside of the dielectric layer 6.
  • the first inner electrode 3 and the second inner electrodes 4 are connected via vias 10 with external contacts 2.
  • the vias 10 can, for example, as in the FIG.
  • the main body 1 of the electrical multilayer component is closed in the thickness direction down by a second cover package 9 '.
  • FIG. 4 a further embodiment of the electrical multilayer component is shown, which corresponds to the embodiment in FIG. 3 is similar, wherein the dielectric layer 6 has the two openings 8.
  • the dielectric layer 6 is arranged in the thickness direction between two layers 5, 7.
  • the two layers 5, 7 are designed as varistor ceramic.
  • the external contacts 2, 2 'of the electrical multilayer component are designed as land grid arrays in the illustrated embodiment.
  • the vias can, for example, as in the FIG. 4 be shown cylindrical or frusto-conical, the vias can, for example, in the direction of the external contacts 2, 2 'or taper towards the internal electrodes 3, 4 out.
  • FIG. 5 shows a further embodiment of the multilayer electrical component, the embodiment of FIG. 1 similar.
  • the dielectric layer 6 in the FIG. 5 has two openings 8, which are filled with a semiconducting material or with a metal.
  • FIG. 6 shows a further embodiment of the electrical multilayer component, wherein the electrical multilayer component comprises three parallel ESD protection elements.
  • the ESD protection elements are each in the FIG. 2 already described in detail.
  • Each of the ESD protection elements comprises a first varistor layer 5 and a further layer 7.
  • the further layer 7 is designed as a further varistor layer in the illustrated embodiment.
  • a dielectric layer 6 is arranged, which has an opening 8.
  • the opening 8 is filled with a semiconductive material or with metal.
  • the ESD protection elements each have a first inner electrode 3 and a second inner electrode 4, wherein the inner electrodes 3, 4 are applied to the varistor layer 5 or to the further layer 7.
  • FIG. 7 shows a further embodiment of the electrical multilayer component.
  • the electrical multilayer component has a base body 1 with cover packages 9, 9 ', the cover packages 9, 9' preferably comprising at least one dielectric layer. Between the cover packages 9, 9 ', a varistor layer 5 and a further layer 7 are arranged, wherein the further layer 7 is designed as a varistor layer. Between the varistor layer 5 and the further layer 7, three dielectric intermediate layers 6 are arranged, which are separated from one another by intermediate layers of a varistor ceramic are spaced in the thickness direction.
  • the dielectric layers 6 each have an opening 8.
  • the openings 8 of the dielectric layers 6 are each filled with a semiconductive material or the opening 8 'with a metal.
  • the electrical multilayer component has internal electrodes 3, 4 which are connected to external contacts 2, 2 '.
  • the first inner electrode 3 is arranged between the varistor layer 5 and the cover package 9.
  • the second inner electrode 4 is arranged between the further layer 7 and the second cover package 9 '.
  • FIG. 8 shows an embodiment in which similar to the embodiments of the FIGS. 3 and 4 a base body 1, a varistor layer 5, a first inner electrode 3, a first cover package 9, a dielectric layer 6 with openings 8, a second cover package 9 ', vias 10 and external contacts 2, 2' are present.
  • the openings 8 are filled with a semiconducting material or metal, so that catch pads 11 are formed, which spread on a surface of the dielectric layer 6 laterally to the openings 8.
  • the catch pads 11 are in the embodiment of the FIG. 8 on the side facing away from the varistor layer 5 side of the dielectric layer 6.
  • the catch pads 11 may be prepared, for example, that the openings are filled by a method of printing with the semiconducting material or metal, so that a proportion of the fillings material used forms the top-side catch pads 11.
  • the catch pads 11 can be like in the FIG. 8 shown provided with the associated vias 10 and so are electrically connected to the external contacts 2 '.
  • the catch pads 11 may act as second internal electrodes. It may additionally second Internal electrodes are provided in electrically conductive connection with the catch pads 11.
  • typical dimensions are a thickness of the dielectric layer 6 of 10 ⁇ m to 30 ⁇ m, a diameter of the openings 8 of 20 ⁇ m to 30 ⁇ m, a diameter of the catch pads 11 of about 100 ⁇ m, a thickness of the catch pads of FIG ⁇ m to 5 ⁇ m and a height of a vias 10 plus catch pad 11 of about 50 ⁇ m.
  • the vias 10 may be cylindrical or conical.
  • FIG. 9 shows a further embodiment, in which similar to the embodiment according to FIG. 8 a base body 1, a varistor layer 5, a first inner electrode 3, a first cover package 9, a dielectric layer 6 with openings 8, a second cover package 9 ', vias 10 and external contacts 2, 2' are present.
  • the openings 8 are filled with a semiconducting material or metal, so that catch pads 11 are formed, which spread on a surface of the dielectric layer 6 laterally to the openings 8.
  • the catch pads 11 are in the embodiment of the FIG. 9
  • Second inner electrodes 4 are arranged on the side facing away from the varistor layer 5 side of the dielectric layer 6 and electrically connected via vias 10 with external contacts 2 '.
  • the dimensions, in particular the openings 8 and the catch pads 11, the above to the embodiment of the FIG. 8 corresponding dimensions.
  • the electrical multilayer component comprises a plurality of ESD protection devices connected in series or in parallel, which are protected by at least a dielectric layer having one or more openings and at least one adjacent varistor layer are formed.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Thermistors And Varistors (AREA)
  • General Electrical Machinery Utilizing Piezoelectricity, Electrostriction Or Magnetostriction (AREA)

Description

Aus der Druckschrift DE 10 2004 058 410 A1 ist ein elektrisches Vielschichtbauelement mit ESD-Schutzelement bekannt. In DE 10 2004 010001 A1 ist ein elektrisches Bauelement beschrieben, das einen Stapel aus keramischen Schichten, die einen Grundkƶrper bilden, und dazwischen angeordnete Elektrodenschichten, die einen Kondensator bilden, aufweist. Ein Phasenschieber ist auf einer keramischen Schicht aufgebracht. Die Elektrodenschichten sind mittels im Innern des Grundkƶrpers verlaufenden Durchkontaktierungen mit KontaktflƤchen elektrisch leitend verbunden.From the publication DE 10 2004 058 410 A1 is an electrical multilayer component with ESD protection element known. In DE 10 2004 010001 A1 For example, an electrical component is described which has a stack of ceramic layers which form a base body and electrode layers arranged therebetween, which form a capacitor. A phase shifter is applied to a ceramic layer. The electrode layers are electrically conductively connected by means of through-contacts running in the interior of the main body with contact surfaces.

Die Erfindung ist durch die Merkmale des Anspruchs 1 definiert.The invention is defined by the features of claim 1.

Aufgabe der vorliegenden Erfindung ist es, ein elektrisches Vielschichtbauelement anzugeben, das ein ESD-Schutzbauelement mit einer niedrigen Durchbruchspannung und einer niedrigen ESD-Klemmspannung umfasst.The object of the present invention is to specify a multilayer electrical component comprising an ESD protection device with a low breakdown voltage and a low ESD clamping voltage.

Diese Aufgabe wird durch ein elektrisches Vielschichtbauelement nach Anspruch 1 gelöst. Vorteilhafte Ausgestaltungen des elektrischen Vielschichtbauelements sind Gegenstand der abhängigen Ansprüche.This object is achieved by an electrical multilayer component according to claim 1. Advantageous embodiments of the electrical multilayer component are the subject of the dependent claims.

Es wird ein elektrisches Vielschichtbauelement angegeben, das einen Grundkörper mit wenigstens zwei Außenelektroden aufweist. Das elektrische Vielschichtbauelement weist wenigstens eine erste und wenigstens eine zweite Innenelektrode auf, die elektrisch leitend mit je einer Außenelektrode verbunden sind. Die Innenelektrode ist direkt oder über Durchkontaktierungen im Vielschichtbauelement mit der Außenelektrode verbunden.It is specified an electrical multilayer component having a base body with at least two outer electrodes. The electrical multilayer component has at least one first and at least one second inner electrode, which are electrically conductively connected to one outer electrode each are. The inner electrode is connected directly or via plated-through holes in the multilayer component with the outer electrode.

Das elektrische Vielschichtbauelement weist wenigstens eine keramische Varistorschicht auf. Die keramische Varistorschicht umfasst wenigstens die erste Innenelektrode. Die erste Innenelektrode ist vorzugsweise größtenteils von der keramischen Varistorschicht umschlossen, wobei die erste Innenelektrode wenigstens im Bereich des Kontakts zu deren Außenelektrode frei kontaktierbar ist. In einer weiteren Ausführungsform ist die erste Innenelektrode direkt auf der Varistorschicht aufgebracht.The electrical multilayer component has at least one ceramic varistor layer. The ceramic varistor layer comprises at least the first inner electrode. The first inner electrode is preferably largely surrounded by the ceramic varistor layer, wherein the first inner electrode is freely contactable at least in the region of the contact to the outer electrode. In another Embodiment, the first inner electrode is applied directly to the varistor layer.

Das elektrische Vielschichtbauelement umfasst wenigstens eine dielektrische Schicht. Die dielektrische Schicht ist wenigstens zwischen einer Varistorschicht und wenigstens einer weiteren Schicht angeordnet.The multilayer electrical component comprises at least one dielectric layer. The dielectric layer is arranged at least between a varistor layer and at least one further layer.

Vorzugsweise umfasst die weitere Schicht die zweite Innenelektrode. In einer Ausführungsform ist die zweite Innenelektrode von der weiteren Schicht größtenteils umschlossen, wobei die zweite Innenelektrode wenigstens im Bereich des Kontakts zu deren Außenelektrode frei kontaktierbar ist. In einer weiteren Ausführungsform ist die zweite Innenelektrode vorzugsweise direkt auf der weiteren Schicht aufgebracht.Preferably, the further layer comprises the second inner electrode. In one embodiment, the second inner electrode is largely enclosed by the further layer, wherein the second inner electrode is freely contactable at least in the region of the contact with its outer electrode. In a further embodiment, the second inner electrode is preferably applied directly to the further layer.

Die dielektrische Schicht weist wenigstens eine Ɩffnung auf. Die Ɩffnung kann als Durchbruch, als Aussparung beziehungsweise als eine KavitƤt ausgebildet sein. Die Ɩffnung in der dielektrischen Schicht ist mit einem halbleitenden Material oder einem Metall gefüllt. Vorzugsweise ist die Ɩffnung vollstƤndig gefüllt. In einer weiteren Ausführungsform sind jedoch auch einzelne oder mehrere geschlossene oder offene KavitƤten in der Füllung der Ɩffnung vorhanden.The dielectric layer has at least one opening. The opening may be formed as a breakthrough, as a recess or as a cavity. The opening in the dielectric layer is filled with a semiconducting material or a metal. Preferably, the opening is completely filled. In a further embodiment, however, single or multiple closed or open cavities are present in the filling of the opening.

In einer Ausführungsform umfasst das halbleitende Material, mit dem eine oder mehrere Ɩffnungen in der dielektrischen Schicht gefüllt sind, eine Varistorkeramik. Die Varistorkeramik, mit der die Ɩffnung in der dielektrischen Schicht gefüllt ist, ist vorzugsweise identisch mit der Varistorkeramik der weiteren Varistorschicht.In an embodiment, the semiconductive material with which one or more openings in the dielectric layer are filled comprises a varistor ceramic. The varistor ceramic, with which the opening in the dielectric layer is filled, is preferably identical to the varistor ceramic of the further varistor layer.

In einer weiteren Ausführungsform ist die Varistorkeramik in der Ɩffnung der dielektrischen Schicht unterschiedlich zu der Keramik der Varistorschicht.In a further embodiment, the varistor ceramic in the opening of the dielectric layer is different from the ceramic of the varistor layer.

In einer weiteren Ausführungsform umfasst das halbleitende Material ein Widerstandsmaterial.In a further embodiment, the semiconducting material comprises a resistance material.

In einer Ausführungsform umfasst das Metall, mit dem eine oder mehrere Ɩffnungen einer dielektrischen Schicht gefüllt sind, ein Metall, das vorzugsweise Silber, Palladium, Platin, Silberpalladium oder weitere geeignete Metalle umfasst.In an embodiment, the metal with which one or more openings of a dielectric layer are filled comprises a metal, which preferably comprises silver, palladium, platinum, silver palladium or other suitable metals.

In einer Ausführungsform kƶnnen Ɩffnungen in der dielektrischen Schicht mit unterschiedlichen Materialien gefüllt sein. Vorzugsweise sind alle Ɩffnungen einer dielektrischen Schicht mit dem gleichen Material gefüllt.In one embodiment, openings in the dielectric layer may be filled with different materials. Preferably, all openings of a dielectric layer are filled with the same material.

In einer Ausführungsform umfasst der Grundkörper des elektrischen Vielschichtbauelements Deckpakete, die den Grundkörper des Vielschichtbauelements in Dickenrichtung nach oben und unten abschließen. Die Deckpakete umfassen jeweils wenigstens eine dielektrische Schicht.In one embodiment, the main body of the electrical multilayer component comprises cover packages, which terminate the basic body of the multilayer component in the thickness direction upwards and downwards. The cover packages each comprise at least one dielectric layer.

In einer Ausführungsform kƶnnen die Deckpakete des elektrischen Vielschichtbauelements und die dielektrischen Schichten, die wenigstens eine Ɩffnung aufweisen, das gleiche Material umfassen. In einer weiteren Ausführungsform ist es auch mƶglich, dass die Deckpakete und die dielektrische Schicht unterschiedliche Materialien umfassen.In an embodiment, the cover packages of the multilayer electrical component and the dielectric layers having at least one opening may comprise the same material. In a further embodiment, it is also possible for the cover packages and the dielectric layer to comprise different materials.

Vorzugsweise wird für die dielektrische Schicht ein Zirkoniumoxid (ZrO2) beziehungsweise ein Zirkoniumoxid-Glas-Komposit, ein Aluminiumoxid (AlOx) beziehungsweise ein Aluminiumoxid-Glas-Komposit, ein Manganoxid (MnO) beziehungsweise ein Manganoxid-Glas verwendet. Die dielektrischen Schichten können jedoch auch weitere geeignete Materialien umfassen.Preferably, for the dielectric layer zirconia (ZrO 2 ) or a zirconia-glass composite, an alumina (AlO x ) or a Alumina-glass composite, a manganese oxide (MnO) or a manganese oxide glass used. However, the dielectric layers may also comprise other suitable materials.

In einer Ausführungsform weist das elektrische Vielschichtbauelement einzelne oder mehrere Durchkontaktierungen, so genannte Vias auf, mit denen einzelne oder alle Innenelektroden des elektrischen Vielschichtbauelements mit den Außenkontakten verbunden sind.In one embodiment, the electrical multilayer component has one or more plated-through holes, so-called vias, with which individual or all internal electrodes of the electrical multilayer component are connected to the external contacts.

In einer Ausführungsform sind die Außenkontakte des elektrischen Vielschichtbauelements als Array (Reihen- oder Matrixanordnung) ausgebildet. Hierbei sind besonders Land-Grid-Array (LGA) oder Ball-Grid-Array (BGA) geeignet.In one embodiment, the external contacts of the electrical multilayer component are formed as an array (row or matrix arrangement). In particular Land Grid Array (LGA) or Ball Grid Array (BGA) are suitable.

Bei der Kontaktierung des elektrischen Vielschichtbauelements über Arrays (LGA, BGA) sind die Innenelektroden des elektrischen Vielschichtbauelements vorzugsweise über Durchkontaktierungen mit den Außenkontakten verbunden.When contacting the multilayer electrical component via arrays (LGA, BGA), the internal electrodes of the electrical multilayer component are preferably connected to the external contacts via plated-through holes.

In einer Ausführungsform des elektrischen Vielschichtbauelements ist die dielektrische Schicht, die wenigstens eine Ɩffnung umfasst, derart ausgebildet, dass sie zusammen mit wenigstens zwei benachbarten Varistorschichten und zwei überlappenden Innenelektroden eine ESD-Entladungsstrecke bildet.In one embodiment of the multilayer electrical component, the dielectric layer, which comprises at least one opening, is designed such that it forms an ESD discharge gap together with at least two adjacent varistor layers and two overlapping internal electrodes.

In einer weiteren Ausführungsform ist die Ɩffnung in der dielektrischen Schicht mit einem halbleitenden Material oder einem Metall, insbesondere durch ein Verfahren einer Bedruckung der dielektrischen Schicht, derart gefüllt, dass ein an sich bekanntes so genanntes Catch-Pad gebildet ist.In a further embodiment, the opening in the dielectric layer is filled with a semiconducting material or a metal, in particular by a method of printing on the dielectric layer, in such a way that a so-called catch pad known per se is formed.

Darauf kann eine Durchkontaktierung (Via) angeordnet sein, womit über der dielektrischen Schicht eine freistehende Elektrodenstruktur gebildet wird.A via (via) can be arranged thereon, whereby a free-standing electrode structure is formed over the dielectric layer.

In einer bevorzugten Ausführungsform weist das elektrische Vielschichtbauelement die Funktion eines Varistors mit integriertem ESD-Schutzbauelement auf.In a preferred embodiment, the electrical multilayer component has the function of a varistor with integrated ESD protection component.

Der Varistor weist vorzugsweise eine KapazitƤt von weniger als 1 pF auf.The varistor preferably has a capacity of less than 1 pF.

Das ESD-Schutzbauelement des elektrischen Vielschichtbauelements ist vorzugsweise derart ausgebildet, dass es bei 1 mA Strom eine ESD-Durchbruchspannung von weniger als 20 V aufweist.The ESD protection component of the multilayer electrical component is preferably designed such that it has an ESD breakdown voltage of less than 20 V at 1 mA current.

Bei einem ESD-Puls mit einer Spannung von 8 kV, der an dem elektrischen Vielschichtbauelement angelegt wird, weist das ESD-Schutzbauelement des elektrischen Vielschichtbauelements vorzugsweise eine ESD-Klemmspannung von weniger als 500 V auf.For an ESD pulse with a voltage of 8 kV, which is applied to the multilayer electrical component, the ESD protection component of the electrical multilayer component preferably has an ESD clamping voltage of less than 500 V.

Ein wie zuvor beschriebenes elektrisches Vielschichtbauelement weist speziell durch die Anordnung der seriell zu der Varistorkapazität geschalteten kleinen Kapazität der dielektrischen Schicht eine Reduktion der Gesamtkapazität des Bauteils auf. Die Klemmspannung des elektrischen Vielschichtbauelements ist durch die dielektrische Schicht gegenüber herkömmlichen Vielschichtbauelementen nur gering erhöht.An electrical multilayer component as described above has a reduction in the total capacitance of the component, especially as a result of the arrangement of the small capacitance of the dielectric layer connected in series with the varistor capacitance. The clamping voltage of the electrical multilayer component is only slightly increased by the dielectric layer compared to conventional multilayer components.

Die angegebene Klemmspannung des ESD-Schutzbauelements ist im Wesentlichen vom Abstand der Innenelektrodenschichten abhƤngig.The specified clamping voltage of the ESD protection component is essentially dependent on the distance between the inner electrode layers.

Durch ein wie zuvor beschriebenes Design des elektrischen Vielschichtbauelements wird bei einer sehr kleinen KapazitƤt somit eine geringe Klemmspannung erreicht.By a design of the electric multilayer component as described above, a low clamping voltage is thus achieved with a very small capacitance.

Durch die zusƤtzliche Dielektrikumsschicht zwischen der Varistorschicht wird die GesamtkapazitƤt des elektrischen Vielschichtbauelements deutlich reduziert, wodurch die StromtragfƤhigkeit und Pulsfestigkeit des Bauelements weiter erhƶht ist.Due to the additional dielectric layer between the varistor layer, the total capacitance of the electrical multilayer component is significantly reduced, as a result of which the current-carrying capacity and pulse stability of the component are further increased.

Die oben beschriebenen Gegenstände werden anhand der folgenden Figuren und Ausführungsbeispiele näher erläutert. Die nachfolgend beschriebenen Zeichnungen sind nicht als maßstabsgetreu aufzufassen. Vielmehr können die Darstellungen im Einzelnen vergrößert, verkleinert oder auch verzerrt dargestellt sein. Elemente, die einander gleichen oder die die gleiche Funktion übernehmen, sind mit den gleichen Bezugszeichen bezeichnet.The objects described above will be explained in more detail with reference to the following figures and embodiments. The drawings described below are not to be considered as true to scale. Rather, the representations can be enlarged, reduced or distorted in detail. Elements that are equal to each other or that perform the same function are denoted by the same reference numerals.

Es zeigen:

Figur 1
einen schematischen Aufbau eines ersten Ausführungsbeispiels des elektrischen Vielschichtbauelements,
Figur 2
eine weitere Ausführungsform des elektrischen Vielschichtbauelements,
Figur 3
eine weitere Ausführungsform des elektrischen Vielschichtbauelements, wobei die Außenkontakte als Ball-Grid-Array ausgeführt sind,
Figur 4
eine weitere Ausführungsform des elektrischen Vielschichtbauelements, wobei die Außenkontakte als Land-Grid-Arrays ausgeführt sind,
Figur 5
eine weitere Ausführungsform des elektrischen Vielschichtbauelements, wobei die dielektrische Schicht zwei Ɩffnungen aufweist,
Figur 6
eine weitere Ausführungsform des elektrischen Vielschichtbauelements, das mehrere parallel geschaltete ESD-Bereiche in einem Vielschichtbauelement zeigt,
Figur 7
eine weitere Ausführungsform des elektrischen Vielschichtbauelements, bei dem zwischen zwei Elektroden mehrere dielektrische Schichten mit Durchbrüchen angeordnet sind.
Figur 8
eine weitere Ausführungsform des elektrischen Vielschichtbauelements, bei der auf der von der Varistorschicht abgewandten Seite der dielektrischen Schicht ein Catch-Pad auf der Füllung der Ɩffnung vorhanden ist.
Figur 9
eine weitere Ausführungsform des elektrischen Vielschichtbauelements, bei der auf der der Varistorschicht zugewandten Seite der dielektrischen Schicht ein Catch-Pad auf der Füllung der Ɩffnung vorhanden ist.
Show it:
FIG. 1
a schematic structure of a first embodiment of the electrical multilayer component,
FIG. 2
a further embodiment of the electrical multilayer component,
FIG. 3
a further embodiment of the electrical multilayer component, wherein the external contacts are designed as a ball-grid array,
FIG. 4
a further embodiment of the electrical multilayer component, wherein the external contacts are designed as land grid arrays,
FIG. 5
a further embodiment of the multilayer electrical component, wherein the dielectric layer has two openings,
FIG. 6
a further embodiment of the multilayer electrical component, which shows a plurality of parallel connected ESD regions in a multilayer component,
FIG. 7
a further embodiment of the electrical multilayer component, in which a plurality of dielectric layers are arranged with openings between two electrodes.
FIG. 8
a further embodiment of the electrical multilayer component, in which on the side facing away from the varistor layer of the dielectric layer, a catch pad on the filling of the opening is present.
FIG. 9
a further embodiment of the electrical multilayer component, wherein on the varistor layer side facing the dielectric layer, a catch pad on the filling of the opening is present.

In Figur 1 ist eine erste Ausführungsform eines elektrischen Vielschichtbauelements gezeigt, das einen Grundkörper 1 umfasst. An den Seitenflächen des Grundkörpers 1 sind Außenelektroden 2, 2' angeordnet, die mit den im Inneren des Grundkörpers 1 liegenden Innenelektroden 3, 4 leitend verbunden sind. Der Grundkörper 1 weist eine Varistorschicht 5 auf, die eine erste Innenelektrode 3 umfasst. Die erste Innenelektrode 3 ist größtenteils von der Varistorschicht 5 umschlossen. Das elektrische Vielschichtbauelement weist eine weitere Schicht 7 auf, die in der dargestellten Ausführungsform als eine weitere Varistorschicht ausgeführt ist. Die weitere Schicht 7 umfasst eine zweite Innenelektrode 4, die von der weiteren Schicht 7 größtenteils umschlossen ist.In FIG. 1 a first embodiment of a multilayer electrical component is shown, which comprises a base body 1. On the side surfaces of the base body 1 are Outer electrodes 2, 2 'are arranged, which are conductively connected to the inside of the main body 1 lying inside electrodes 3, 4. The main body 1 has a varistor layer 5, which comprises a first inner electrode 3. The first inner electrode 3 is largely enclosed by the varistor layer 5. The electrical multilayer component has a further layer 7, which in the illustrated embodiment is designed as a further varistor layer. The further layer 7 comprises a second inner electrode 4, which is largely enclosed by the further layer 7.

Zwischen der Varistorschicht 5 und der weiteren Schicht 7 ist eine dielektrische Schicht 6 angeordnet, die eine Ɩffnung 8 aufweist. Die Ɩffnung 8 ist mit einem halbleitenden Material oder einem Metall gefüllt. Der Grundkƶrper 1 des elektrischen Vielschichtbauelements ist in Dickenrichtung von Deckpaketen 9, 9' abgeschlossen, wobei die Deckpakete 9, 9' vorzugsweise jeweils wenigstens eine dielektrische Schicht umfassen.Between the varistor layer 5 and the further layer 7, a dielectric layer 6 is arranged, which has an opening 8. The opening 8 is filled with a semiconductive material or a metal. The main body 1 of the electrical multilayer component is terminated in the thickness direction by cover packages 9, 9 ', the cover packages 9, 9' preferably each comprising at least one dielectric layer.

Figur 2 zeigt eine weitere Ausführungsform des elektrischen Vielschichtbauelements. Der Aufbau des elektrischen Vielschichtbauelements ist nahezu identisch zu dem Aufbau in der Figur 1, wobei die erste Innenelektrode 3 auf einer Oberfläche der Varistorschicht 5 aufgebracht ist und die zweite Innenelektrode 4 auf einer Oberfläche der weiteren Schicht 7 aufgebracht ist. Die erste Innenelektrode ist zwischen der Varistorschicht 5 und dem Deckpaket 9 angeordnet. Die zweite Innenelektrode 4 ist zwischen der weiteren Schicht 7 und dem weiteren zweiten Deckpaket 9' angeordnet. FIG. 2 shows a further embodiment of the electrical multilayer component. The structure of the electric multilayer component is almost identical to the structure in FIG FIG. 1 wherein the first inner electrode 3 is applied on a surface of the varistor layer 5 and the second inner electrode 4 is applied on a surface of the further layer 7. The first inner electrode is arranged between the varistor layer 5 and the cover package 9. The second inner electrode 4 is arranged between the further layer 7 and the further second cover package 9 '.

Figur 3 zeigt eine weitere Ausführungsform des elektrischen Vielschichtbauelements. Das elektrische Vielschichtbauelement weist einen Grundkƶrper 1 auf, in dem eine Varistorschicht 5 angeordnet ist, auf der eine erste Innenelektrode 3 angeordnet ist. In Dickenrichtung sind die erste Innenelektrode 3 und die Varistorschicht 5 von einem ersten Deckpaket 9 nach oben hin abgeschlossen. Unterhalb der Varistorschicht 5 ist eine dielektrische Schicht 6 angeordnet, die Ɩffnungen 8 aufweist. Die Ɩffnungen 8 sind mit einem halbleitenden Material oder Metall gefüllt. Auf der Unterseite der dielektrischen Schicht 6 sind zweite Innenelektroden 4 angeordnet. Die erste Innenelektrode 3 und die zweiten Innenelektroden 4 sind über Vias 10 mit Außenkontakten 2 verbunden. Die Vias 10 kƶnnen zum Beispiel wie in der Figur 3 dargestellt zylindrisch sein oder auch kegelstumpffƶrmig, wobei die Vias 10 sich zum Beispiel in Richtung zu den Außenkontakten 2 oder in Richtung zu den Innenelektroden 3, 4 hin verjüngen kƶnnen. Die Außenkontakte sind in der dargestellten Ausführungsform als Ball-Grid-Arrays ausgeführt. Der Grundkƶrper 1 des elektrischen Vielschichtbauelements ist in Dickenrichtung nach unten von einem zweiten Deckpaket 9' abgeschlossen. FIG. 3 shows a further embodiment of the electrical multilayer component. The electrical multilayer component has a main body 1 in which a varistor layer 5 is arranged, on which a first inner electrode 3 is arranged. In the thickness direction, the first inner electrode 3 and the varistor layer 5 are closed by a first cover package 9 upwards. Below the varistor layer 5, a dielectric layer 6 is arranged, which has openings 8. The openings 8 are filled with a semiconducting material or metal. On the underside of the dielectric layer 6, second internal electrodes 4 are arranged. The first inner electrode 3 and the second inner electrodes 4 are connected via vias 10 with external contacts 2. The vias 10 can, for example, as in the FIG. 3 be shown cylindrical or frustoconical, wherein the vias 10, for example, in the direction of the external contacts 2 or in the direction of the internal electrodes 3, 4 can taper towards. The external contacts are designed as ball-grid arrays in the illustrated embodiment. The main body 1 of the electrical multilayer component is closed in the thickness direction down by a second cover package 9 '.

In Figur 4 ist eine weitere Ausführungsform des elektrischen Vielschichtbauelements dargestellt, die der Ausführungsform in Figur 3 Ƥhnelt, wobei die dielektrische Schicht 6 die zwei Ɩffnungen 8 aufweist. Die dielektrische Schicht 6 ist in Dickenrichtung zwischen zwei Schichten 5, 7 angeordnet. In der dargestellten Ausführungsform sind die beiden Schichten 5, 7 als Varistorkeramik ausgeführt. Die Außenkontakte 2, 2' des elektrischen Vielschichtbauelements sind in der dargestellten Ausführungsform als Land-Grid-Arrays ausgeführt. Die Vias kƶnnen zum Beispiel wie in der Figur 4 dargestellt zylindrisch sein oder auch kegelstumpffƶrmig, wobei die Vias sich zum Beispiel in Richtung zu den Außenkontakten 2, 2' oder in Richtung zu den Innenelektroden 3, 4 hin verjüngen kƶnnen.In FIG. 4 a further embodiment of the electrical multilayer component is shown, which corresponds to the embodiment in FIG. 3 is similar, wherein the dielectric layer 6 has the two openings 8. The dielectric layer 6 is arranged in the thickness direction between two layers 5, 7. In the illustrated embodiment, the two layers 5, 7 are designed as varistor ceramic. The external contacts 2, 2 'of the electrical multilayer component are designed as land grid arrays in the illustrated embodiment. The vias can, for example, as in the FIG. 4 be shown cylindrical or frusto-conical, the vias can, for example, in the direction of the external contacts 2, 2 'or taper towards the internal electrodes 3, 4 out.

Figur 5 zeigt eine weitere Ausführungsform des elektrischen Vielschichtbauelements, die der Ausführungsform in Figur 1 Ƥhnelt. Die dielektrische Schicht 6 in der Figur 5 weist zwei Ɩffnungen 8 auf, die mit einem halbleitenden Material beziehungsweise mit einem Metall gefüllt sind. FIG. 5 shows a further embodiment of the multilayer electrical component, the embodiment of FIG. 1 similar. The dielectric layer 6 in the FIG. 5 has two openings 8, which are filled with a semiconducting material or with a metal.

Figur 6 zeigt eine weitere Ausführungsform des elektrischen Vielschichtbauelements, wobei das elektrische Vielschichtbauelement drei parallel geschaltete ESD-Schutzelemente aufweist. Die ESD-Schutzelemente sind je für sich in der Figur 2 bereits detailliert beschrieben. Jedes der ESD-Schutzelemente umfasst eine erste Varistorschicht 5 sowie eine weitere Schicht 7. Die weitere Schicht 7 ist in der dargestellten Ausführungsform als weitere Varistorschicht ausgeführt. Zwischen der Varistorschicht 5 und der weiteren Schicht 7 ist eine dielektrische Schicht 6 angeordnet, die eine Ɩffnung 8 aufweist. Die Ɩffnung 8 ist mit einem halbleitenden Material beziehungsweise mit Metall gefüllt. Die ESD-Schutzelemente weisen jeweils eine erste Innenelektrode 3 und eine zweite Innenelektrode 4 auf, wobei die Innenelektroden 3, 4 auf der Varistorschicht 5 beziehungsweise auf der weiteren Schicht 7 aufgebracht sind. FIG. 6 shows a further embodiment of the electrical multilayer component, wherein the electrical multilayer component comprises three parallel ESD protection elements. The ESD protection elements are each in the FIG. 2 already described in detail. Each of the ESD protection elements comprises a first varistor layer 5 and a further layer 7. The further layer 7 is designed as a further varistor layer in the illustrated embodiment. Between the varistor layer 5 and the further layer 7, a dielectric layer 6 is arranged, which has an opening 8. The opening 8 is filled with a semiconductive material or with metal. The ESD protection elements each have a first inner electrode 3 and a second inner electrode 4, wherein the inner electrodes 3, 4 are applied to the varistor layer 5 or to the further layer 7.

Figur 7 zeigt eine weitere Ausführungsform des elektrischen Vielschichtbauelements. Das elektrische Vielschichtbauelement weist einen Grundkƶrper 1 mit Deckpaketen 9, 9' auf, wobei die Deckpakete 9, 9' vorzugsweise wenigstens eine dielektrische Schicht umfassen. Zwischen den Deckpaketen 9, 9' sind eine Varistorschicht 5 und eine weitere Schicht 7 angeordnet, wobei die weitere Schicht 7 als Varistorschicht ausgeführt ist. Zwischen der Varistorschicht 5 und der weiteren Schicht 7 sind drei dielektrische Zwischenschichten 6 angeordnet, die durch Zwischenschichten aus einer Varistorkeramik voneinander in Dickenrichtung beabstandet sind. Die dielektrischen Schichten 6 weisen jeweils eine Ɩffnung 8 auf. Die Ɩffnungen 8 der dielektrischen Schichten 6 sind jeweils mit einem halbleitenden Material beziehungsweise die Ɩffnung 8' mit einem Metall gefüllt. Das elektrische Vielschichtbauelement weist Innenelektroden 3, 4 auf, die mit Außenkontakten 2, 2' verbunden sind. Die erste Innenelektrode 3 ist zwischen der Varistorschicht 5 und dem Deckpaket 9 angeordnet. Die zweite Innenelektrode 4 ist zwischen der weiteren Schicht 7 und dem zweiten Deckpaket 9' angeordnet. FIG. 7 shows a further embodiment of the electrical multilayer component. The electrical multilayer component has a base body 1 with cover packages 9, 9 ', the cover packages 9, 9' preferably comprising at least one dielectric layer. Between the cover packages 9, 9 ', a varistor layer 5 and a further layer 7 are arranged, wherein the further layer 7 is designed as a varistor layer. Between the varistor layer 5 and the further layer 7, three dielectric intermediate layers 6 are arranged, which are separated from one another by intermediate layers of a varistor ceramic are spaced in the thickness direction. The dielectric layers 6 each have an opening 8. The openings 8 of the dielectric layers 6 are each filled with a semiconductive material or the opening 8 'with a metal. The electrical multilayer component has internal electrodes 3, 4 which are connected to external contacts 2, 2 '. The first inner electrode 3 is arranged between the varistor layer 5 and the cover package 9. The second inner electrode 4 is arranged between the further layer 7 and the second cover package 9 '.

Figur 8 zeigt ein Ausführungsbeispiel, bei dem Ƥhnlich den Ausführungsbeispielen der Figuren 3 und 4 ein Grundkƶrper 1, eine Varistorschicht 5, eine erste Innenelektrode 3, ein erstes Deckpaket 9, eine dielektrische Schicht 6 mit Ɩffnungen 8, ein zweites Deckpaket 9', Vias 10 und Außenkontakte 2, 2' vorhanden sind. Die Ɩffnungen 8 sind mit einem halbleitenden Material oder Metall gefüllt, so dass Catch-Pads 11 gebildet sind, die sich auf einer OberflƤche der dielektrischen Schicht 6 seitlich zu den Ɩffnungen 8 ausbreiten. Die Catch-Pads 11 befinden sich bei dem Ausführungsbeispiel der Figur 8 auf der von der Varistorschicht 5 abgewandten Seite der dielektrischen Schicht 6. Die Catch-Pads 11 kƶnnen zum Beispiel dadurch hergestellt werden, dass die Ɩffnungen durch ein Verfahren des Bedruckens mit dem halbleitenden Material oder Metall gefüllt werden, so dass ein Anteil des für die Füllungen verwendeten Materials die oberseitigen Catch-Pads 11 bildet. Die Catch-Pads 11 kƶnnen wie in der Figur 8 dargestellt mit den zugehƶrigen Vias 10 versehen und so mit den Außenkontakten 2' elektrisch leitend verbunden werden. Die Catch-Pads 11 kƶnnen hierbei als zweite Innenelektroden fungieren. Es kƶnnen stattdessen zusƤtzlich zweite Innenelektroden in elektrisch leitender Verbindung mit den Catch-Pads 11 vorgesehen werden. FIG. 8 shows an embodiment in which similar to the embodiments of the FIGS. 3 and 4 a base body 1, a varistor layer 5, a first inner electrode 3, a first cover package 9, a dielectric layer 6 with openings 8, a second cover package 9 ', vias 10 and external contacts 2, 2' are present. The openings 8 are filled with a semiconducting material or metal, so that catch pads 11 are formed, which spread on a surface of the dielectric layer 6 laterally to the openings 8. The catch pads 11 are in the embodiment of the FIG. 8 on the side facing away from the varistor layer 5 side of the dielectric layer 6. The catch pads 11 may be prepared, for example, that the openings are filled by a method of printing with the semiconducting material or metal, so that a proportion of the fillings material used forms the top-side catch pads 11. The catch pads 11 can be like in the FIG. 8 shown provided with the associated vias 10 and so are electrically connected to the external contacts 2 '. The catch pads 11 may act as second internal electrodes. It may additionally second Internal electrodes are provided in electrically conductive connection with the catch pads 11.

Bei dem Ausführungsbeispiel der Figur 8 sind typische Abmessungen zum Beispiel eine Dicke der dielektrischen Schicht 6 von 10 µm bis 30 µm, ein Durchmesser der Ɩffnungen 8 von 20 µm bis 30 µm, ein Durchmesser der Catch-Pads 11 von etwa 100 µm, eine Dicke der Catch-Pads von 3 µm bis 5 µm und eine Hƶhe eines Vias 10 plus Catch-Pad 11 von etwa 50 µm. Die Vias 10 kƶnnen zum Beispiel zylindrisch oder konisch sein.In the embodiment of the FIG. 8 For example, typical dimensions are a thickness of the dielectric layer 6 of 10 μm to 30 μm, a diameter of the openings 8 of 20 μm to 30 μm, a diameter of the catch pads 11 of about 100 μm, a thickness of the catch pads of FIG μm to 5 μm and a height of a vias 10 plus catch pad 11 of about 50 μm. For example, the vias 10 may be cylindrical or conical.

Figur 9 zeigt ein weiteres Ausführungsbeispiel, bei dem Ƥhnlich dem Ausführungsbeispiel gemäß Figur 8 ein Grundkƶrper 1, eine Varistorschicht 5, eine erste Innenelektrode 3, ein erstes Deckpaket 9, eine dielektrische Schicht 6 mit Ɩffnungen 8, ein zweites Deckpaket 9', Vias 10 und Außenkontakte 2, 2' vorhanden sind. Die Ɩffnungen 8 sind mit einem halbleitenden Material oder Metall gefüllt, so dass Catch-Pads 11 gebildet sind, die sich auf einer OberflƤche der dielektrischen Schicht 6 seitlich zu den Ɩffnungen 8 ausbreiten. Die Catch-Pads 11 befinden sich bei dem Ausführungsbeispiel der Figur 9 auf der der Varistorschicht 5 zugewandten Seite der dielektrischen Schicht 6. Zweite Innenelektroden 4 sind auf der von der Varistorschicht 5 abgewandten Seite der dielektrischen Schicht 6 angeordnet und über Vias 10 mit Außenkontakten 2' elektrisch leitend verbunden. Die Abmessungen, insbesondere der Ɩffnungen 8 und der Catch-Pads 11, kƶnnen den oben zu dem Ausführungsbeispiel der Figur 8 angegebenen Abmessungen entsprechen. FIG. 9 shows a further embodiment, in which similar to the embodiment according to FIG. 8 a base body 1, a varistor layer 5, a first inner electrode 3, a first cover package 9, a dielectric layer 6 with openings 8, a second cover package 9 ', vias 10 and external contacts 2, 2' are present. The openings 8 are filled with a semiconducting material or metal, so that catch pads 11 are formed, which spread on a surface of the dielectric layer 6 laterally to the openings 8. The catch pads 11 are in the embodiment of the FIG. 9 Second inner electrodes 4 are arranged on the side facing away from the varistor layer 5 side of the dielectric layer 6 and electrically connected via vias 10 with external contacts 2 '. The dimensions, in particular the openings 8 and the catch pads 11, the above to the embodiment of the FIG. 8 corresponding dimensions.

In weiteren Ausführungsformen umfasst das elektrische Vielschichtbauelement mehrere in Reihe oder parallel geschaltete ESD-Schutzeinrichtungen, die durch mindestens eine dielektrische Schicht mit einer oder mehreren Ɩffnungen und mindestens eine angrenzende Varistorschicht gebildet sind.In further embodiments, the electrical multilayer component comprises a plurality of ESD protection devices connected in series or in parallel, which are protected by at least a dielectric layer having one or more openings and at least one adjacent varistor layer are formed.

Es liegt im Rahmen der Erfindung, Merkmale der beschriebenen Ausführungsformen miteinander zu kombinieren, um weitere Ausführungsformen zu erhalten.It is within the scope of the invention to combine features of the described embodiments with each other in order to obtain further embodiments.

BezugszeichenlisteLIST OF REFERENCE NUMBERS

11
Grundkƶrperbody
2, 2'2, 2 '
Außenelektrodeouter electrode
33
erste Innenelektrodefirst inner electrode
44
zweite Innenelektrodesecond inner electrode
55
Varistorschichtvaristor
66
dielektrische Schichtdielectric layer
77
weitere Schichtanother layer
8, 8'8, 8 '
Ɩffnungopening
9, 9'9, 9 '
Deckpaketdeck package
1010
Viasvias
1111
Catch-PadCatch pad

Claims (15)

  1. Multilayer electrical component having
    - a main body (1) with external electrodes (2, 2'),
    - internal electrodes (3, 4) that are each connected to an external electrode (2, 2') in an electrically conductive manner,
    - a ceramic varistor layer (5) that is provided with one of the internal electrodes (3), and
    - a dielectric layer (6) adjoining the varistor layer (5),
    - wherein the internal electrodes (3, 4) are arranged on mutually opposite sides of the dielectric layer (6), and
    - wherein the dielectric layer (6) has, between the internal electrodes (3, 4), at least one opening that is filled with a semiconducting material or a metal, such that the semiconducting material present in the opening (8) or the metal present in the opening (8) adjoins the varistor layer (5) in a planar manner.
  2. Multilayer electrical component according to Claim 1, in which
    the opening (8) is filled with semiconducting material that comprises a varistor ceramic or a resistor material.
  3. Multilayer electrical component according to Claim 1, in which
    the opening (8) is filled with metal, which comprises Ag, Pd, Pt or AgPd.
  4. Multilayer electrical component according to one of Claims 1 to 3, in which
    a further layer (7) is arranged on that side of the dielectric layer (6) that is remote from the varistor layer (5), said further layer (7) being in the form of a ceramic varistor layer and being provided with one of the internal electrodes (4).
  5. Multilayer electrical component according to one of Claims 1 to 4, in which
    the dielectric layer (6) comprises ZrO2, a ZrO2-glass composite, AlOx, an AlOx glass, MgO or an MgO glass.
  6. Multilayer electrical component according to one of Claims 1 to 5, in which
    the main body (1) has covering assemblies (9, 9') that each comprise at least one further dielectric layer.
  7. Multilayer electrical component according to one of Claims 1 to 6, in which
    the internal electrodes (3, 4) are connected to the external contacts (2, 2') via vias (10).
  8. Multilayer electrical component according to one of Claims 1 to 7, in which
    the external contacts (2, 2') are in the form of a land grid array (LGA) or ball grid array (BGA).
  9. Multilayer electrical component according to one of Claims 1 to 8, in which
    the dielectric layer (6) is configured such that, together with at least two adjacent varistor layers (5) that are present as a whole and the internal electrodes configured as two overlapping internal electrodes (2, 3), it forms an ESD discharge section.
  10. Multilayer electrical component according to one of Claims 1 to 9, which has the function of a varistor with an integrated ESD protective component.
  11. Multilayer electrical component according to one of Claims 1 to 10, which has a capacitance of less than 1 pF.
  12. Multilayer electrical component according to one of Claims 1 to 11, which has, at a current of 1 mA, an ESD breakdown voltage of less than 20 V.
  13. Multilayer electrical component according to one of Claims 1 to 12, which, in the case of an ESD pulse with a voltage of 8 kV, has an ESD clamping voltage of less than 500 V.
  14. Multilayer electrical component according to one of Claims 1 to 13, in which
    the opening 8) in the dielectric layer (6) is filled with a semiconducting material or a metal such that a pad (11) is formed that spreads over a surface of the dielectric layer (6) laterally to the opening (8) .
  15. Multilayer electrical component according to Claim 14, in which the pad (11) is provided with a via (10) .
EP10701703.0A 2009-02-03 2010-02-02 Electrical multilayered component Active EP2394275B1 (en)

Applications Claiming Priority (2)

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DE102009007316A DE102009007316A1 (en) 2009-02-03 2009-02-03 Electrical multilayer component
PCT/EP2010/051247 WO2010089294A1 (en) 2009-02-03 2010-02-02 Electrical multilayered component

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EP2394275A1 EP2394275A1 (en) 2011-12-14
EP2394275B1 true EP2394275B1 (en) 2019-10-16

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KR20110116041A (en) 2011-10-24
US8410891B2 (en) 2013-04-02
WO2010089294A1 (en) 2010-08-12
KR101665742B1 (en) 2016-10-12
US20120044039A1 (en) 2012-02-23
JP2012517097A (en) 2012-07-26
DE102009007316A1 (en) 2010-08-05
EP2394275A1 (en) 2011-12-14
JP5758305B2 (en) 2015-08-05
CN102308341B (en) 2013-06-05
CN102308341A (en) 2012-01-04

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