EP2140735A1

EP2140735A1 - Circuit configuration for starting and operating at least one discharge lamp

Info

Publication number: EP2140735A1
Application number: EP07728402A
Authority: EP
Inventors: Bernd Rudolph
Original assignee: Osram GmbH
Current assignee: Osram GmbH
Priority date: 2007-04-23
Filing date: 2007-04-23
Publication date: 2010-01-06
Anticipated expiration: 2027-04-23
Also published as: US20100033104A1; DE502007007030D1; US8076864B2; CN101641999A; ATE506835T1; CN101641999B; EP2140735B1; WO2008128574A1

Abstract

A circuit arrangement for starting and operating at least one discharge lamp is provided.

Description

description

Circuit arrangement for igniting and operating at least one discharge lamp

Technical area

The present invention relates to a circuit ^arrangement for igniting and operating at least one discharge lamp with a first and a second input connection for connecting a supply voltage, an inverter, which comprises at least a first and a second main transistor in a half-bridge arrangement, connected in series between the first and second input are pin-coupled to a first and a second output terminal for connecting the at least one discharge lamp, at least one lamp inductor, which is se ^¬ Riell coupled to the first output terminal, Minim ^¬ least one capacitor connected in parallel to the first and second Output terminal is coupled, a Transfor ^¬ mator with a primary winding and a first and a second secondary winding, wherein a series circuit comprising the primary winding and the at least one lamp inductor gekopp between the half-bridge center and a reference potential elt is; and a first control ^¬ circuit for driving the first main transistor and a second control circuit for driving the second main transistor, wherein each control circuit has a single ^input and an output, wherein the output of the first control circuit to the control electrode of the first main transistor and the output of the second Control ^{scarf ¬} tion is coupled to the control electrode of the second main transistor, wherein the input of the first control ^{scarf ¬} tion with the first secondary winding and the input of second control circuit is coupled to the second secondary winding, wherein each control circuit has a time ^{scarf ¬} tion whose time constant varies depending on the voltage applied to the input of the respective control circuit, each time circuit at least ei ^¬ NEN first auxiliary transistor, wherein the working ^¬ electrode of first auxiliary transistor to the control ^¬ electrode of the associated main transistor and the Be ^¬ zugselektrode the first auxiliary transistor is coupled to a reference potential, wherein the control electrode of the first auxiliary transistor is coupled to the center of a frequency-dependent voltage divider, on the one hand with the respective secondary winding, on the other hand with is coupled to the respective reference potential.

State of the art

Such a circuit arrangement is known from EP 0 093 469 A1. In this case, the frequency-dependent voltage divider of each time circuit comprises an ohmic resistance and a capacitor, wherein the voltage drop across the capacitor is coupled to the control path of the first auxiliary transistor. Furthermore, zener diodes are pre ^¬ see that as a relatively precise thresholds to generate the open circuit voltage for the discharge lamp, that is, the voltage which is available across the lamp for ignition can be used.

A disadvantage in the solution according to the publication mentioned are the substantial tax losses because exact Z are verfüg ^¬ bar diodes with low dynamic resistance, which are required for this solution, only above approximately 7 V, and the generated across a current sensing resistor Voltage in the lamp operation is on this scale. A more detailed consideration of the above solution shows that a reduction of the ohmic resistance of the frequency-dependent voltage divider must be compensated by an enlargement of the capacitor of the fre ^¬ quenzabhängigen voltage divider. Since the dynamic resistance of a zener diode with a lower zener diode voltage, which would be necessary for a reduction in the voltage at the secondary winding to reduce the control losses, increases, this results in a larger time constant. The delay of the voltage at the control electrode of the first auxiliary transistor with respect to the current in the control electrode of the main transistor is characterized Undefi ^¬ ned. This also results in a large undesirable scattering range. A reduction in the drop across the respective secondary winding voltage control for lowering the losses resulting thus in an increase in the To ^¬ tolerances.

The current-limiting effect of the lamp choke is due to a possible saturation back, whereby the main transistors of the inverter can be destroyed. Here, it should be noted that operation of the lamp inductor with a slight saturation is desired per ^¬ but since this advantage in low losses resulted. Exactly at the point makes an increase in the tolerances then negatively noticeable, since thereby the danger of saturation of the lamp choke is created. As a result, this would result in a reduction of the control losses in a greater dimensioning of the components of the circuit arrangement and thus in higher costs. Presentation of the invention

The present invention is therefore based on the object of developing the above-mentioned circuit ^{arrangement of ¬ type} that a reduction of the control losses without risk of destruction of the main transistors of the inverter or without need the Haupttransis ^¬ gates of the inverter is more strongly dimensioned.

This object is achieved by a circuit arrangement having the features of patent claim 1.

The present invention is based on the finding that a disadvantage of the prior art is that the capacitor of the frequency-dependent voltage divider is also problematic because it acts as energy ^¬ memory at the control electrode of the first auxiliary transistor and thus by its charge and Discharge an undesirable delay of the voltage across the control electrode of the first auxiliary transistor relative to the current in the control electrode of the main transistor is formed. On the basis of this knowledge, the frequency-dependent voltage divider is realized in a circuit arrangement according to the invention by an inductance and an ohmic resistance, wherein the resistor at the ohmic resistance ^¬ lende voltage is coupled to the control path of the first Hilfstran- sistor. By this measure, the control electrode of the first auxiliary transistor is no longer undesirably coupled to an energy storage, eliminating unwanted delays. As a second measure, the Z-diodes affected by the above-mentioned disadvantages are replaced by a second Auxiliary transistor is connected in parallel with the inductance of the frequency-dependent voltage divider, wherein the second auxiliary transistor comprises a drive circuit which is designed to bridge the associated inductance in dependence on the voltage at the associated secondary winding by the second auxiliary transistor. It should be noted that transistors used for the second auxiliary transistor usually switch at a voltage of 0.6 to 0.7 V at the control path, ie at such a voltage between the control and reference electrodes, whereas the Z-diode voltages already mentioned above are by a factor of 10 above.

The inventive configuration can be a good reproducibility of the open circuit voltage and the Betriebsparame ^¬ ter, ie the parameters for the continuous operation of the discharge lamp, ensuring at the same time significantly reduced STEU ^¬ erverlusten with a few, very inexpensive standard components. In a realized exemplary embodiment, the control losses by about 80% could be re ^¬ duced.

A preferred embodiment is characterized in that the second-mentioned measure according to the invention, ie the measure which provides a second auxiliary transistor, which is ge ^¬ switched parallel to the associated inductance is provided only in one of the two timers. This is especially possible when the load ^¬ revolve low quality of service, in which the difference between firing frequency and operating frequency is low and where the lamp inductor during ignition is little operated sown ^¬ Untitled. In a preferred embodiment, the at least one second auxiliary transistor has a control electrode, a working electrode and a reference electrode, wherein the working electrode is coupled to the point of the associated voltage divider, to which the inductance is coupled to the ohmic resistance, the Bezugselekt ^¬ rode is coupled to the associated second secondary winding. This interconnection is ensured in a simple Wei ^¬ se, that the inductance of the frequency-dependent voltage divider can be bridged by the second Hilfstransis ^¬ gate, if the second Hilfstran- sistor is switched conductive.

Furthermore, it is preferred that the at least one time ^¬ circuit further comprises a current measuring resistor which is serially coupled between the associated secondary winding and the output of the associated timing circuit, wherein the voltage drop across the current measuring resistor is coupled to the gate of the associated second Hilfstransis- sector. Characterized is made on and ausschaltende voltage from the current to the control electrode of the respective main transistor from ^¬ pending the second transistor auxiliaries. Thus, it can be achieved that a Ü berbrückung the inductance of the frequency-dependent voltage divider is very closely associated with the time course of the current in the control electrode of the respective Haupttran ^¬ sistors, which in turn due to the interpretation ^¬ supply of the transformer as a current transformer is an image of the load circuit current , Unwanted time Toleran ^¬ zen in the art that inadvertently actuating a saturate could cause the lamp inductor are so reliably excluded. It is furthermore preferably provided that a further ohmic resistance is coupled between the working electrode of the at least one second auxiliary transistor and the point of the associated voltage divider, to which the inductance is coupled to the ohmic resistance. A provided at this point ohmic resistance acts as a current limiting resistor, thus providing si ^¬ cher that the driven from the transformer current continues substantially flowing through the current measuring resistor and thus holds the second auxiliary transistor safely turned on.

Preferably, it is further provided that between the point at which the inductance of the respective voltage ^¬ divider is coupled to the respective secondary winding, and the respective inductance is a capacitor GE ^¬ coupled. By this measure, a saturation of the inductor of the frequency dependent voltage divider for the case is reliably prevented, in which the fed voltage has on the added ^¬ impaired secondary winding in the control circuit a DC component. It is important to ensure that the capacitor is chosen large enough, so that the fixed by the ohmic resistance and the inductance of the frequency-dependent voltage divider time constant is not changed.

Finally, it is further preferred that a further ohmic resistance is coupled between the current measuring resistor and the output of the associated time ^¬ circuit. By this measure, sufficient voltage drops again at both resistors in the lamp operation, thus also at the resistance of the frequency-dependent voltage divider, the base-emitter-forward voltage of the first auxiliary transistor safely achieved and the feedback is sufficiently large.

Further advantageous embodiments will become apparent from the dependent claims.

Short description of the drawing (s)

In the following, an ^exemplary embodiment of a circuit ^arrangement according to the invention will now be described in more detail with reference to the accompanying drawing, which shows a schematic representation of an embodiment of a circuit arrangement according to the invention.

Preferred embodiment of the invention

The figure shows a circuit ^arrangement according to the invention and a supply ^arrangement for this Schaltungsanord ^¬ tion and two lamps which are ignited or fed by means of this circuit arrangement. The supply arrangement comprises two input terminals 1 and 2, which are intended for connection to an AC voltage source. To these terminals 1 and 2, a rectifier bridge 3 with four diodes (4 to 7 inclusive) is connected. Further, for example, a filter between the input terminals 1 and 2 on the one hand, and the rectifier bridge 3 on the other hand, may be provided. An output terminal of the rectifier bridge 3 is connected to a first input terminal A of the circuit arrangement. A second output terminal of the rectifier bridge 3 is connected to an input terminal B of the circuit arrangement. This circuit will now be described. The terminals A and B are connected by a capacitor 10 and also by a series circuit of a first main transistor 11, a primary winding 12 of a current transformer and a load circuit 13, the details of which are listed below, and a capacitor 14 ^{miteinan ¬} . The load circuit 13 comprises two essenli ^¬ Chen same, parallel branches. Each of these branches comprises a discharge lamp 15 or 15 ', connected in series with a lamp choke 16 or 16'. Je ^¬ de of the lamps 15, 15 'has two preheatable electrodes. Belonging to a lamp 15, 15 ', remote from a supply source electrode ends are connected by a capacitor 17 and 17' to each other. JE of these capacitors 17, 17 'thus provides a to the respective lamp 15, 15'parallel-connected switching ^¬ circular element.

The series connection of the primary winding 12 of the transformer, the load circuit 13 and the capacitor 14 is connected in parallel with a second main transistor 20. Each of the two main transistors 11 and 20 is of the NPN type. In the circuit, the collector of the main transistor 11 is connected to the positive input terminal A of the circuit arrangement. The emitter of this main transistor 11 is connected to the collector of the main transistor 20. The emitter of this main transistor 20 is connected to the negative input terminal B of the circuit arrangement. Optionally, current negative feedback resistors, in particular emitter resistors, may be provided for the main transistors 11 and 20. By the main transistors 11 and 20 in half-bridge arrangement is defines a half-bridge center HM. The current transformer ^¬ with the primary winding 12 has two secondary windings 30 and 31, respectively. The secondary winding 30 is connected to a control circuit of the main transistor 11. The secondary winding 31 is connected to a control circuit of the main transistor 20. The control circuits are substantially similar to each other.

The ends of the secondary winding 30 are connected to each other via a diode 40 and a timing circuit comprising a series circuit of a capacitor 32, an inductor 33 and an ohmic resistor 34. The time ^¬ circuit further comprises a first auxiliary transistor 35 whose base is connected to the connection point between the capacitor 32 and the inductor 33 on the one hand and the ohmic resistor 34 on the other. Wei ^¬ terhin, a second auxiliary transistor 38 is provided, whose collector-emitter path is connected in parallel with a serially arranged resistor ohmic resistor 39 of the series circuit of capacitor 32 and inductor 33. Between the base and the emitter of the second auxiliary transistor 38, an ohmic resistor 36 is connected, which serves as a current measuring resistor. A further ohmic resistor 37 is connected in series between the ohmic resistor 36 and the base of the main transistor 11.

A corresponding timing circuit 32 'to 40' connects the ends of the secondary winding 31 with each other. A diode 50 is connected in anti-parallel to the main transistor 11. A diode 50 'is connected in anti-parallel to the main transistor 20. Parallel to the main transistor 11 is still an ohmic resistor 51 and a capacitor 52 connected.

Finally, a circuit for starting the circuit is provided. This circuit comprises, inter alia, a series connection of a resistor 60 and a capacitor 61, which is connected in parallel with the capacitor 10. A connection point between the opposing ^¬ stand 60 and the capacitor 61 is connected to a DIRECT BI ^¬ dimensional threshold element 62, in this case a DIAC, comparable prevented. The other side of this threshold element 62 is connected via a resistor 63 to a point between the resistor 36 'and the diode 40' of the control circuit of the main transistor 20. The junction between the resistor 60 and the capacitor 61 is also connected to a diode 64. The other side of this diode 64 is connected via a resistor 65 to the collector of the main ^¬ transistor 20.

The circuit described works as follows: Terminals 1 and 2 are connected to an AC voltage of, for example, 230 V, 50 Hz. As a result, a DC voltage through the rectifier bridge 3 Zvi ^¬ rule the terminals A and B of the circuit arrangement is applied. Consequently, current first flows from A through resistor 51, primary winding 12 of the current transformer, load circuit 13, and capacitor 14 to terminal B, causing capacitors 17, 17 ', and 14 to charge. In addition, the capacitor 61 is charged via the resistor 60. If the smoldering ^¬ lenspannung of the threshold element 62 is then reached, the capacitor 61 among other via the resistors 63, 36 ', 37' and the base-emitter junction of the main is Discharge transistor 20. This discharge process ensures that the main transistor 20 becomes conductive for the first time. As a result, the capacitor 14 in the circuit ^¬ circle 14, 13, 12, 20, 14 discharged. Since this discharge current also flows through the primary winding 12 of the current transformer, voltages in the two secondary windings 30 and 31 are induced. The induced voltage in the winding 31 has a sense of direction holding the main transistor 20 in a conducting state. The elements 32 ', 33', 34 'of the timer switch the first auxiliary transistor 35' after a predetermined period of time has elapsed. As a result, the main transistor 20 becomes non-conductive. The current of the load circuit 13 then flows through the combination of the diode 50 and the capacitor 52 so-like through the capacitor 10 back to the condenser 14. The actual value of this current decreases and near its zero ^¬ passage of the main transistor 11 through winding 30, the diode 40 and the resistors 36 and 37 conductive. In the same way as described for the switching operation of the main transistor 20, the transistor 11 then becomes non-conductive again after a while. The circuit ^¬ arrangement is now in operation. The main transistors 11 and 20 are alternately turned on. The switching ^circuit 64, 65 then ensures that the starting capacitor 61 is no longer charged to the breakdown voltage of the threshold element 62.

The lamps 15, 15 'are then not ignited. The load circuit 13 in this case comprises a parallel scarf ^¬ processing of two practically equal branches each consisting of a series circuit of a lamp inductor 16 and a capacitor 17 is (or 16 'and 17'). This Circuit will not be dampens ^¬ through the lamps 15, 15 '. Without the presence of the second Hilfstransis- motors 38 and 38 'in the timing circuits, the frequency of the current flowing through the load circuit 13 current would be provided virtually on the resonance frequency of this circuit a ^¬. As a result, so great voltages would be applied to the lamps 15 and 15 'that they would ignite with cold Katho ^¬ . In the case of defective lamps, this could also lead to an electrically inadmissible situation in the circuit 13 due to very high currents.

However, when the currents in the primary winding 12 of the transformer increase, a current is now induced in the secondary windings 30 and 31, which leads to a respective current measuring resistor 36, 36 'to a voltage drop sufficient, the associated second auxiliary transistor 38, 38' to turn on. This influences the time constant of the timing circuit, in this case the fact that the series circuit of capacitor 32 and inductance 33 or 32 'and 33' is bridged by the ohmic resistor 39. As a result, the voltage across the ohmic resistor 34 or 34 'more quickly reaches the value at which the auxiliary transistor 35 or 35' becomes conductive, with the result that the associated main transistor 11 or 20 becomes nonconductive more rapidly. This causes the frequency of the circuit arrangement to reach a higher value. This higher frequency leads to a higher voltage at the lamp inductor 16 or 16 'and therefore to a lower voltage at the lamp 15 or 15'. Thus, the lamps have the opportunity to preheat their electrodes through the condenser 17 or 17 '. Consequently, there is no risk of lighting the lamps with too cold electrodes. Only when the electrodes are sufficiently preheated, the voltage present on the lamps is sufficient to ignite them. The current flowing through the load circuit and thus the primary winding 12 of the current transformer must then no longer assume a high value, since now the attenuation of the lamps 15 or 15 'is reached. This has the result that the current flowing through the windings 30 and 31 will be comparatively low, so that the switching threshold of the second auxiliary transistor 38 or 38 'is no longer reached by the voltage dropping across the current measuring resistor 36 or 36'. This means that it takes a longer time until the input of the first auxiliary transistor 35 or 35 ', a voltage applied, which turns on this transistor. This in turn has the result that the to ^¬ associated main transistor 11 or 20 is turned on at a later date. This means that the frequency at which the circuit arrangement then operates is lower than that during the ignition process of the lamps 15 or 15 '.

Claims

claims

1. Circuit arrangement for igniting and operating at least one discharge lamp (15, 15 ') with

- a first (A) and a second input terminal

(B) for connecting a supply voltage; - An inverter comprising at least a first (11) and a second main transistor (20) in a half-bridge ^arrangement , which are coupled in series between the first (A) and the second input terminal (B) ^¬ ; - A first and a second output terminal for connecting the at least one discharge lamp (15, 15 ');

- At least one lamp inductor (16, 16 '), which is coupled ^¬ sially to the first output terminal; - At least one capacitor (17, 17 ') which is gekop ^¬ pelt parallel to the first and the second output terminal;

- A transformer having a primary winding (12) and a first (30) and a second secondary winding (31), wherein a series circuit comprising the primary winding (12) and the at least one lamp choke (16, 16 ') between the half-bridge center (HM) and a reference potential is coupled; and - a first control circuit for driving the first main transistor (11) and a second control ^¬ circuit for driving the second main transistor (20), each control circuit having an input and an output, wherein the output the first control circuit is coupled to the control electrode of the first main transistor (11) and the output of the second control circuit to the control electrode of the second main transistor (20), wherein the input of the first control circuit to the first secondary winding (30) and the input of the second control circuit with the second secondary winding (31) is coupled, each control circuit having a time circuit (32 to 40; 32 'to 40') whose time constant varies in dependence on the voltage applied to the input of the respective control circuit, each time circuit (32 to 40, 32 'to 40') has at least one first auxiliary transistor (35, 35 '), the working electrode of the first auxiliary transistor (35, 35') being connected to the control electrode of the associated main transistor (11, 20) and the reference electrode of the first auxiliary transistor (35; 35, 35 ') is coupled to a reference potential, wherein the control electrode of the first auxiliary transistor (35, 35') is connected to d Em center of a frequency-dependent voltage divider is coupled, on the one hand with the respective secondary winding (30; 31), on the other hand coupled to the respective reference potential; characterized in that the frequenzabhän--independent voltage dividers each time circuit (32 to 40; 32 'to 40') comprises, where ^¬ at the across ohmic resistor at least one inductance (33;; 33 ') (and a resistor 34 34') (34; 34 ') voltage is coupled to the control path of the first auxiliary transistor (35; 35'); wherein at least one timing circuit (32 to 40; 32 'to 40') comprises a second auxiliary transistor (38; 38 ') connected to the associated inductance (33; 33 ') is parallel ge ^¬ switches, wherein the second auxiliary transistor (38; 38') comprises a control circuit which is ^¬ sets, the associated inductance (33; 33 ') in dependence on the voltage at the associated secondary winding (30; 31) by the second auxiliary transistor (38; 38 ') to bridge.

2. A circuit arrangement according to claim 1, marked thereby characterized, that the at least one second Hilfstran- sistor; having a control electrode, a working ^¬ electrode and a reference electrode, the working electrode is coupled to the point of the associated voltage divider (38 38 ') is coupled, wherein the reference electrode to the associated second secondary winding to ^¬ where the inductances tat (33;; 33 ') with the ohmic resistance (34 34') (30; 31) is coupled.

3. Circuit arrangement according to one of claims 1 or 2, characterized in that the at least one time circuit (32 to 40; 32 'to 40') further comprises a current measuring resistor which is connected in series between the associated secondary winding (30; 31) and the output transition of the associated timing circuit (32 to 40; 32 'to 40') is coupled, wherein the at the current measuring reflection ^¬ stand (36; 36 '); coupled falling voltage to the control ^¬ electrode of the associated second auxiliary transistor (38 38').

4. Circuit arrangement according to one of the preceding claims, characterized in that between the working electrode of the at least one second auxiliary transistor (38; 38 ') and the point of the associated voltage divider, to which the inductance (33; 33') with the ohmic resistance (34; 34 ') is coupled, a further ohmic resistor (39; 39') is coupled.

5. Circuit arrangement according to one of the preceding claims, characterized in that between the point at which the inductance (33; 33 ') of the respec ^¬ gen voltage divider with the respective secondary winding (30; 31) is coupled, and the respective inductance (33; 33 ') a capacitor (32; 32') is coupled.

6. Circuit arrangement according to one of the preceding claims, characterized in that between the current measuring resistor (36; 36 ') and the output of at ^¬ respective time circuit (32 to 40; 32' to 40 '), a further ohmic resistor (37; 37' ) is coupled.