EP1861873A1

EP1861873A1 - Method of producing a hetero-structure comprising at least one thick layer of semiconductor material

Info

Publication number: EP1861873A1
Application number: EP06725289A
Authority: EP
Inventors: Fabrice Letertre; Bruno Ghyselen; Ian Cayrefourcq
Original assignee: Soitec SA
Current assignee: Soitec SA
Priority date: 2005-03-24
Filing date: 2006-03-23
Publication date: 2007-12-05
Also published as: KR20070107111A; KR100951839B1; CN101147253A; CN101147253B; US7601611B2; JP2008532328A; JP5053252B2; US20060216907A1; FR2883659A1; WO2006100301A1; FR2883659B1

Abstract

The invention relates to a method of producing a structure comprising at least one semiconductor material for use in microelectronics, optoelectronics, optics, etc. The inventive method comprises the following steps consisting in: equipping a support (10) which is made from a first material with a thin monocrystalline layer (22) of a second material which is different from the first, said layer being transferred to the support; and performing a pre-determined heat treatment such as at least to reinforce the bonding interface (12) between the thin layer and the support. The method is characterised in that the thickness (e1) of the thin layer is selected as a function of the difference between the thermal expansion coefficients of the first and second materials and as a function of the parameters of said pre-determined heat treatment, such that the stresses exerted by said treatment on the support/transferred thin layer assembly leave same intact. The invention is also characterised in that it comprises an additional step in which an additional thickness (22') of the second material in the monocrystalline state is deposited on the thin layer. The invention is suitable for the production of hetero-substrates comprising a thick useful layer.

Description

Method for producing a hetero-structure comprising at least one thick layer of semiconductor material

The present invention relates generally to the manufacture of materials and more particularly hetero-substrates for microelectronics, optoelectronics, optics or photonics.

More specifically, the invention relates to a new process for producing a hetero-substrate composed of at least one support and one or more thin layer (s), where the materials used and their thermal properties can be different.

Methods of this type are already known.

It is thus known to produce hetero-substrates by implementing bonding techniques, in particular by molecular adhesion.

By way of example and in a nonlimiting manner, the known processes of the Besoi®, Eltran® or Smart-Cut® type use a gluing step.

It will be recalled in this regard that in the context of a hetero-substrate manufacturing, these methods comprise at least the following steps: a) bonding by contacting two generally massive substrates into generally dissimilar materials, with a layer useful which is based on a support substrate, the whole forming a hetero-structure, b) a strengthening of the bonding interface of the two substrates by implementing a heat treatment at high temperature to reduce the fragility of said interface. Problems of delamination and alteration of the mechanical and / or electrical quality of said useful layer are thus avoided, at least limited, and c) a reduction of the thickness of the useful layer resting on the support substrate to constitute a thin layer.

Such steps can be implemented with different possibilities, such as, for example, sacrificial oxidation in step c), or with a different order, with in particular a reversal between steps b) and c).

Moreover, some of these steps can be combined to optimize the process globally (cumulative duration of treatment, cumulative duration related to manipulations, etc.).

For example, a stabilizing heat treatment of the bonding interface (step b) is used, to combine it with a thinning step (step c)) (see patent US Pat. No. 6,4034,50).

However, in the context of the production of hetero-substrates with materials having different properties, for example different thermal expansion coefficients, the heat treatments undergone during the manufacture of the composite substrate (interface reinforcement, thinning, ...) typically induce significant mechanical stresses. Such stresses can lead to embrittlement, followed in some cases by cracking or even fracture, of one or both treated substrates.

These stresses can also lead to irreversible plastic deformation of the treated substrate (s). In particular, dislocations and / or plane slips and / or other crystalline defects may occur.

It is also known that the temperatures at which these problems appear typically depend: on the mechanical energy stored by the composite structure during the heat treatment implemented, on the difference between the coefficients of thermal expansion of the materials composing the composite structure, and the thickness of the substrates used.

Thus, in the context of the production of hetero-substrates by Smart Cut® type process, such problems can constitute real limitations. More particularly, the maximum levels possible in terms of temperature decrease, so that heat treatments become difficult to use for lack of efficiency.

For example and in a non-exhaustive manner, an interface strengthening heat treatment at about 1050-1000 ° C. will be difficult to implement in the case of a hetero-structure having a useful layer of 500 Å thickness. , the temperature levels generally practiced in this type of treatment being too high with regard to the problems mentioned above. Solutions are also known which make it possible to improve the reinforcement of the bonding interface of a hetero-substrate without additional thermal input.

A first proposal, known as "plasma bonding", consists in applying certain treatments to the surfaces to be bonded, in order to increase the bonding energy for a given reinforcement heat treatment.

By proceeding in this way, the thermal stresses that the substrates undergo are maintained while maintaining adequate reinforcement and sealing of the interface in the composite structure. But this proposal requires specific equipment, thus limiting its attractiveness economically.

A second known solution is to perform a eutectic bonding: a metal layer (Au ₂ Si ₃ ) is interposed between the two substrates to seal to facilitate their bonding by heat treatment, so that the temperature levels can remain relatively low.

This solution therefore also offers the advantage of being able to relax the thermal stresses in a treatment for reinforcing the interface of a hetero-substrate.

However, the presence of said metal layer at the interface limits the maximum temperatures allowed during subsequent steps of the manufacturing process, too high temperature levels. high levels can indeed lead to a melting of this layer. In addition, it requires an additional step of interposition of this metal layer.

An object of the invention is to overcome the above problems.

To this end, it proposes a method of manufacturing a structure comprising at least one semiconductor material for applications in microelectronics, optoelectronics, optics, etc., the method comprising the transfer on a support made of a first material of a monocrystalline thin layer of a second material different from the first, and a predetermined heat treatment providing at least one reinforcement of a bonding interface between the thin layer and the support, characterized in that the thickness of the thin layer is chosen according to the difference between the thermal expansion coefficients of the first and second materials and as a function of the parameters of said predetermined heat treatment, so that the stresses exerted by said heat treatment on the assembly of the support and the thin layer transferred. leaves said assembly intact, and in that it comprises an additional deposition step, on the thin wafer, of an additional thickness of the second material in the monocrystalline state.

Some preferred, but not limiting, aspects of the process according to the invention are the following:

^* The thickness of the transferred thin layer is between about 100 and 300 Å, and preferably between 150 and 250 Å. ^* The thickness of the deposit produced on the thin transferred layer is between about 1000 and 5000 Å.

^* The thin film step of transferring the second material comprises the sub-steps of creating a donor wafer by implantation of species, a zone of weakness which delimits the thin layer to be transferred, contacting the donor wafer with the support, and to apply constraints apt to lead to the detachment of the thin layer relative to the remainder of the donor wafer after contacting.

^The method comprises an additional step of preparing the free surface of the thin film after detachment, to achieve deposition.

^* The step of depositing is carried out by epitaxy.

^* the first material is an insulator.

^* The first material is quartz, while the second material is silicon. ^* the first material is a semiconductor.

^* The first material is silicon, while the second material is germanium.

^* Said heat treatment is apt to generate in the thin transferred layer an acceptable level of defects associated with the difference between the thermal expansion coefficients of the first and second materials.

Other aspects, objects and advantages of the present invention will appear better on reading the following detailed description of preferred embodiments thereof, given by way of nonlimiting example and with reference to the appended drawings, in which: Figures 1A-1D schematically illustrate the main steps of a preferred method of the invention.

It will be noted here that the dimensions, in particular relative thicknesses, shown in the figures have been chosen for the sake of clarity and are not meant to illustrate the reality of things. Referring firstly to Figure ^"IA, there is shown a support

10 and a donor wafer 20 in which, for example by ion implantation through a face 20a of the wafer, an embrittlement zone 21 defining an area 22 of the wafer 20 to be transferred on the support 10 has been made. 1 B, the support 10 and the wafer 20 are assembled and glued together by molecular adhesion, a bonding interface layer (Not shown), such as an oxide or nitride, being optionally formed on the support and / or on the wafer. The bonding interface is designated by the reference 12.

The assembly then undergoes a heat treatment, in one or more steps, so as firstly to perform on the one hand a detachment between the zone 22 and the rest of the wafer 20 at the weakening zone, and on the other hand a strengthening of the bonding interface between the support 10 and the thin layer now formed by the zone 22 detached as indicated above. The structure thus formed is illustrated in FIG. 1C. The above steps generally correspond to the Smart-process.

Cut ⁽ B ⁾ operated by the Applicant.

The present invention aims at situations in which the material of the support 10 and the material of the thin layer 22 have sufficiently different coefficients of thermal expansion from one another so that the aforementioned heat treatments can not be implemented without attending a form of deterioration of the composite structure of the support 10 and the thin layer 22, with any bonding interface layers.

According to the invention, a low value is chosen for the thickness e1 of the transferred layer 22, such that the aforementioned heat treatments leave the structure substantially unaffected; in other words, the thickness of the layer 22 is chosen sufficiently low not to cause rupture phenomena, or undesirable phenomena of plastic deformation, linked for example to dislocations, atomic plane shifts, cracks, etc. . in the layer 22. The free surface of the layer 22 is then prepared to receive a deposit of the same material. This preparation may comprise a chemical mechanical polishing, a sacrificial oxidation, a rapid thermal annealing (RTA for "Rapid Thermal Annealing" in English terminology) or an oven annealing, etc., the objective here being to achieve at a sufficiently low surface roughness. The next step of the process, illustrated in FIG. 1D, consists in using the layer 22 thus prepared as a seed layer for depositing the same material over a thickness e2, by epitaxy, and effecting an increase in the thickness of the overall layer 220 (useful layer) of the material constituting the layers 22 and 22 'up to the desired value. Epitaxy makes it possible to obtain a very good crystalline quality.

It will be observed here that the choice of the thickness e1 of the transferred layer 22 may be such that there is a certain density level of dislocations or sliding planes in the intermediate hetero-structure represented in FIG. 1C and in particular In fact, these defects, after the epitaxy of the layer 22 ', are buried deep in the useful layer 220 and are not through.

It will further be observed that the phase of thickening by epitaxial deposition of the layer 22 'makes it possible to postpone in the end much greater thicknesses than is possible with a technique of the Smart-Cut® type, limited in a manner inherent by the possible depth of implantation

Example 1

In this first example, it is sought to produce a structure composed of a quartz support, for example of a thickness of 1.2 mm, on which a monocrystalline silicon layer with a thickness of up to 500 to 2000 Å applications in microelectronics, or even more for other applications such as charge coupled devices (CCD) in English terminology.

The experiment demonstrates that the critical temperature from which excessive plastic deformations (dislocations, sliding planes, etc.) occur in a structure composed of a thin layer of Si transferred according to the Smart-Cut process on a support in quartz depends on the thickness of the layer transferred as follows: Thickness layer 22 Temp. Critical

2000 at 750 ° C

500 Å 950 ° C 200 Å 1100 ° C

According to the present example, a layer of monocrystalline silicon 22 having a thickness of 200 Å is transferred onto the quartz support 10, this transfer involving reinforcement of the bonding interface by heat treatment at 1050 ° C. for a period of time. about two hours. Due to the limited thickness of the layer 22, this heat treatment does not cause any detrimental deterioration (cracking or breaking) of the structure. The free surface of the thin layer 22 is then prepared for epitaxial deposition of the silicon complement making it possible to produce the monocrystalline useful layer of the desired thickness. This epitaxy to form the layer 22 'also monocrystalline silicon is made to a thickness that can vary widely depending on the application.

Thus, for applications in microelectronics, the thickness of the deposit is for example about 800 to 1800 Å, resulting in a useful layer thickness of about 1000 to 2000 Å.

For CCD applications, the overall thickness sought is typically 5 to 10 μm.

Example 2

It is sought to provide a semiconductor-on-insulator structure comprising a silicon support (monocrystalline or polycrystalline) and a thick monocrystalline germanium thick layer, for example for photovoltaic component applications. The thermal treatments necessary for the detachment of the thin layer 22 of germanium with respect to its donor wafer and reinforcement of the bonding interface with the support 10 of silicon.

Typically, these treatments include a detachment phase at a temperature of about 300 to 400 ° C for a period of about a few minutes to two hours, and then a step of reinforcing the bonding interface at a temperature of about 500 at 800 ° C for a period of about one hour.

It is then determined, experimentally, that a thickness of the thin layer 22 which is not greater than about 200 Å makes it possible to apply these heat treatments to the structure without said thin layer deteriorating.

Then, on the thin layer 22, after a treatment preparatory to epitaxy, such as a chemical-mechanical polishing, a monocrystalline germanium deposit 22 'is formed which is formed in the continuity of the layer 22 in terms of crystalline structure, and therefore achieve a thickening thereof. In the present example, this deposition is carried out at a temperature of about 700 ° C., and at a thickness of 4800 Å, to form a total useful layer of monocrystalline germanium having a thickness of 5000 Å or more (up to at 3 μm). Of course, the present invention is not limited to the embodiments described, and the skilled person will be able to make many variations. It finds application as soon as it is desired to produce a heterostructure comprising at least one semiconductor material and in which an added layer must have a thickness greater than that authorized by the essential starting data which are the heat treatments to be undergone and the difference between the coefficients of thermal expansion of the two materials. In particular, structures of InP on Si and GaAs on Si will be mentioned.

It will also be noted that the transferred thin film may be constrained, in tension or in compression, by the additional thickness of deposited material preserving this stress. This allows thick stress layers, the stresses being ensured on thicknesses of several tens of nanometers, or even up to a few hundred nanometers depending on the level of stress that one wishes to preserve.

Claims

A method of manufacturing a structure comprising at least one semiconductor material for microelectronic, optoelectronic, optical, etc. applications, the method comprising transferring on a carrier (10) a first material of a monocrystalline thin layer (22) in a second material different from the first, and a predetermined heat treatment providing at least one reinforcement of a bonding interface (12) between the thin layer and the support, characterized in that the thickness (e1) of the thin layer is chosen according to the difference between the thermal expansion coefficients of the first and second materials and according to the parameters of said predetermined heat treatment, so that the stresses exerted by said heat treatment on the assembly of the support and of the transferred thin film leaves said assembly intact, and in that it comprises an additional step of depositing, on the couch e thin, of an additional thickness (22 ') of the second material in the monocrystalline state.

2. Method according to claim 1, characterized in that the thickness (e1) of the transferred thin film is between about

100 and 300 Å, and preferably between 150 and 250 Å.

3. Method according to claim 2, characterized in that the thickness (e2) of the deposit (22 ') formed on the transferred thin layer (22) is between about 1000 and 5000 Å.

4. Method according to one of claims 1 to 3, characterized in that the step of transferring the thin layer (22) of the second material comprises the substeps of creating in a donor wafer (20), by implantation of species, an embrittlement zone (21) delimiting the thin layer to be transferred, bringing the donor wafer into contact with the support, and to apply stresses capable of leading to detachment of the thin layer relative to the remainder of the donor wafer after contacting.

5. Method according to claim 4, characterized in that it comprises an additional step of preparing the free surface of the thin layer (22), after detachment, to perform the deposition (22 ').

6. Method according to one of claims 1 to 5, characterized in that the deposition step is carried out by epitaxy.

7. Method according to one of claims 1 to 6, characterized in that the first material is an insulator.

8. Method according to claim 7, characterized in that the first material is quartz.

9. The method of claim 8, characterized in that the second material is silicon.

10. Method according to one of claims 1 to 6, characterized in that the first material is a semiconductor.

11. The method of claim 10, characterized in that the first material is silicon.

12. The method of claim 11, characterized in that the second material is germanium.

13. Method according to one of claims 1 to 12, characterized in that said heat treatment is capable of generating in the thin layer transferred (22) an acceptable level of defects related to the difference between the coefficients of thermal expansion of the first and second materials.