EP1856801A1

EP1856801A1 - Transistor arrangement for rectifier and inverter

Info

Publication number: EP1856801A1
Application number: EP06707866A
Authority: EP
Inventors: Stephan Rees; Armin Ruf; Ulrich Ammann
Original assignee: Robert Bosch GmbH
Current assignee: Robert Bosch GmbH
Priority date: 2005-03-02
Filing date: 2006-01-27
Publication date: 2007-11-21
Also published as: KR20070108390A; WO2006092349A1; JP2008532397A; US20070182459A1; US7616047B2; AU2006219967A1; CN101133554A; DE102005009465A1

Abstract

The invention relates to a transistor arrangement (1) comprising a transistor (10), which is provided with first and second connections (12, 14) and a control connection (16) for controlling a current flow (i<SUB>D</SUB>) between said first and second connections (12, 14), a signal processing device (22) exposed to the transistor control voltage (uDS) for admitting said controll connection (16) according to a differential voltage (uDS) supplied between the first and second connections (12, 14) and a control device (23) which is associated with the signal processing device (22) and switches it between at least two operating modes. An inverter signal (uWR) causes, for an uWR value=0, an effect in such a way that the transistor (10) is used in the form of a conductor for uDS < 0 and is locked for uDS > 0. For uWR = uWR, said transistor (10) is permanently conductive.

Description

Transistor arrangement for rectifier and inverter

The invention relates to a transistor arrangement according to the preamble of claim 1, an arrangement for DC and / or inverting at least one electrical voltage according to the preamble of claim 12 and a device for DC and / or inverting at least one electrical voltage according to claim 13. The invention also discloses a use for a transistor arrangement or an arrangement according to claim 14, a use for a device according to claim 15 and a method for controlling a transistor according to the preamble of claim 16.

State of the art

DC and inverters are currently widely used in a wide power range of switchable on and off, voltage-controlled transistors. In this case, in particular for the conversion of a DC voltage into a three-phase AC voltage, or vice versa, a six-pulse bridge circuit is known, in which a DC voltage source can be connected via throttles / inductances with a three-phase voltage source. In the process, field-effect transistors (FETs), in particular MOSFETs, are often used for voltages of less than 100V. In this case, the source terminal and the drain terminal of the individual transistors are connected to a diode (in a MOSFET, this diode is already inherent in the transistor), the diodes then take over the rectification of the three alternating currents in a simple manner without further control. For the direction of the DC voltage, that is to say the reverse case, a specific control of the transistors is required in order to switch them on and off according to a known method (for example using fundamental oscillation clocking or pulse width modulation). It was recognized that these were Judge operation required drive circuit can be advantageously used to relieve the diodes in rectifier operation by turning on the parallel-connected transistors. Such a method is known inter alia by the term "synchronous rectification" and reduces the voltage loss in the rectification, but it is disadvantageous that for determining the on and off times of the diodes and the MOSFETs, especially taking into account the required This effort can be achieved by using a self-controlled transistor, as described in the publications "Novel Rectifier Principles for the Efficient Powering of Automotive Wiring Systems from Claw Pole Generators" (U. Ammann, Diploma thesis at the Institute of Power Electronics and Control Engineering of the University of Stuttgart, 2002) and "A Smart Synchronous Rectifier for 12 V Automobile Alternators" (Rees, U. Ammann, Proceedings of the 34th IEEE PESC Conference 2003, pp. 1516 et seq., Acapulco, Mexico) but at the same time waiving the possibility of a W echselrichterbetriebs. There remains therefore the desire for a simplified, efficient DC and inverter.

Advantages of the invention

In a transistor arrangement having a transistor, comprising a first and a second terminal and a control connection setting a current flow between the first and second terminals, and also having a differential voltage with a transistor control voltage applied to the control terminal as a function of a first and second terminal voltage beaufschlag- the signal conditioning device, according to the invention one of the signal conditioning device associated and this switching between at least two modes of operation proposed driving device. In the context of this application, a transistor is understood to mean any voltage-controlled semiconductor valve. that is, each semiconductor device whose transmission characteristic can be controlled by means of an applied voltage. A first mode of operation makes it possible to control the transistor by means of the differential voltage, which would be used in a DC and inverter circuit for the "synchronous rectifying" mode, ie rectification of an AC voltage. In the case of a DC and DC inverter, the differential voltage used to drive the transistor is superimposed by or replaced by an additional voltage, the aim being to modify the drive used in the first mode of operation so that the transistor uses one of In this way, a transistor arrangement is realized, which enables both a self-controlling and a third-party actuated control of the transistor The advantages of such an arrangement are illustrated below, in particular in the exemplary embodiments.

Advantageously, the transistor is designed as an FET, in particular as a MOSFET, wherein the first terminal is the drain terminal, the second terminal is the source terminal and the control terminal is the gate terminal. For a variety of applications, the transistor arrangement can thus be produced cheaply and yet can be operated with considerable power.

According to one embodiment of the invention, a current flow control element is arranged between the first and second connection. Usually, a transistor allows a current flow from the first to the second connection. By means of the current flow control element, a current flow from the second to the first terminal can be made possible, unless the transistor already has such an element anyway due to its design, for example in the case of a MOSFET. - A -

It is advantageous if the current flow control element is designed as a diode. This is a reliable and inexpensive realization option. In the case of a MOSFET, such a diode (body diode) is already included in the design.

Preferably, the driving device is an inverter driving device outputting a driving signal. Inverter drive devices are used to drive the individual transistors of an inverter circuit. The invention makes it possible for the drive signal of a known inverter drive device to be used to drive the signal conditioning device and thus indirectly the transistor. Although the drive signal can also be generated separately, an additional control circuit can be dispensed with if an existing inverter control device is used.

In an advantageous embodiment of the invention, the on-control device controls the signal conditioning device by means of a substantially rectangular drive signal. This means that the drive signal has two levels, each of the levels corresponding to one of the mentioned modes. Thus, exactly one operating mode is selected in each case.

Advantageously, the transistor arrangement has a summation point which adds the drive signal to the differential voltage. As a result, the drive signal for switching the various operating states of the signal conditioning device can be fed in a simple manner. The function of a transistor arrangement having a summation point configured in this way is explained in more detail in one exemplary embodiment. Preferably, the transistor arrangement has a summation point which adds an essentially constant voltage as a function of a drive signal of the drive device temporarily to the differential voltage. This represents a further possibility to feed the drive signal for switching the various operating states of the signal conditioning device in a simple manner. In comparison to the alternative described above, the control of the signal conditioning device is thus decoupled from the quality (for example, level-faithfulness) of the signal from the inverter control device. This function of a transistor arrangement with a summation point designed in this way is also explained in more detail in one exemplary embodiment.

According to a preferred embodiment, the signal processing device has an amplifier for amplifying the differential voltage. By means of the amplifier, the differential voltage can be amplified so that a vote between the expected voltage interval of the differential voltage and the voltage required at the control terminal for the correct operation of the transistor voltage interval results.

Advantageously, the amplifier is followed by a voltage limiter. This allows the amplifier to be set to a desired gain without the risk of exceeding a maximum desired or allowable level at the control port. In addition, it is possible to introduce an additional signal into the signal conditioning device without running the risk that the permissible level at the control connection is exceeded with the additional signal.

Preferably, the control connection can be actuated by means of the activation device, the control connection optionally with a switching device which is dependent on the differential voltage or connected to a voltage independent of the differential voltage. assigned. In this way, the operating conditions can be switched easily and without being affected by the quality of the drive signal of the drive device.

The invention also relates to an arrangement for DC and / or inversion of at least one electrical voltage, with a first and a second transistor arrangement and a branch point arranged between the transistor arrangements, the transistor arrangements being formed with one or more of the preceding claims, and also a device for DC and / or inverting at least one electrical voltage with a plurality of just mentioned, parallel-connected arrangements. Such arrangements or devices can also be selectively used only for a change direction or a rectification, but results in the entire advantage of the invention, especially in a mixed DC and inverter operation.

The invention further relates to the use of a previously mentioned transistor arrangement and a previously mentioned arrangement in a DC and / or inverter circuit; in addition, the use of a previously mentioned device for an electrical machine of a motor vehicle, in particular for a claw pole generator.

Finally, the invention relates to a method for controlling a transistor having a first and a second terminal and a current flow between the first and second terminal adjusting control terminal, wherein the control terminal is applied in response to a voltage applied between the first and second terminal differential voltage with a transistor control voltage and the transistor control voltage is temporarily affected by a voltage independent of the differential voltage. drawings

The invention will now be explained in more detail with reference to exemplary embodiments. Show

1 shows a first embodiment of a transistor arrangement with a summation of the differential voltage and the drive signal,

FIG. 2 shows a second exemplary embodiment of a transistor arrangement in which the control terminal is optionally subjected to a voltage which is dependent or independent of the differential voltage,

FIG. 3 shows a third exemplary embodiment of a transistor arrangement with a summation of the differential voltage and a voltage temporarily switched on by means of the drive signal,

Figure 4 shows an embodiment of an arrangement for Gleich- and / or inverting, and

Figure 5 shows an embodiment of a device for DC and / or inverting.

Description of the embodiments

1 shows a first exemplary embodiment of a transistor arrangement 1 comprising a transistor 10, here designed as a MOSFET, having a first terminal 12, here the drain terminal D, a second terminal 14, here the source terminal S, and a control terminal 16 , here the gate connection G. Between the source terminal S and the drain terminal D, a current flow control element 18 is shown, which is here a diode 20, which is included in the structure of the transistor 10 due to design. In the transistor 10, a drain current i _{D flows} and via the transistor 10, that is, from the drain terminal D to the source terminal S, a differential voltage U _D S drops, here the so-called drain-source voltage. The transistor arrangement 1 furthermore has a signal conditioning device 22, which is supplied, inter alia, with the differential voltage U _D S and acts on the gate terminal G with a transistor control voltage UGS. As a function of the transistor control voltage UGS, the drain current i _D sets in a known manner. The signal conditioning device 22 is also supplied with an inverter signal U _WR from a control device 23, in this case an inverter drive device 25, at a summation point 24, at which the differential voltage U _D S is already present. The inverter signal U _WR is a rectangular signal with a peak value Ü _WR , as used to drive known inverter circuits. The peak value Ü _WR is chosen larger than a maximum permanently occurring drain-source voltage. Accordingly, the voltage -U _D S + U _WR is present at the summation point 24, the value of which alternately results in -UDS or -UDS + ÜWR. The voltage -U _D S + U _WR is then supplied to the amplifier 26, which has a gain K and thus outputs a voltage K ^» (-UDS + UWR). This voltage is kept within certain limits by a limiter 28 connected downstream of the amplifier 26, namely between a minimum voltage value U _GS min and a maximum voltage value U _GS m _a x. The output voltage of the limiter 28 is then used as the transistor control voltage UGS. In the case where U _WR = 0, the function of the self-controlled transistor mentioned in the introduction results. The transistor 10 thus becomes blocking for u _D s> 0 and conducting for u _D s <0. This then provides - in a corresponding circuit - the basis for a rectifier operation. If the case sets U _WR = Ü _WR , is at the input of the amplifier 26 irrespective of the current value of the differential voltage u _D s to a positive voltage because Ü _WR greater than the maximum differential voltage U _D S (drain-source voltage) ge - was chosen. This means that the transistor 10 - assuming a suitable choice of the gain K and the limiter values U _GS min and U _GS m _a x - is turned on. The transistor arrangement 1 is then switched to its second operating mode, which -in a corresponding circuit-provides the basis for an inverter operation. While the transistor control voltage UGS is thus dependent on the differential voltage U _D S in the first operating mode, this dependence is canceled in the second operating mode by the described signal addition and the transistor is switched on permanently.

FIG. 2 shows in a second exemplary embodiment a further possibility for effecting the two operating states. For this purpose, a switching device 30 with a first switching state S1 and a second switching state S2 was arranged between the amplifier 26 and the limiter 28. In the first switching state S1, the switching device 30 connects the amplifier 26 to the limiter 28, so that the already known first mode is present. If switching is made to the second switching state S2, the input of the limiter 28 is now connected to a voltage source with the voltage Up _0S in this embodiment. The value Up _0S is chosen so large that sets the known second mode in which the transistor control voltage UGS is independent of the differential voltage U _D S SO large that the transistor 10 turns on. The operation of the switching device 30 takes place here by means of the signal U _WR from the inverter drive device 25. If the level below a certain threshold, in particular approximately zero, the switching state S1 is set, the level is above this threshold, in particular at Ü _WR , the Switching state S2 reached. The advantage of this control is, inter alia, that only minor requirements are to be placed on the quality of the inverter drive signal, since this signal only indirectly influences the transistor control voltage UGS.

A third embodiment is shown in FIG. Here, the difference voltage U _D S and a switchable by means of a switch 34 voltage U _{pos are} added to a summation point 32. Again, the operation of the switch 34 takes place by means of the signal U _WR from the inverter drive device 25. In the switching state S1, the voltage U _{pos is} decoupled from the summation point 32. It is then the known first mode before. In the switching state S2, the summing point 32 is supplied with the voltage Up _0S , which is selected to be so large that the transistor control voltage UGS becomes large regardless of the difference voltage U _D S-SO, so that the transistor 10 turns on. Then, the transistor device 1 is in the second mode. Compared to the second embodiment, this variant has the advantage that the switch 34 switches between a conductive and a high-resistance state, while the switching device 30 is used as a switch between two different conductive states. The switch 34 can therefore be advantageously designed as a semiconductor switch, in particular FET.

FIG. 4 shows an embodiment of an arrangement 36 for rectifying and / or inverting at least one electrical voltage, having a first and a second transistor arrangement V _H1 V _L and a branching point 42 disposed between the transistor arrangements V _H , V _L. In the branch 43 an inductance L is arranged. The mode of operation of the arrangement 36 is, taking into account the knowledge of the person skilled in the art, of DC and / or inverter circuits and the above statements on the radio frequency tion manner of the transistor arrangements V _H , V _L immediately apparent. Reference is merely made to level shifter 44, which is required to adjust the inverter drive signal for the first transistor arrangement V _H. As advantages of such an arrangement 36 (DC and inverter branch) are mentioned that no additional driver circuit for the gate terminal G is necessary and that no additional control effort is required for the rectifier operation, since negative drain currents Ϊ _D , _H or Ϊ _D , _L for switching on the respective transistor arrangement V _H1 V _L lead. Furthermore, the transitions between the two operating modes "inverter" and "(synchronous) rectifier" are realized simply by the switching on and off of the control commands for the inverter operation.

A particular advantage of such an arrangement 36 in inverter operation will be explained in the following using the example of the fundamental oscillation clocked supply of an AC-side ohmic-inductive load. For this purpose, consider a point in time at which the first transistor arrangement V _{H leads to} a positive drain current J _D1H = H and the second transistor arrangement V _L blocks. The load current ii should now be commutated by switching off the transistor arrangement V _H and then switching on the transistor arrangement V _L. In the inverter drive according to the prior art, the observance of interlocking times between see the turn-on for the transistor arrangements V _H , V _L required to avoid a short circuit of the DC voltage U _ZK ZU. In the case considered here, this inevitably leads to a brief conduction of the body diode in the transistor arrangement V _L until the transistor arrangement V _{L is} switched on. In the case of the fundamental oscillation, the sign of the load current will reverse in the now following conduction time of the transistor arrangement V _L , so that a similar process follows in the commutation from the transistor arrangement V _L to the transistor arrangement V _H. According to So you have to be able to set the locking time very small and very accurate in the prior art. In the case of the arrangement 36 according to the invention, this is not necessary since the switching on of the current-receiving switching device transistor arrangement V _H (or V _L ) takes place automatically. (It is understood, of course, that the turn-on signal for the current sinking transistor arrangement V _H (or V _L ) should be applied in the time between the current consumption by the transistor arrangement V _H (or V _L ) and the sign change of the load current ii.) The arrangement 36 In addition, it permits simplified control during operation as a ground frequency-controlled inverter.

Finally, FIG. 5 shows a device 46 for rectification and / or inversion with three arrangements 36 comprising the transistor arrangements Vi to V ₆ , which have already been explained in detail. The required level changers are integrated here into the inverter control device 25. On one side of the device 46 is a DC voltage U _ZK and on the other side three AC voltages Ui, U2, U ₃ at. The operation of the device 46 is immediately apparent taking into account the knowledge of the art to DC and / or inverter circuits and the foregoing on the operation of the transistor arrangements Vi to V ₆ and the arrangements 36 and therefore needs no further explanation.

The invention is particularly suitable for the connection of claw pole generators for motor vehicles to the motor vehicle electrical system. The inverter function can be used to advantage as a starter for the operation of the claw pole generator. The optimized synchronous rectifier function improves the overall efficiency of energy production and reduces the so-called "start-up speed" of the generator.

Claims

claims

A transistor arrangement (1) comprising a transistor (10), having a first and a second terminal (12, 14) and a control terminal (16) adjusting a current flow (Ϊ _D ) between the first and second terminals (12, 14), and further comprising a signal conditioning device (22) which acts upon the control connection (16) as a function of a differential voltage (U _D S) applied between the first and second terminals (12, 14) and a transistor control voltage (UGS), characterized by one of the signal conditioning means (22 ) and these switching between at least two operating modes control device (23).

2. Transistor arrangement (1) according to claim 1, characterized in that the transistor (10) is designed as a FET, in particular as a MOSFET, wherein the first terminal (12) of the drain terminal (D), the second terminal (14). the source terminal (S) and the control terminal (16) is the gate terminal (G).

3. Transistor arrangement (1) according to one of the preceding claims, characterized in that between the first and second terminal (12,14) is arranged a current flow control element (18).

4. transistor arrangement (1) according to claim 3, characterized in that the current flow control element (18) as a diode (20) is formed.

5. transistor arrangement (1) according to one of the preceding claims, characterized in that the drive device (23) is a control signal (U _WR ) issuing change richteran- control device (25).

6. Transistor arrangement (1) according to one of the preceding claims, characterized in that the drive device (23) controls the signal conditioning device (22) by means of a substantially rectangular drive signal (U _WR ).

7. A transistor arrangement (1) according to any one of claims 5 and 6, characterized by a the drive signal (U _WR ) to the differential voltage (U _D S) adding summation point (24).

8. Transistor arrangement (1) according to one of claims 1 to 6, characterized by a substantially constant voltage (Upos) in response to a drive signal (UWR) of the drive device (23) temporarily to the differential voltage (u _D s) adding summation point (32 ).

9. transistor arrangement (1) according to one of the preceding claims, characterized in that the signal conditioning device (22) has an amplifier (26) for amplifying the differential voltage (UDS).

10. Transistor arrangement (1) according to one of the preceding claims, characterized in that the amplifier (26) is followed by a voltage limiter (28).

11. Transistor arrangement (1) according to one of the preceding claims, characterized in that the control terminal (16) actuated by means of the drive device (23), the control terminal (16) optionally with one of the differential voltage (U _D S) dependent or with a associated switching device (30) is connected by the differential voltage (u _D s) independent voltage (U _pos ).

12. Arrangement (36) for DC and / or inverting at least one electrical voltage, with a first and a second Transistor arrangement (V _H , V _L ) and arranged between the transistor arrangements (V _H1 V _L ) branching point (42), characterized in that the transistor arrangements (V _H , V _L ) are formed according to one of the preceding claims.

13. Device (46) for DC and / or inverting at least one electrical voltage with a plurality of parallel-connected arrangements (36), characterized in that the transistor arrangements (Vi ₁ V ₂₁ V ₃₁ V ₄₁ V ₅₁ V ₆ ) of the arrangements (36 ) are formed according to one of claims 1 to 11.

14. Use of a transistor arrangement (1) according to one of claims 1 to 11 and / or an arrangement (36) according to claim 12 in a DC and / or inverter circuit.

15. Use of a device (46) according to claim 13 for an electrical machine of a motor vehicle, in particular for a claw pole generator.

16. A method for controlling a transistor (10) comprising a first and a second terminal (12,14) and a current flow (Ϊ _D ) between the first and second terminal (12,14) adjusting control terminal (16), wherein the Control terminal (16) in response to a difference between the first and second terminal (12,14) applied differential voltage (U _D S) with a transistor control voltage (u _G s) is applied, characterized in that the transistor control voltage (UGS) temporarily by one of the Differential voltage (U _D S) independent voltage is affected.