EP1766648B1 - Safety fuse for a chip - Google Patents
Safety fuse for a chip Download PDFInfo
- Publication number
- EP1766648B1 EP1766648B1 EP05776175A EP05776175A EP1766648B1 EP 1766648 B1 EP1766648 B1 EP 1766648B1 EP 05776175 A EP05776175 A EP 05776175A EP 05776175 A EP05776175 A EP 05776175A EP 1766648 B1 EP1766648 B1 EP 1766648B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- metallic conductor
- fuse
- intermediate layer
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004020 conductor Substances 0.000 claims abstract description 54
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 238000000034 method Methods 0.000 claims abstract description 24
- 239000000919 ceramic Substances 0.000 claims abstract description 23
- 239000011521 glass Substances 0.000 claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 claims abstract description 13
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000007650 screen-printing Methods 0.000 claims abstract description 7
- 238000007639 printing Methods 0.000 claims abstract description 6
- 229910052593 corundum Inorganic materials 0.000 claims abstract 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims abstract 3
- 239000010410 layer Substances 0.000 claims description 94
- 238000005516 engineering process Methods 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 239000010409 thin film Substances 0.000 claims description 14
- 239000010408 film Substances 0.000 claims description 13
- 229910052802 copper Inorganic materials 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 11
- 229910052709 silver Inorganic materials 0.000 claims description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 6
- 238000001459 lithography Methods 0.000 claims description 6
- 239000004952 Polyamide Substances 0.000 claims description 5
- 239000012790 adhesive layer Substances 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 229920002647 polyamide Polymers 0.000 claims description 5
- 239000004642 Polyimide Substances 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229920001721 polyimide Polymers 0.000 claims description 4
- 229910052718 tin Inorganic materials 0.000 claims description 4
- 150000002118 epoxides Chemical class 0.000 claims description 3
- 239000012044 organic layer Substances 0.000 claims description 3
- 239000010944 silver (metal) Substances 0.000 claims 4
- 238000000151 deposition Methods 0.000 claims 3
- 239000004962 Polyamide-imide Substances 0.000 claims 2
- 230000008021 deposition Effects 0.000 claims 2
- 238000007654 immersion Methods 0.000 claims 2
- 229920002312 polyamide-imide Polymers 0.000 claims 2
- 239000011135 tin Substances 0.000 claims 2
- 238000002844 melting Methods 0.000 abstract description 9
- 230000008018 melting Effects 0.000 abstract description 7
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 6
- 239000004332 silver Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 3
- 239000002318 adhesion promoter Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 239000012876 carrier material Substances 0.000 description 2
- 239000002241 glass-ceramic Substances 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 239000011224 oxide ceramic Substances 0.000 description 2
- 229910052574 oxide ceramic Inorganic materials 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000002848 electrochemical method Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000004922 lacquer Substances 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000012766 organic filler Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/046—Fuses formed as printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H69/00—Apparatus or processes for the manufacture of emergency protective devices
- H01H69/02—Manufacture of fuses
- H01H69/022—Manufacture of fuses of printed circuit fuses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/0039—Means for influencing the rupture process of the fusible element
- H01H85/0047—Heating means
- H01H85/006—Heat reflective or insulating layer on the casing or on the fuse support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/0411—Miniature fuses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/0411—Miniature fuses
- H01H2085/0414—Surface mounted fuses
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49107—Fuse making
Definitions
- the invention relates to a fuse in chip design, which is applied to a carrier substrate made of an Al 2 O 3 ceramic, with a fusible metallic conductor, which is applied and structured by thin-film technology and which is provided with a cover layer, and an inexpensive method for production the chip backup.
- Chip fuses are formed on a ceramic base material by means of methods known to those skilled in the art, for example photolithography. Other support materials, such as FR-4-epoxy or polyimide are known. Chip fuses are typically designed for a voltage of up to 63V.
- the fuse In order to avoid damage to other electronic components by a disturbance in the electrical power supply, which causes an overvoltage or excessive current flow, it is known to provide a fuse in the power supply.
- the fuse consists essentially of a carrier material and a metallic conductor, which consists for example of copper, aluminum or silver.
- the geometry and cross section of the conductor determines the maximum possible current that can flow through this conductor without melting it. If this value is exceeded, the electrical conductor is melted due to the heat generated in it by its electrical resistance and thus The power supply is interrupted before downstream electronic components are overloaded or damaged.
- the substrate underlays used are all-ceramic glazed ceramic substrates with a high Al 2 O 3 antinucleate or low-aluminum oxide ceramic substrates with a low thermal conductivity. Both types of substrate are compared to conventional ceramic substrates, eg. B. from 96% Al 2 O 3 in thick film quality, which are used in the manufacture of passive components, considerably more expensive.
- a fusible metallic conductor is applied by electrochemical methods or by sputtering.
- a particularly high precision of the turn-off or melting characteristic is achieved by photolithographic structuring of sputtered layers, wherein a low aluminum oxide substrate with low thermal conductivity serves as a base.
- the JP 20031173728 A discloses a manufacturing method for a chip fuse in thin-film technology, wherein a fuse 14 and a cover layer 15 are arranged on a substrate 11.
- the fuse 14 is patterned by photolithography.
- the substrate 11 has a low thermal conductivity, in order not to dissipate the heat caused by the electric conductor 14 current in the electrical conductor 14 and thereby promote a melting of the electrical conductor 14.
- the electrical conductor 14 is in direct contact with the substrate 11.
- the JP 2002/140975 A describes a fuse with a metallic conductor 14 made of silver, which is also disposed directly on a substrate 11 with low thermal conductivity, wherein the metallic conductor 14 is electrodeposited or formed as a thick film.
- the JP 2003/151425 A discloses a fuse with a glass-ceramic substrate 11 having a low thermal conductivity and a metallic conductor 14 in thick-film technology.
- the JP 2002/279883 A also describes a fuse for a chip, in which the fusible region 17 of a conductor 15 is produced by a complex laser processing. This requires additional time and cost intensive processing steps.
- the JP 20031234057 A discloses a fuse resistor having a resistor 30 on a substrate 10, wherein between the resistor 30 and the substrate 10, a further heat-storing layer 42 is provided to store the heat generated in the resistor 30 heat.
- the fusible region is also produced by laser processing.
- the JP 08/102244 A describes a fuse 10 in thick film technology with a glass-glaze layer 2 with a low thermal conductivity wherein the glass layer 2 is disposed on a ceramic substrate 1 and on the glass layer 2, a fuse 3 is applied.
- the JP 10/050198 A discloses a further fuse in thin-film technology with a complex layer structure, in which on the conductor 3 and a glass layer 5, a further elastic silicone layer 6 is formed.
- the DE 197 04 097 A1 describes an electrical fuse element with a fusible link in thick film technology and a carrier wherein the carrier consists of a poor thermal conductivity material, in particular of a glass ceramic.
- the DE 695 12 519 T2 discloses a surface mounted fuse device wherein a thin film fusible conductor is disposed on a substrate and the substrate is preferably a FR-4 epoxy or a polyamide.
- JP 09 063 454 A a chip fuse according to the preamble of claim 1 with a glass glaze layer (over the entire surface) over the carrier substrate.
- An island-shaped formation of the glass layer is proposed only for the second, above the fusible conductor attached glass layer.
- the hole conductor layer used is gold (Au) and silver (Ag).
- the clamping electrodes are made of silver or silver-palladium.
- the JP 09 429 115 A again describes a chip fuse with a full-surface glass glaze layer over the carrier substrate.
- Aluminum is proposed as the fuse conductor layer.
- the clamping electrodes consist of at least 3 silver-based layers.
- the JP 10 050 198 A also describes a chip fuse with a full-surface glass glaze layer over the carrier substrate and a welterem Structure according to patent D1 with an additional silicone cover.
- JP 09 153 328 also describes a chip fuse with a full-surface glass glaze over the carrier substrate accordingly JP 09 063 454 A with an aluminum fuse conductor layer and silver contacts.
- the DE 101 64 240 A1 describes a switching protection device having a laminated copper or copper alloy layer formed around a columnar substrate body.
- Paragraph [0076] proposes the use of a Cr adhesion layer between the copper layer and the ceramic body. It also describes filling previously patterned grooves in the metallic conductor with organic materials designed to protect the grooves from contamination with foreign materials, the organic fillers having low thermal conductivity. It is therefore a filling of grooves of a current-carrying metallization layer which has been deposited directly on the ceramic carrier substrate.
- the DE 691 25 307 T2 describes a fuse Tellbauouou with a thin film fuse element and a Glaslsoltechniksbe slaughterung which are covered only a central portion of the substrate and which is provided with terminal attachment cuts and Kunststoffverhüllung.
- the core idea of the invention is to combine the advantages of a low-cost passive component manufacturing process with the advantages of thin-film technology and precise photolithographic patterning, through the use of a thermally insulating interlayer on Al 2 O 3 ceramics in combination with thin-film technology and photolithographic patterning is realized.
- the core idea of the invention is thus that between a low-cost ceramic substrate as a carrier with high thermal conductivity and the actual fusible metallic conductor an intermediate layer is provided, which is formed either by a cost-effective method, preferably applied in the island printing process low-melting inorganic glass paste or by an applied in island printing organic layer. Due to the low thermal conductivity of this intermediate layer, the heat arising in the metallic conductor through the current flowing through it is not dissipated downwardly through the carrier substrate with a usually higher thermal conductivity, so that melts in a desired current in the conductor this in the desired manner.
- This intermediate layer serves as a thermal insulator.
- a low-melting inorganic glass paste is used as the intermediate layer, which is applied in particular by screen printing on the carrier substrate.
- the intermediate layer is an organic intermediate layer, which is applied in particular in island printing and subsequently baked or cured in a manner known to those skilled in the art by the action of heat in the carrier substrate.
- any desired shaping of the intermediate layer can also be obtained by the simple island pressure, and the use of Al 2 O 3 ceramics as carrier material can be used.
- the advantage of the invention is that a cost-effective standard ceramic, a thermally insulating intermediate layer which can be produced cost-effectively by screen printing can be combined with the advantage of thin-film technology and photolithographic structuring.
- the carrier substrate used for the fuse an alumina substrate that is available from virtually all manufacturers of such ceramic substrates inexpensively and in any shape and size and z. B. is used in mass production of resistance manufacturers use.
- Such aluminum oxide ceramic substrates can already be provided by the manufacturer with notches in the form of the chips to be produced later from the substrate.
- the intermediate layers are applied, for example, in the region of the pre-bites given by the manufacturer, in order to separate the carrier substrate in a known manner without damaging the intermediate layers by breaking processes during a subsequent dicing process of the chips.
- an inorganic or an organic adhesion promoter layer may be applied directly on the intermediate layer by spraying or by sputtering.
- the metallic conductor is formed by a low-resistance metal layer in order to be able to set the melting point of the fuse accurately.
- this metal layer is applied by sputtering to the intermediate layer or the adhesion promoter layer. If the sputtered metal layer were applied to a carrier substrate which had been glazed over the whole area, this would lead to a reduced adhesion, so that delamination of the metal layer in the pre-contact region could occur in a singulation process by means of breaking.
- the metal layer on a thermally insulating island in the form of an intermediate layer with low thermal conductivity ensures the good adhesion of the metal layer in the contact area on the rougher aluminum oxide, as smooth surfaces are generated by these glass islands in the field of fuse, whereby the photolithographic structuring of the fuse particularly precise can be done because in contrast carrier substrates of thermally poorly conducting ceramics have higher surface roughness, which are unfavorable for a precise photolithographic patterning.
- a metal layer is deposited over the whole area on the layer arranged thereunder, for example copper, and then the desired structure is photolithographically etched into the layer.
- a negative lithography process is applied to the underlying layer, i. H. the intermediate layer or the adhesion promoter layer, first a photoresist is deposited, for example sprayed on, and then patterned in the desired manner by photolithography. Subsequently, a metal layer, for example a sputtered copper film, is deposited thereon and the remaining lacquer areas are removed thereon with the metal film.
- one or more cover layers is applied to cover the metallic conductor or preferably the entire fuse, which may, inter alia, also be formed by an inorganic barrier layer.
- the organic cover layer is in particular a polyamide, polyimide or an epoxide and can also be configured as a multilayer.
- the end contacts of the metallic conductor are formed by electrodepositing a metallic barrier layer, typically nickel, and the final solderable or bondable layer, typically of tin or tin alloys.
- a manufacturing process of a fuse 100 is deposited on a carrier substrate 10 (step a)), preferably an alumina ceramic, a thermally insulating intermediate layer 11 in island form (step b)).
- An adhesion layer 12 for improving the adhesion of the metallic conductor 13 to the substrate is applied to this intermediate layer 11 and the surrounding carrier substrate 10 (step c)).
- the metallic conductor 13 is applied to the adhesion layer 12, for example sputtered on a copper layer and photolithographically structured in the desired manner (step d)).
- the maximum current is predetermined by the thickness and width of the web in the central region of the metallic conductor 13 at the crossing of this bridge melts and thus other electronic components are protected from damage.
- the heat transfer into the carrier substrate 10 is strongly suppressed by the thermally insulating intermediate layer, so that the melting point of the fuse 100 can be precisely defined.
- the fuse 100 or the middle region of the metallic conductor 13 is coated with an organic cover layer 14, for example a polyamide or an epoxy, in order to protect the fuse 100 against damage.
- an organic cover layer 14 for example a polyamide or an epoxy, in order to protect the fuse 100 against damage.
- For contacting the end contacts 15 of the metallic conductor 13 are galvanized, for example with nickel and tin.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Fuses (AREA)
- Heterocyclic Carbon Compounds Containing A Hetero Ring Having Oxygen Or Sulfur (AREA)
- Polysaccharides And Polysaccharide Derivatives (AREA)
Abstract
Description
Die Erfindung betrifft eine Schmelzsicherung in Chipbauform, die auf einem Trägersubstrat aus einer Al2O3-Keramik aufgebracht ist, mit einem aufschmelzbaren metallischen Leiter, der mittels Dünnschichttechnik aufgebracht und strukturiert ist und der mit einer Deckschicht versehen ist, sowie ein kostengünstiges Verfahren zur Herstellung der Chipsicherung.The invention relates to a fuse in chip design, which is applied to a carrier substrate made of an Al 2 O 3 ceramic, with a fusible metallic conductor, which is applied and structured by thin-film technology and which is provided with a cover layer, and an inexpensive method for production the chip backup.
Chipsicherungen werden auf einem keramischen Grundmaterial mit Hilfe dem Fachmann bekannter Verfahren beispielsweise der Photolithographie ausgebildet. Auch andere Trägermaterialen, wie FR-4-Epoxid oder Polyimid sind bekannt. Chipsicherungen werden üblicherweise für eine Spannung bis zu 63 V ausgelegt.Chip fuses are formed on a ceramic base material by means of methods known to those skilled in the art, for example photolithography. Other support materials, such as FR-4-epoxy or polyimide are known. Chip fuses are typically designed for a voltage of up to 63V.
Um eine Beschädigung anderer elektronischer Komponenten durch eine Störung in der elektrischen Stromversorgung, die eine Überspannung oder einen zu großen Stromfluss herbeiführt, zu vermeiden ist es bekannt, in der Stromversorgung eine Schmelzsicherung vorzusehen. Die Schmelzsicherung besteht im Wesentlichen aus einem Trägermaterial und einem metallischem Leiter, der beispielsweise aus Kupfer, Aluminium oder Silber besteht. Durch die Geometrie und den Querschnitt des Leiters wird die maximal mögliche Stromstärke, die durch diesen Leiter fließen kann ohne ihn aufzuschmelzen bestimmt. Wird dieser Wert überschritten so wird der elektrische Leiter aufgrund der in ihm durch seinen elektrischen Widerstand anfallenden Wärme aufgeschmolzen und somit die Stromversorgung unterbrochen bevor nachgeschaltete elektronische Komponenten überlastet oder beschädigt werden.In order to avoid damage to other electronic components by a disturbance in the electrical power supply, which causes an overvoltage or excessive current flow, it is known to provide a fuse in the power supply. The fuse consists essentially of a carrier material and a metallic conductor, which consists for example of copper, aluminum or silver. The geometry and cross section of the conductor determines the maximum possible current that can flow through this conductor without melting it. If this value is exceeded, the electrical conductor is melted due to the heat generated in it by its electrical resistance and thus The power supply is interrupted before downstream electronic components are overloaded or damaged.
Bei den Verfahren zur Herstellung von Chipsicherungen in Dickschichttechnik, bei denen die Schmelzelemente und Kontaktschichten als Pasten mittels Siebdruck auf eine Substratunterlage mit niedriger thermischer Leitfähigkeit aufgebracht werden sind ausreichende Präzisionen der Geometrie der Schmelzelementschichten durch das Siebdruckverfahren prozessbedingt nur unzureichend realisierbar. Für höherwertige Dickschichtsicherungen ist es daher notwendig, durch zusätzliche Laserschnittverfahren das Schmelzelement bzw. den aufschmelzbaren metallischen Leiter zu bearbeiten.In the methods for the production of chip fuses in thick film technology, in which the fuses and contact layers are applied as pastes by screen printing on a substrate substrate with low thermal conductivity sufficient precision of the geometry of the fusible element layers by the screen printing process due to the process only insufficiently feasible. For higher-quality thick-film fuses, it is therefore necessary to process the fusible element or the fusible metallic conductor by additional laser cutting methods.
Üblicherweise werden als Substratunteriage ganzflächig glasierte Keramiksubstrate mit hohem Al2O3-Antell oder aluminiumoxidarme Keramiksubstrate mit niedriger thermischer Leitfähigkeit gewählt. Beide Substratarten sind im Vergleich zu herkömmlichen Keramiksubstraten, z. B. aus 96% Al2O3 in Dickschichtqualität, die in der Herstellung passiver Bauelemente Verwendung finden, erheblich teurer.Conventionally, the substrate underlays used are all-ceramic glazed ceramic substrates with a high Al 2 O 3 antinucleate or low-aluminum oxide ceramic substrates with a low thermal conductivity. Both types of substrate are compared to conventional ceramic substrates, eg. B. from 96% Al 2 O 3 in thick film quality, which are used in the manufacture of passive components, considerably more expensive.
Bei einem Verfahren zur Herstellung einer Schmelzsicherung in Dünnschichttechnik wird ein aufschmelzbarer metallischer Leiter durch elektrochemische Verfahren oder durch Sputtern aufgebracht. Eine besonders hohe Präzision der Abschalt- bzw. Schmelzcharakteristik wird dabei durch photolithographische Strukturierung von gesputterten Schichten erreicht, wobei als Unterlage ein aluminiumoxidarmes Substrat mit niedriger thermischer Leitfähigkeit dient.In a method for producing a fuse in thin-film technology, a fusible metallic conductor is applied by electrochemical methods or by sputtering. A particularly high precision of the turn-off or melting characteristic is achieved by photolithographic structuring of sputtered layers, wherein a low aluminum oxide substrate with low thermal conductivity serves as a base.
Die
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Bekannt sind also zum einen Verfahren zur Herstellung von Chipsicherungen in Dickschichttechnologie unter Verwendung von Spezialkeramiken oder auch Al2O3 Keramiken und einer thermisch isolierenden Zwischenschicht, zum anderen Chipsicherungen in Dünnschichttechnologie unter Verwendung von Spezialkeramiken oder anderer spezieller Trägermaterialien.Known are therefore on the one hand a method for the production of chip fuses in thick film technology using special ceramics or Al 2 O 3 ceramics and a thermally insulating intermediate layer, on the other hand, chip fuses in thin-film technology using special ceramics or other special support materials.
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Es ist daher Aufgabe der Erfindung, eine gattungsgemäße Schmelzsicherung anzugeben, die kostengünstig und mit ausreichender Präzision herstellbar ist wobei ihre Schmelzcharakteristik genau definierbar sein soll. Des Weiteren soll ein Verfahren zur Herstellung der Schmelzsicherung angegeben werden.It is therefore an object of the invention to provide a generic fuse, which is inexpensive and can be produced with sufficient precision and their melting characteristics should be precisely defined. Furthermore, a method for producing the fuse is to be specified.
Diese Aufgaben werden durch die Merkmale der Ansprüche 1 bzw. 3 gelöstThese objects are achieved by the features of claims 1 and 3, respectively
Kerngedanke der Erfindung ist es, die Vorteile eines kostengünstigen Herstellungsprozesses für passive Bauelemente mit den Vorteilen einer Dünnschichttechnologie und der präzisen photolithographischen Strukturierung zu kombinieren, was durch die Verwendung einer thermisch isolierenden Zwischenschicht auf Al2O3 Keramik in Kombination mit der Dünnschichttechnologie und der photolithographischen Strukturierung realisiert wird.The core idea of the invention is to combine the advantages of a low-cost passive component manufacturing process with the advantages of thin-film technology and precise photolithographic patterning, through the use of a thermally insulating interlayer on Al 2 O 3 ceramics in combination with thin-film technology and photolithographic patterning is realized.
Der Kerngedanke der Erfindung besteht also darin, dass zwischen einem kostengünstigen Keramiksubstrat als Träger mit hoher thermischer Leitfähigkeit und dem eigentlichen aufschmelzbaren metallischen Leiter eine Zwischenschicht vorgesehen ist, die entweder durch ein kostengünstiges Verfahren, vorzugsweise im Inseldruckverfahren aufgebrachte niedrigschmelzende anorganische Glaspaste oder durch eine im Inseldruck aufgebrachte organische Schicht gebildet ist. Aufgrund der niedrigen thermischen Leitfähigkeit dieser Zwischenschicht wird die im metallischen Leiter durch den durch diesen hindurchfließenden Strom entstehende Wärme nicht nach unten hin durch das Trägersubstrat mit einer üblicherweise höheren thermischen Leitfähigkeit abgeführt, so dass bei einer definierten Stromstärke im Leiter dieser in gewünschter Weise aufschmilzt. Diese Zwischenschicht dient als thermischer Isolator. In bevorzugter Weise wird als Zwischenschicht eine niedrig schmelzende anorganische Glaspaste verwendet, die insbesondere im Siebdruckverfahren auf das Trägersubstrat aufgebracht wird. Dies bietet gegenüber anderen Substraten mit niedriger thermischer Leitfähigkeit einen wesentlichen Vorteil, da letztere praktisch nur als Sonderanfertigungen lieferbar bzw. herstellbar sind, wohingegen durch das Aufbringen von Glasinseln als thermisch isolierende Zwischenschicht jetzt preisgünstige Standardkeramiken genutzt werden können, wobei auch solche mit nur mäßiger Oberflächenbeschaffenheit (Dickschichtqualität) zum Einsatz kommen können. In einer alternativen Ausgestaltung ist die Zwischenschicht eine organische Zwischenschicht, die insbesondere im Inseldruck aufgebracht und nachfolgend in dem Fachmann bekannter Weise durch Wärmeeinwirkung in das Trägersubstrat eingebrannt bzw. ausgehärtet wird. Hierbei kann durch den einfach durchzuführenden Inseldruck ebenfalls eine beliebige Formgebung der Zwischenschicht erhalten, sowie die Verwendung von Al2O3 Keramiken als Trägermaterial genutzt werden.The core idea of the invention is thus that between a low-cost ceramic substrate as a carrier with high thermal conductivity and the actual fusible metallic conductor an intermediate layer is provided, which is formed either by a cost-effective method, preferably applied in the island printing process low-melting inorganic glass paste or by an applied in island printing organic layer. Due to the low thermal conductivity of this intermediate layer, the heat arising in the metallic conductor through the current flowing through it is not dissipated downwardly through the carrier substrate with a usually higher thermal conductivity, so that melts in a desired current in the conductor this in the desired manner. This intermediate layer serves as a thermal insulator. Preferably, a low-melting inorganic glass paste is used as the intermediate layer, which is applied in particular by screen printing on the carrier substrate. This offers a significant advantage over other substrates with low thermal conductivity, since the latter are practically only available as custom-made or produced, whereas by applying glass islands as a thermally insulating intermediate layer now inexpensive standard ceramics can be used, even those with only moderate surface finish ( Thick film quality) can be used. In an alternative embodiment, the intermediate layer is an organic intermediate layer, which is applied in particular in island printing and subsequently baked or cured in a manner known to those skilled in the art by the action of heat in the carrier substrate. In this case, any desired shaping of the intermediate layer can also be obtained by the simple island pressure, and the use of Al 2 O 3 ceramics as carrier material can be used.
Der Vorteil der Erfindung besteht darin, dass eine kostengünstige Standardkeramik, eine kostengünstig im Siebdruckverfahren herstellbare thermisch isolierende Zwischenschicht mit dem Vorteil der Dünnschichttechnik und der Photolithographischen Strukturierung kombiniert werden kann.The advantage of the invention is that a cost-effective standard ceramic, a thermally insulating intermediate layer which can be produced cost-effectively by screen printing can be combined with the advantage of thin-film technology and photolithographic structuring.
Hierdurch können hochpräzise und kostengünstige Schmelzsicherungen in miniaturisierter Ausführung zur Absicherung elektronischer Baugruppen vor Fehlströmen hergestellt werden.As a result, highly precise and cost-effective fuses in miniaturized version for securing electronic assemblies against fault currents can be produced.
In vorteilhafter Weise wird als Trägersubstrat für die Schmelzsicherung ein Aluminiumoxidsubstrat verwendet, das von praktisch allen Herstellern derartiger Keramiksubstrate preisgünstig und in beliebiger Form und Größe verfügbar ist und z. B. in der Massenproduktion der Widerstandshersteller Verwendung findet. Derartige Aluminiumoxid-Keramiksubstrate können bereits mit Vorkerbungen in Form der später aus dem Substrat herzustellenden Chips herstellerseitig versehen sein. Bei beiden vorstehend beschriebenen Ausgestaltungen werden die Zwischenschichten beispielsweise im Bereich der herstellerseitig vorgegebenen Vorkerbungen aufgebracht, um bei einem späteren Vereinzelungsprozess der Chips das Trägersubstrat in bekannter Weise ohne Beschädigung der Zwischenschichten durch Brechprozesse zu trennen.Advantageously, the carrier substrate used for the fuse an alumina substrate that is available from virtually all manufacturers of such ceramic substrates inexpensively and in any shape and size and z. B. is used in mass production of resistance manufacturers use. Such aluminum oxide ceramic substrates can already be provided by the manufacturer with notches in the form of the chips to be produced later from the substrate. In the case of both embodiments described above, the intermediate layers are applied, for example, in the region of the pre-bites given by the manufacturer, in order to separate the carrier substrate in a known manner without damaging the intermediate layers by breaking processes during a subsequent dicing process of the chips.
Um die Haftung des metallischen Leiters auf der Zwischenschicht zu verbessern kann unmittelbar auf der Zwischenschicht eine anorganische oder eine organische Haftvermittlerschicht im Sprühverfahren oder durch Sputtern aufgebracht sein.In order to improve the adhesion of the metallic conductor to the intermediate layer, an inorganic or an organic adhesion promoter layer may be applied directly on the intermediate layer by spraying or by sputtering.
Vorteilhafterweise ist der metallische Leiter durch eine niedrigohmige Metallschicht gebildet, um den Schmelzpunkt der Schmelzsicherung genau einstellen zu können.Advantageously, the metallic conductor is formed by a low-resistance metal layer in order to be able to set the melting point of the fuse accurately.
Erfindungsgemäß wird diese Metallschicht durch Sputtern auf die Zwischenschicht bzw. die Haftvermittlerschicht aufgebracht. Würde die gesputterte Metallschicht auf ein ganzflächig glasiertes Trägersubstrat aufgebracht, würde dies zu einer verminderten Haftung führen, so dass bei einem Vereinzelungsprozess mittels Brechen eine Delamination der Metallschicht im Vorkontaktbereich auftreten könnte. Durch das Aufbringen der Metallschicht auf eine thermisch isolierende Insel in Form einer Zwischenschicht mit niedriger thermischer Leitfähigkeit ist die gute Haftung der Metallschicht im Kontaktbereich auf der rauheren Aluminiumoxidkeramik gewährleistet, da durch diese Glasinseln im Bereich der Schmelzsicherung glatte Oberflächen erzeugt werden, wodurch die photolithographische Strukturierung der Schmelzsicherung besonders präzise erfolgen kann, da im Gegensatz hierzu Trägersubstrate aus thermisch schlecht leitenden Keramiken höhere Oberflächenrauhigkeiten aufweisen, die für eine präzise photolithographische Strukturierung ungünstig sind.According to the invention, this metal layer is applied by sputtering to the intermediate layer or the adhesion promoter layer. If the sputtered metal layer were applied to a carrier substrate which had been glazed over the whole area, this would lead to a reduced adhesion, so that delamination of the metal layer in the pre-contact region could occur in a singulation process by means of breaking. By applying the metal layer on a thermally insulating island in the form of an intermediate layer with low thermal conductivity ensures the good adhesion of the metal layer in the contact area on the rougher aluminum oxide, as smooth surfaces are generated by these glass islands in the field of fuse, whereby the photolithographic structuring of the fuse particularly precise can be done because in contrast carrier substrates of thermally poorly conducting ceramics have higher surface roughness, which are unfavorable for a precise photolithographic patterning.
Zur Strukturierung des metallischen Leiters in Form der gewünschten Schmelzsicherung ist vorgeschlagen, dass dies durch positive oder negative Lithographie erfolgt. Bei einem positiven Lithographieprozess wird beispielsweise ganzflächig eine Metallschicht auf der darunter angeordneten Schicht abgeschieden, beispielsweise Kupfer, und anschließend die gewünschte Struktur photolithographisch in die Schicht geätzt. Bei einem negativen Lithographieprozess wird auf die darunter liegende Schicht, d. h. die Zwischenschicht oder die Haftvermittlerschicht, zuerst ein Photolack abgeschieden, beispielsweise aufgesprüht, und anschließend in gewünschter Weise photollthographisch strukturiert. Anschließend wird eine Metallschicht, beispielsweise ein gesputterter Kupferfilm, darauf abgeschieden und die verbleibenden Lackbereiche mit dem Metallfilm darauf abgelöst.For structuring the metallic conductor in the form of the desired fuse, it is proposed that this be done by positive or negative lithography. In a positive lithography process, for example, a metal layer is deposited over the whole area on the layer arranged thereunder, for example copper, and then the desired structure is photolithographically etched into the layer. In a negative lithography process is applied to the underlying layer, i. H. the intermediate layer or the adhesion promoter layer, first a photoresist is deposited, for example sprayed on, and then patterned in the desired manner by photolithography. Subsequently, a metal layer, for example a sputtered copper film, is deposited thereon and the remaining lacquer areas are removed thereon with the metal film.
Zum Schutz der Schmelzsicherung wird auf den metallischen Leiter oder vorzugsweise die gesamte Schmelzsicherung überdeckend eine oder mehrere Deckschichten aufgebracht, die u. a. auch durch eine anorganische Sperrschicht gebildet sein kann. Die organische Deckschicht ist insbesondere ein Polyamid, Polyimid oder ein Epoxid und kann auch mehrschichtig ausgeführt sein.In order to protect the fuse, one or more cover layers is applied to cover the metallic conductor or preferably the entire fuse, which may, inter alia, also be formed by an inorganic barrier layer. The organic cover layer is in particular a polyamide, polyimide or an epoxide and can also be configured as a multilayer.
Zur Kontaktierung der Schmelzsicherung werden die Endkontakte des metallischen Leiters durch galvanisches Abscheiden einer metallischen Barriereschicht, typischerweise aus Nickel, und der abschließenden lötfähigen oder bondfähigen Schicht, typischerweise aus Zinn oder Zinnlegierungen, erzeugt.For contacting the fuse, the end contacts of the metallic conductor are formed by electrodepositing a metallic barrier layer, typically nickel, and the final solderable or bondable layer, typically of tin or tin alloys.
Vorteilhafte Ausgestaltungen der Erfindung sind jeweils in den Unteransprüchen gekennzeichnet.Advantageous embodiments of the invention are each characterized in the subclaims.
Nachstehend wird die Erfindung anhand einer Zeichnung näher erläutert. Es zeigt:
-
Fig. 1 : den Herstellungsprozess einer Schmelzsicherung in sechs Schritten.
-
Fig. 1 : the manufacturing process of a fuse in six steps.
Bei dem in
Hierbei wird durch die Dicke und Breite des Stegs im mittleren Bereich des metallischen Leiters 13 die maximale Stromstärke vorgegeben bei deren Überschreiten dieser Steg aufschmilzt und somit andere elektronische Bauteile vor einer Beschädigung geschützt werden. Durch die thermisch isolierende Zwischenschicht wird der Wärmeübertrag in das Trägersubstrat 10 stark unterdrückt, so dass der Schmelzpunkt der Schmelzsicherung 100 präzise definierbar ist.Here, the maximum current is predetermined by the thickness and width of the web in the central region of the
Nachfolgend wird die Schmelzsicherung 100 bzw. der mittlere Bereich des metallischen Leiters 13 mit einer organischen Deckschicht 14, beispielsweise einem Polyamid oder einem Epoxid überzogen, um die Schmelzsicherung 100 gegen Beschädigungen zu schützen. Zur Kontaktierung werden die Endkontakte 15 des metallischen Leiters 13 galvanisiert, beispielsweise mit Nickel und Zinn.Subsequently, the
- 100100
- Schmelzsicherungfuse
- 1010
- Trägersubstratcarrier substrate
- 1111
- Zwischenschichtinterlayer
- 1212
- Haftschichtadhesive layer
- 1313
- metallischer Leitermetallic conductor
- 1414
- Deckschichttopcoat
- 1515
- Endkontaktend contact
Claims (4)
- A fuse (100) in chip design, which is on a carrier substrate (10) made of a ceramic, which is an aluminium oxide ceramic in thick-film quality or in thin-film quality, with a fusible metallic conductor (13) which is applied and structured by means of thin-film technology and which is provided with a cover layer (14), wherein between carrier substrate (10) and metallic conductor (13) an intermediate layer (11) having low thermal conductivity is arranged, the carrier substrate (10) is an Al2O3 ceramic with high thermal conductivity, and the fusible metallic conductor (13) is applied by sputteriing or vapour deposition methods and is structured by means of lithography technology,
the metallic conductor (13) is formed by a low-resistance metal layer, namely by Cu, Au, Ag, Sn alloy or a low-resistance Cu, Au, Ag, Sn alloy, and the metal layer is sputtered on by the vacuum method or is vapour-deposited,
the metallic conductor (13) is structured with a positive or negative lithography method,
a cover layer (14) is formed on the metallic conductor (13) by an inorganic or organic layer, in particular by a polyamide, polyimide, polyamide imide or an epoxide and in particular is constructed having several layers,
characterized in that
the intermediate layer (11) is a low-melting-point inorganic glass paste, applied by the screen printing method, or is an organic intermediate layer (11) applied by island printing,
end contacts (15) of the fuse (100) are formed by immersion or preferably by galvanic deposition, in particular of copper, nickel, tin and tin alloys, and an adhesive layer (12) is arranged on the intermediate layer (11),
the metallic conductor (13) is applied onto the adhesive layer (12). - The fuse according to Claim 1, characterized in that an inorganic barrier layer is formed between the cover layer (4) and the metallic conductor (13).
- A method for the production of a fuse (100) in chip design, consisting of a carrier substrate (10), an intermediate layer (11) with low thermal conductivity, an adhesive layer (12) which is arranged on the intermediate layer (11), and a fusible metallic conductor (13), which is applied and structured by means of thin-film technology and which is provided with a cover layer (14), wherein- the intermediate layer (11) is applied on the carrier substrate (10) of an Al2O3 ceramic in thick-film quality or thin-film quality with a high thermal conductivity,- the intermediate layer (11) is formed by a low-melting-point inorganic glass paste applied by the screen printing method or an organic intermediate layer (11) applied by island printing,- the metallic conductor (13) is applied onto the intermediate layer (11), wherein the metallic conductor (13) is applied onto the adhesive layer (12) and- the cover layer (14) is applied onto the metallic conductor (13),- the metallic conductor (13) is formed by a low-resistance metal layer, wherein the metal layer is sputtered on by the vacuum method or is vapour-deposited, and the metal layer is formed by Cu, Au, Ag, Sn alloy or a low-resistance Cu, Au, Ag, Sn alloy,- the metallic conductor (13) is structured by a positive or negative lithography process,- the cover layer (14) is formed by an inorganic or organic layer, in particular by a polyamide, polyimide, polyamide imide or an epoxide and may also be constructed having several layers, and- end contacts (15) of the fuse (100) are formed by immersion or preferably by galvanic deposition, in particular of copper, nickel, tin or tin alloys.
- The method according to Claim 3, characterized in that an inorganic barrier layer is formed between the cover layer (14) and the metallic conductor (13).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004033251A DE102004033251B3 (en) | 2004-07-08 | 2004-07-08 | Fuse for a chip |
PCT/EP2005/006894 WO2006005435A1 (en) | 2004-07-08 | 2005-06-27 | Safety fuse for a chip |
Publications (2)
Publication Number | Publication Date |
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EP1766648A1 EP1766648A1 (en) | 2007-03-28 |
EP1766648B1 true EP1766648B1 (en) | 2010-03-24 |
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ID=35414553
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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EP05776175A Active EP1766648B1 (en) | 2004-07-08 | 2005-06-27 | Safety fuse for a chip |
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US (2) | US9368308B2 (en) |
EP (1) | EP1766648B1 (en) |
JP (1) | JP2008505466A (en) |
KR (1) | KR101128250B1 (en) |
CN (1) | CN101010768B (en) |
AT (1) | ATE462194T1 (en) |
DE (2) | DE102004033251B3 (en) |
TW (1) | TWI413146B (en) |
WO (1) | WO2006005435A1 (en) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004033251B3 (en) | 2004-07-08 | 2006-03-09 | Vishay Bccomponents Beyschlag Gmbh | Fuse for a chip |
TWI323906B (en) * | 2007-02-14 | 2010-04-21 | Besdon Technology Corp | Chip-type fuse and method of manufacturing the same |
DE102007014334A1 (en) * | 2007-03-26 | 2008-10-02 | Robert Bosch Gmbh | Fusible alloy element, thermal fuse with a fusible alloy element and method for producing a thermal fuse |
US20090009281A1 (en) * | 2007-07-06 | 2009-01-08 | Cyntec Company | Fuse element and manufacturing method thereof |
JP4510858B2 (en) * | 2007-08-08 | 2010-07-28 | 釜屋電機株式会社 | Chip fuse and manufacturing method thereof |
JP5287154B2 (en) * | 2007-11-08 | 2013-09-11 | パナソニック株式会社 | Circuit protection element and manufacturing method thereof |
US9190235B2 (en) * | 2007-12-29 | 2015-11-17 | Cooper Technologies Company | Manufacturability of SMD and through-hole fuses using laser process |
WO2010048782A1 (en) * | 2008-10-28 | 2010-05-06 | 南京萨特科技发展有限公司 | Chip type fuse and its manufacturing method |
CN102891051B (en) * | 2011-07-22 | 2017-04-12 | 阿提瓦公司 | Side-by-side fuse component and battery array with same |
CN107492473B (en) * | 2017-08-17 | 2019-01-04 | 中国振华集团云科电子有限公司 | The processing method on chip fuse barrier layer |
US11636993B2 (en) | 2019-09-06 | 2023-04-25 | Eaton Intelligent Power Limited | Fabrication of printed fuse |
EP4415019A1 (en) * | 2023-02-09 | 2024-08-14 | Littelfuse, Inc. | Hybrid conductive paste for fast-opening, low-rating fuses |
Family Cites Families (58)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3368919A (en) * | 1964-07-29 | 1968-02-13 | Sylvania Electric Prod | Composite protective coat for thin film devices |
US3887893A (en) * | 1973-09-24 | 1975-06-03 | Allen Bradley Co | Fusible resistor |
CH642772A5 (en) * | 1977-05-28 | 1984-04-30 | Knudsen Ak L | ELECTRICAL MELTFUSE AND THEIR PRODUCTION METHOD. |
JPS5915394B2 (en) * | 1978-08-31 | 1984-04-09 | 富士通株式会社 | Thick film fine pattern generation method |
JPS57138961A (en) * | 1981-02-23 | 1982-08-27 | Fujitsu Ltd | Crossover formation for thermal head |
US4685203A (en) * | 1983-09-13 | 1987-08-11 | Mitsubishi Denki Kabushiki Kaisha | Hybrid integrated circuit substrate and method of manufacturing the same |
US4626818A (en) * | 1983-11-28 | 1986-12-02 | Centralab, Inc. | Device for programmable thick film networks |
US4754371A (en) * | 1984-04-27 | 1988-06-28 | Nec Corporation | Large scale integrated circuit package |
US4873506A (en) * | 1988-03-09 | 1989-10-10 | Cooper Industries, Inc. | Metallo-organic film fractional ampere fuses and method of making |
JP2772001B2 (en) * | 1988-11-28 | 1998-07-02 | 株式会社日立製作所 | Semiconductor device |
US5070393A (en) * | 1988-12-23 | 1991-12-03 | Kabushiki Kaisha Toshiba | Aluminum nitride substrate for formation of thin-film conductor layer and semiconductor device using the substrate |
US5097246A (en) * | 1990-04-16 | 1992-03-17 | Cooper Industries, Inc. | Low amperage microfuse |
US5166656A (en) * | 1992-02-28 | 1992-11-24 | Avx Corporation | Thin film surface mount fuses |
DE4329696C2 (en) * | 1993-09-02 | 1995-07-06 | Siemens Ag | Multichip module with SMD-compatible connection elements that can be surface-mounted on printed circuit boards |
US5363082A (en) * | 1993-10-27 | 1994-11-08 | Rapid Development Services, Inc. | Flip chip microfuse |
US5432378A (en) * | 1993-12-15 | 1995-07-11 | Cooper Industries, Inc. | Subminiature surface mounted circuit protector |
US5453726A (en) * | 1993-12-29 | 1995-09-26 | Aem (Holdings), Inc. | High reliability thick film surface mount fuse assembly |
US5552757A (en) * | 1994-05-27 | 1996-09-03 | Littelfuse, Inc. | Surface-mounted fuse device |
US5712610C1 (en) * | 1994-08-19 | 2002-06-25 | Sony Chemicals Corp | Protective device |
JPH08102244A (en) * | 1994-09-29 | 1996-04-16 | Kyocera Corp | Chip fuse |
JP2706625B2 (en) * | 1994-10-03 | 1998-01-28 | エス・オー・シー株式会社 | Micro chip fuse |
US5929741A (en) * | 1994-11-30 | 1999-07-27 | Hitachi Chemical Company, Ltd. | Current protector |
JPH0963454A (en) * | 1995-08-29 | 1997-03-07 | Kyocera Corp | Chip fuse |
JPH09129115A (en) * | 1995-10-30 | 1997-05-16 | Kyocera Corp | Chip fuse |
JPH09153328A (en) * | 1995-11-30 | 1997-06-10 | Kyocera Corp | Chip fuse |
US5699032A (en) * | 1996-06-07 | 1997-12-16 | Littelfuse, Inc. | Surface-mount fuse having a substrate with surfaces and a metal strip attached to the substrate using layer of adhesive material |
US5977860A (en) * | 1996-06-07 | 1999-11-02 | Littelfuse, Inc. | Surface-mount fuse and the manufacture thereof |
JPH1050198A (en) * | 1996-07-30 | 1998-02-20 | Kyocera Corp | Chip fuse element |
DE19704097A1 (en) * | 1997-02-04 | 1998-08-06 | Wickmann Werke Gmbh | Electrical fuse element |
US5914649A (en) * | 1997-03-28 | 1999-06-22 | Hitachi Chemical Company, Ltd. | Chip fuse and process for production thereof |
DE19738575A1 (en) * | 1997-09-04 | 1999-06-10 | Wickmann Werke Gmbh | Electrical fuse element |
US6610440B1 (en) * | 1998-03-10 | 2003-08-26 | Bipolar Technologies, Inc | Microscopic batteries for MEMS systems |
US6002322A (en) * | 1998-05-05 | 1999-12-14 | Littelfuse, Inc. | Chip protector surface-mounted fuse device |
JP4396787B2 (en) * | 1998-06-11 | 2010-01-13 | 内橋エステック株式会社 | Thin temperature fuse and method of manufacturing thin temperature fuse |
US6034589A (en) * | 1998-12-17 | 2000-03-07 | Aem, Inc. | Multi-layer and multi-element monolithic surface mount fuse and method of making the same |
US6078245A (en) * | 1998-12-17 | 2000-06-20 | Littelfuse, Inc. | Containment of tin diffusion bar |
JP3640146B2 (en) * | 1999-03-31 | 2005-04-20 | ソニーケミカル株式会社 | Protective element |
JP2000306477A (en) * | 1999-04-16 | 2000-11-02 | Sony Chem Corp | Protective element |
JP2001052593A (en) | 1999-08-09 | 2001-02-23 | Daito Tsushinki Kk | Fuse and its manufacture |
JP2001325868A (en) * | 2000-05-17 | 2001-11-22 | Sony Chem Corp | Protective element |
JP2001325869A (en) * | 2000-05-17 | 2001-11-22 | Sony Chem Corp | Protective element |
JP4666427B2 (en) * | 2000-11-10 | 2011-04-06 | 東京エレクトロン株式会社 | Quartz window and heat treatment equipment |
JP2002140975A (en) * | 2000-11-01 | 2002-05-17 | Koa Corp | Fuse element and its manufacturing method |
TW541556B (en) * | 2000-12-27 | 2003-07-11 | Matsushita Electric Ind Co Ltd | Circuit protector |
JP2002279883A (en) * | 2001-03-19 | 2002-09-27 | Koa Corp | Chip type fuse resistor and manufacturing method of same |
CN1327467C (en) * | 2001-06-11 | 2007-07-18 | 维克曼工厂有限公司 | Fuse component |
JP4204029B2 (en) * | 2001-11-30 | 2009-01-07 | ローム株式会社 | Chip resistor |
JP2003173728A (en) * | 2001-12-06 | 2003-06-20 | Koa Corp | Manufacturing method of chip current fuse |
US7385475B2 (en) * | 2002-01-10 | 2008-06-10 | Cooper Technologies Company | Low resistance polymer matrix fuse apparatus and method |
US7436284B2 (en) * | 2002-01-10 | 2008-10-14 | Cooper Technologies Company | Low resistance polymer matrix fuse apparatus and method |
US6891266B2 (en) * | 2002-02-14 | 2005-05-10 | Mia-Com | RF transition for an area array package |
JP2004214033A (en) * | 2002-12-27 | 2004-07-29 | Sony Chem Corp | Protection element |
JP4110967B2 (en) * | 2002-12-27 | 2008-07-02 | ソニーケミカル&インフォメーションデバイス株式会社 | Protective element |
JP2004265618A (en) * | 2003-02-05 | 2004-09-24 | Sony Chem Corp | Protection element |
JP2003234057A (en) * | 2003-03-10 | 2003-08-22 | Koa Corp | Fuse resistor and its manufacturing method |
US8680443B2 (en) * | 2004-01-06 | 2014-03-25 | Watlow Electric Manufacturing Company | Combined material layering technologies for electric heaters |
DE102004033251B3 (en) | 2004-07-08 | 2006-03-09 | Vishay Bccomponents Beyschlag Gmbh | Fuse for a chip |
US8976001B2 (en) * | 2010-11-08 | 2015-03-10 | Cyntec Co., Ltd. | Protective device |
-
2004
- 2004-07-08 DE DE102004033251A patent/DE102004033251B3/en not_active Expired - Lifetime
-
2005
- 2005-06-27 AT AT05776175T patent/ATE462194T1/en not_active IP Right Cessation
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- 2005-06-27 CN CN2005800291735A patent/CN101010768B/en active Active
- 2005-06-27 JP JP2007519668A patent/JP2008505466A/en active Pending
- 2005-06-27 KR KR1020077002904A patent/KR101128250B1/en active IP Right Grant
- 2005-06-27 EP EP05776175A patent/EP1766648B1/en active Active
- 2005-06-27 WO PCT/EP2005/006894 patent/WO2006005435A1/en active Application Filing
- 2005-06-27 US US11/571,787 patent/US9368308B2/en active Active
- 2005-07-06 TW TW094122828A patent/TWI413146B/en active
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2016
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US20160372293A1 (en) | 2016-12-22 |
TWI413146B (en) | 2013-10-21 |
US9368308B2 (en) | 2016-06-14 |
CN101010768B (en) | 2011-03-30 |
ATE462194T1 (en) | 2010-04-15 |
EP1766648A1 (en) | 2007-03-28 |
TW200612453A (en) | 2006-04-16 |
KR20070038143A (en) | 2007-04-09 |
US10354826B2 (en) | 2019-07-16 |
DE102004033251B3 (en) | 2006-03-09 |
KR101128250B1 (en) | 2012-03-23 |
US20080303626A1 (en) | 2008-12-11 |
JP2008505466A (en) | 2008-02-21 |
CN101010768A (en) | 2007-08-01 |
DE502005009279D1 (en) | 2010-05-06 |
WO2006005435A1 (en) | 2006-01-19 |
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