EP1687722A1

EP1687722A1 - Monolithically integrated interface circuit

Info

Publication number: EP1687722A1
Application number: EP04798060A
Authority: EP
Inventors: Reiner Bidenbach; Jörg Franke; Burkhard Giebel; Markus Rogalla
Original assignee: TDK Micronas GmbH
Current assignee: TDK Micronas GmbH
Priority date: 2003-11-28
Filing date: 2004-11-24
Publication date: 2006-08-09
Also published as: WO2005052794A1; US20090153187A1

Abstract

The invention relates to integrated circuits comprising a monolithically integrated logic IC and a monolithically integrated interface circuit that is conductively connected to the logic IC. The electrical properties of said interface circuit are programmable. The interface circuit also has a lower integration density than the logic IC, and comprises monitoring modules for monitoring the logic ICs.

Description

Monolithically integrated matching circuit

The invention relates to monolithically integrated circuits, in particular monolithically integrated processors, which due to the constant reduction in structure can accommodate more and more functional units and thus very complex control and

Can take over regulatory recordings. This development tendency is also reinforced by the fact that the development and manufacturing effort for individual solutions is getting bigger, so that one increasingly deviates from individual solutions and offers more universal, standardized circuits, which are of course even bigger and more complex, but which are offered by software-supported programming the individual tasks and uses can be customized. With such "universal solutions", however, completely new difficulties arise which make the technical solution necessary. Another difficulty arises because in many areas of application the required availability of the individual circuits has to be much greater than the change cycles prescribed by the technology Technology usually also changes many electronic parameters of the circuit, which must then be taken into account by the peripheral circuits. Some of these difficulties are listed below and corresponding solutions are given. An essential point with all solutions is that there is a kind of decoupling between the actual one Processor and the application level takes place in that critical connections of the processor do not communicate directly with the periphery but only via an adapter circuit.

The general goal in semiconductor manufacturing is to reduce production costs. The reduction in the structural widths of semiconductor processes and the use of ever larger wafers in production contribute to this. This results in the trend that comparatively simple functions (example 8-bit microcontrollers) can be produced in ever increasing numbers with a single wafer lot.

A problem arises when the individual product cannot be accepted at all in these quantities, but at the same time the costs for the photolithographic masks, the reticle costs, have to be allocated to the individual ICs in an ever increasing amount. There is a trend reversal here, which is to prevent customized ICs with small quantities, which are known under the name "ASICs" leads.

Problem Solving According to the invention, the conflict between the minimum volume offered and the maximum volume requested is resolved by partitioning the ASIC function into: 1. A core (“EngineUnit”), • which is the same for many comparable ASICs and is therefore in high volume demand , • that can be shrunk without special requirements, • that can come from any semiconductor factory 2. a periphery (the described adaptation circuit = "Bodyllnit"), • that takes over the application-specific adaptation to the respective task, that is, for the AS in ASIC • Because of the lower required integration density, it can be manufactured with less risk in less dense technologies with a comparatively low minimum volume and low specific mask costs.

From DE 101 57 457 A1 it is already known to build an integrated circuit from a first IC (connection IC) with a plurality of voltage-tolerant connections and a bus interface and a second IC (logic IC) with a plurality of logic circuits, which data delivers to the first IC via a bus. The connection IC and the logic IC can be different

Have integration density. However, it is disadvantageous that according to the teaching of DE 101 57 457 A1, if the connection IC is to be adapted, a completely new development of this IC is required.

DE 102 43 684 describes a receiving device for a programmable, electronic processing device, which has a first and a second, each monolithically integrated component. The first component includes the input and output interfaces of the entire processing device. The second component is only accessible from the outside via the first component. The first The component in this case contains matching circuits which serve for the electrical adaptation of the connections of the second component to the external conditions. At least one of the matching circuits can be programmable in its electrical properties.

The above However, state-of-the-art documents do not offer any solution to the problem of monitoring control in the event of a functional part failing, which also allows the conflict between the minimum volume offered and the maximum volume requested to be resolved at the same time.

The invention solves this problem by the features of claims 1 and 5, it being provided in particular that the adaptation circuit has monitoring modules for monitoring the logic IC. Advantageous further developments result from the subclaims and the following description.

It results, for. B. an IC family, which provides the minimum volume of a high-density core with its high total volume, but covers the requested partial volume of the individual ASIC solution with a cost-effective adaptation of the periphery.

Problem of decreasing number of semiconductor manufacturing facilities

To further increase productivity in semiconductor production, the structure widths of the semiconductor processes are reduced and larger wafers are used. However, the investment costs for new production sites are also increasing. The semiconductor companies are countering this trend by increasingly sharing the investment costs with other semiconductor companies. This results in fewer and fewer production facilities with ever greater capacity, which more and more companies share.

On the other hand, the buyers of semiconductors, especially from the automotive sector, have to make sure that each component can also be obtained from a second source. However, complying with this requirement is becoming increasingly difficult, since even if a specific component can be obtained from more than one semiconductor supplier, it increasingly only comes from semiconductor production. To make matters worse, the lifespan of an application in the automobile is usually much longer than the generation cycle of a semiconductor production or technology. Therefore, the consumer of semiconductors from the automotive sector has to worry about a new second source for every generation change of the semiconductor, i.e. even more than once per service life of an application.

Troubleshooting

The monolithically integrated adapter circuit according to the invention, which is mostly referred to below as "automotive package" because of the main area of application in the automotive sector, solves the conflict by partitioning into: 3. the said core ("EngineUnit"), • which is a highly integrated standardized component (CPU + Memory), • but can still be used in a wide variety of applications via the "BodyUnit", • which can be transferred to new production facilities and / or technologies without special requirements, • which therefore at least always its predecessor without risk as Second source can replace 4. the said periphery ("BodyUnit"), • which adapts to the respective application, • which can be manufactured in less dense technologies due to the lower required integration density, • therefore not in ever new production facilities or / and technologies must be transferred, • for their use manufacturing site or technology only needs to be organized once and a second source manufacturing site or technology is easier to get because of the low integration density.

Dielectric strength problem when changing technology

Advantages of the automotive package include the use of ever smaller technologies for the logic chip (engine IC). If you retain the functionality during a "shrink" of the engine IC, a new qualification of the externally accessible one becomes Systems avoided because no change in the electrical and functional parameters can be seen from the outside. It is known that the operating voltage of the logic IC also becomes smaller and smaller as the structure sizes become smaller. A similar situation can also be expected with the I / O structures of the logic IC. In order to avoid leakage currents, damage to the engine IC and malfunctions, an adjustment of the signal level is essential. So that no new system qualification is necessary, the body IC should not change at all if possible.

Problem solving via a voltage programmable interface The voltage regulator on the body IC, which supplies the operating voltage for the logic IC (engine IC), is made programmable in its voltage level. This interface can, for example, be designed for a voltage swing of a few 100 mV. The data required for this are stored, for example, in an E ² PROM or are determined using bond options. The voltage range covers all foreseeable supply voltage levels of future logic technologies.

There are two ways to adjust the voltage levels of all interface signals. If the voltage difference and / or the maximum frequency is small enough (for example up to 2.5V / 10MHz), then CMOS level shifters known for Body are used for the signal path engine. From the start, they are dimensioned so that they later function down to a predetermined minimum voltage. They therefore cover a voltage range of 5V to 2.5V without the need for programming. If it is foreseeable that even smaller voltages will be used in the future or if a higher frequency bandwidth for the transmission is required, then analog comparators are used. The switching threshold is in turn programmable, eg via E ^z PROM.

The voltage level of the signals that are transmitted from the body IC to the engine IC is also programmable. This is achieved in that the output drivers of the body IC are operated at a reduced and programmable supply voltage. Problem of space requirements for the bond pads for ICs with a high number of connections - avoiding the pad limit

If you also want to benefit from the use of ever denser logic processes with the same or disproportionately increasing functionality in terms of costs, you must avoid that the chip area is determined by the number of pads.

Troubleshooting

The number of pads on the engine IC must be minimized from the outset. This is achieved by using serial data transmission instead of parallel buses. In addition to address and data lines, interrupts and other control lines can also be routed via one or more serial interfaces.

Programmable interface, the programmability concerns further parameters:

Advantages of the automotive package include the usability of ever smaller technologies for the logic chip (engine IC). If the system function is maintained externally when changing the engine IC, a new qualification of the system is avoided. However, a new qualification of the system threatens if the new engine IC requires a changed bus interface configuration of the peripheral IC (BodyUnit) and the peripheral IC is changed for this purpose. This is because the peripheral IC that appears to the outside is e.g. Changed in the layout, the changed ESD latchup, EMC, etc. behavior can justify. So that no new system qualification is necessary, the peripheral IC should therefore not change at all if possible.

Problem solving via configurable interface on peripheral IC

To avoid a redesign of the peripheral IC (BodyUnit) when changing the bus interface parameters on the core IC (EngineUnit), the logic of the The bus interface on the peripheral IC is configured so that it can be adapted to the interface of the core IC if necessary.

The configuration must take place on the peripheral IC, otherwise no communication can be established via the bus interface when the system is started. The configuration parameters must be inherent in both sub-ICs.

The configuration can also affect the data or signal flow between the periphery and the core. For example, if certain connections have to be switched over in order to be able to easily adapt between the given peripheral IC and different core ICs. This is of interest, for example, when similar core ICs from different manufacturers are used, but which have slight differences with regard to some pins or some inputs. It is conceivable, for example, that not all available locations of a data bus specified by the core IC are required for the intended application. Another difference can relate to special inputs for control and monitoring functions.

The configuration happens e.g. by programming flash, EEPROM, OTP, fusible link elements or by bonding options.

Monitoring control problem in the event of a functional part failure

In safety-related control units, e.g. in automobiles, a monitoring IC that is separate from the actual controller is often used. The functions of this IC, power or clock supervision and / or watchdog, could be integrated on the controller without any problems, but with the background of the possible breakage of a single connection between the core and the periphery or the connection to another circuit ("Die"), for example for a spoke integrated in the housing, would jeopardize the safety function for the overall system.

The usual improvement of this situation with another die in a separate IC has above all cost disadvantages: - Another complete housing is necessary, - To do this, space must be reserved on the circuit board and wiring work must be carried out.

Troubleshooting . , - --.... The AutomotivePackage solves the conflict by partitioning within a package in: 5. A core (EngineUnit), which contains the actual controller, 6. A periphery (BodyUnit), on which all monitoring modules such as power or Clock supervision and / or watchdog are located, which can be monitored separately from the controller.

The eventual break of an individual This is not enough to switch off all safety functions because they are distributed over more than one die. However, only one package is required.

Problem of the bond pad geometry

If the core IC is not available as a geometrically shrinked version of the predecessor ICs when the technology is changed, for example if the IC comes from another manufacturer, the bond pad geometry of the peripheral IC and the core IC may be incompatible, so that crossed bond connections are required or certain bond positions cannot be reached. In order to still ensure wiring using the usual bond connections, a redistribution layer, e.g. one or more additional metallization layers or layers made of polyimide plus a metal layer, applied to the interface IC. The redistribution layer can also be used to compensate for different bond pad geometries of the core IC without changing the circuitry on the peripheral IC. This may be necessary, for example, if integrated JEDEC flash ICs are obtained from different suppliers. This measure also solves the problem of the second supplier for the core IC if the bond connections of the core ICs used are not identical to one another in their position.

A special embodiment is shown in FIG. 1.

1 shows: Integrated circuit with logic IC and matching circuit 1 shows an integrated circuit 1 with a monolithically integrated logic IC 2 and a monolithically integrated matching circuit 3. The matching circuit 3 is connected to the logic IC 2 via a bus connection 4. Furthermore, the adaptation circuit 3 has connections 5 in order to communicate with the periphery. In this respect, the arrangement according to FIG. 1 corresponds to an arrangement as is known from DE 102 43 684 A1 mentioned at the beginning. The adaptation circuit 3 is programmable in its electrical properties. In particular, the bus interface 6 of the adaptation circuit 3 is designed to be programmable, as already described above. Furthermore, the adaptation circuit 3 has monitoring modules 7 for monitoring the logic IC 2. The monitoring modules 7 are therefore arranged separately from the logic IC 2 on the matching circuit 3.

Claims

_Expectations

1. Integrated circuit with a logic IC and a matching circuit which is conductively connected to the logic IC, the integrated circuit being formed from a monolithically integrated logic IC and a monolithically integrated matching circuit, the matching circuit being programmable in its electrical properties the adapter circuit has a lower integration density than the logic IC, and the adapter circuit has monitoring modules for monitoring the logic IC.

2. Integrated circuit according to claim 1, characterized in that the adaptation circuit has a voltage regulator for regulating the operating voltage of the logic IC, which is programmable with respect to its voltage level.

3. Integrated circuit according to claim 1 or 2, characterized in that means for programmably changing the voltage level of the signals which are transmitted between the logic IC and the matching circuit are provided.

4. Integrated circuit according to one of claims 1 to 3, characterized in that the adaptation circuit has a bus interface, the logic of the bus interface being designed to be programmable.

5. Family of integrated circuits, each circuit having a logic IC and a matching circuit that is conductively connected to the logic IC, each integrated circuit being formed from a monolithically integrated logic IC and a monolithically integrated matching circuit, each matching circuit in its electrical properties are programmable, each adaptation circuit has a lower integration density than that

Logic IC, the logic ICs of the family of circuits being different

Have integration density, but all matching circuits in the family of circuits have the same integration density, and each matching circuit monitoring modules for monitoring the

Has logic ICs.

6. Family of integrated circuits according to claim 5, characterized in that each matching circuit has a voltage regulator for regulating the

Has operating voltage of the logic IC, which is programmable with respect to its voltage level. _ _

7. Family of integrated circuits according to claim 5 or 6, characterized in that devices for programmable change in the voltage level of the signals which are transmitted between the logic IC and matching circuit are provided in each circuit.

8. Family of integrated circuits according to one of claims 5 to 7, characterized in that each adaptation circuit has a bus interface, the logic of the bus interface being designed to be programmable.