EP1439522A2 - Frame buffer control circuit - Google Patents

Abstract

An image store (100) holds image data (ID). A control device (110) has a receiver (120) for picking up ID. An interface (130) transfers cycles of ID received to the image store, from where it calls up stored images. An output device (140) sends recalled ID to a display device (190). A monitoring device (150) checks the cyclic transfer of ID between the interface and the image store. An Independent claim is also included for a method for monitoring/checking images on plasma/thin film transistor (TFT) screens.

Description

The present invention relates generally to TFT screens and im Especially on an image memory monitoring system.

Flat screens, such as plasma or TFT screens are becoming increasingly popular used as display systems in industry and business. They are also in increasingly due to their advantageous design in safety-relevant areas used. Examples of this are e.g. Process control monitoring indicators of production facilities or of facilities in rail transport. The problem with such displays using plasma or TFT screens is that the control logic assigned to the screens usually works with an image memory. However, this creates the risk that it cannot be guaranteed whether the displayed Image an image prepared by the control computer or only the repeated playback of an image in the image memory.

The video signal processed by the computer via the video card appears on the screen written to an image memory via an analog-digital converter from the screen controller. According to the required signals of the display used then the image information is read from the image memory by the screen controller, processed and forwarded to the display. Will not be via the analog-to-digital converter If new information is made available, the display controller only reads the information from the image memory.

In order to recognize this misconduct, it is usually a constantly changing one Image created by the computing unit and displayed on the screen. Are in the field If no changes are detected, the control personnel can malfunction recognize the video card.

This type of video card monitoring is for security-related applications however not sufficient. The best way would be in the event of security related Applications with the control card (or TFT controller) entirely on an image memory to renounce. However, this is not possible because the existing computer systems cannot produce the resolution required by the displays.

It is therefore the object of the present invention to provide a screen monitoring system to specify as well as procedures, on the one hand of commercially available computer systems is supported and on the other hand a malfunction of the control card or TFT controller indicates as soon as it occurs.

This object is achieved according to the invention by the subject matter of the claims 1, 8 and 9 solved. Advantageous embodiments of the inventions are the subject of Dependent claims. The present invention is based on the knowledge that an automatic Monitoring of the cyclical data transfer from the graphics controller to the Image storage allows this monitoring in a simple and reliable manner perform.

According to a preferred embodiment, the image memory monitoring system includes at least one image memory for storing image data. Furthermore this system includes a control device with a receiving device for Receiving image data, an interface for the cyclical transmission of the received Image data to the image memory and for cyclical retrieval of the saved Image data from the image memory and an output device for outputting the image data retrieved from the image memory to a display device. Also includes the image memory monitoring system has at least one monitoring device for monitoring the cyclical image data transmission between the interface and the image memory, the monitoring device via a detection device has to measure a time interval between successive image data transfers the interface to the image memory, the monitoring device being a Warning signal generated in the event that the measured by the detection device Time interval exceeds a specified value.

According to a further preferred embodiment, the screen monitoring system includes at least one image memory for storing image data. Of The image memory monitoring system further includes at least one control device with a receiving device for receiving image data, an interface for cyclical transmission of the received image data to the image memory and for the cyclical retrieval of the stored image data from the image memory and one Output device for outputting the image data retrieved from the image memory a display device. In addition, the image memory monitoring system has a monitoring device for monitoring the cyclical image data transmission between the interface and the image memory, the monitoring device feeds a bit pattern to the receiving device by means of a first data line, which overlays the received image data, and by means of a second data line which monitors the image data output at the output device, the monitoring device generates a doublet signal in the event that at the output device output image data have a different bit pattern than that on the Bit pattern fed into the receiving device.

According to a further embodiment of the present invention, a method specified for image memory monitoring, which means the reception of image data a receiving device, cyclical transmission of the received image data an image memory and storing the received image data in the image memory, cyclical retrieval of the stored image data from the image memory and the output the image data retrieved from the image memory to a display device an output device includes. The process also includes monitoring the cyclical image data transfer to the image memory, the monitoring the cyclical image data transmission the measurement of a time interval between successive image data transfers to the image memory, wherein a A warning signal is generated in the event that the measured time interval is an intended one Value exceeds.

Fig. 1

eine schematische Darstellung eines Bildspeicherüberwachungssystems gemäß der vorliegenden Erfindung.

The invention is explained in more detail below on the basis of the preferred embodiments shown in the accompanying drawing. It shows:

Fig. 1

is a schematic representation of an image memory monitoring system according to the present invention.

1 shows a preferred embodiment on the basis of a schematic illustration of the present invention. The image memory monitoring system essentially exists from a control device 110, an image memory 100 and a monitoring device 150 and a microcontroller 180.

The control device 110 includes a receiving device 120 for receiving of image data, an interface 130 for the cyclical transmission of the received Image data to the image memory and for cyclical retrieval of the saved image data from the image memory and an output device 140 for outputting the data from the Image memory retrieved image data to a display device.

The control device 110 is also used to transfer the image data to the image memory connected to the image memory 100 by means of data and control lines. The image data are transmitted bidirectionally. Accordingly, the control lines are preferred designed bidirectionally. Alternatively, the image data are control data via separate unidirectional lines from the control device to the image memory and transferred from the image memory to the control device.

The receiving device 120 is preferably the interface to an analog-digital converter, which convert the analog image signals into digital image data for the control device 110 converts.

The control device 110 is preferably a commercially available one Graphics controller for TFT (thin film transistor) or plasma screens. The graphics controller is preferably for both digital and analog screens fitted.

Commercial video memory modules are preferably used as screen memory or synchronous DRAM components (Dynamic Random Access Memory).

The monitoring device 150 is preferably a so-called Complex Programmable Logic Device (CPLD).

In the preferred embodiment of the present invention, the monitoring device is 150 for monitoring the cyclical image data transmission between the Interface and the image memory with the control lines between the control device 110 or the interface 130 and the image memory 100 connected. preferably, the control device 110 has a memory row address strobe (RAS), Memory Column Address Strobe (CAS) Memory Write Enable (WE) and Memory Clock (MCLK) signal outputs and the image memory 100 via corresponding signal inputs.

The monitoring device 150 is preferably connected to the control lines for the memory row address strobe (RAS) signal, memory. Column address strobe (CAS) signal, memory write enable (WE) and or memory clock (MCLK) signal connected.

Alternatively, further control lines of the control unit 110 are available for controlling the image memory 100 available by the monitoring device 150 for monitoring of the write cycles are used.

In another alternative of the preferred embodiment of the present invention is the monitoring device 150 via data lines with a microcontroller 180 connected.

In the preferred embodiment of the present invention, the frame buffer 100 then monitors that new image data is written to the image memory 100 become. The image memory is used to temporarily store digital image data. The monitoring circuit determines whether the image data is actually be written into the image memory.

By monitoring the signals RAS, CAS and WE by means of the monitoring device 150 detects whether a new write cycle is initializing to the frame buffer becomes. For this, as already mentioned above, the monitoring device with the respective Control lines connected. These control lines between image memory and graphics controller are preferably in the following manner by the monitoring device 150 evaluated.

The linked signals RAS, CAS and WE are preferably individually or together on an asynchronous reset input of a counter level of the monitoring device given. The counter level is preferably also in the Monitoring device integrated and is by means of another control signal Control device counted up. Here, the panel horizontal synchronization signal (PHS) and alternatively the panel vertical synchronization signal (PVS) of the control device used. The PHS signal is the horizontal synchronization signal for the screen. For this, the monitoring device is via a appropriate data line connected to the output for the PHS signal.

With each output cycle of the image data retrieved from the image memory to the display device the counter is increased by the PHS signal. Success in parallel also write cycles in the image memory, the counter stage is triggered by one of the signals RAS, CAS and WE or reset by everyone. So long as new If there are write cycles from the graphics controller to the image memory, the counter chain is reset. If there are no write cycles, there is a counter overflow.

The counter overflow is reported to the microcontroller 180 via the data line between the monitoring device and communicated to the microcontroller. The microcontroller is preferably programmable and has a memory unit in which a corresponding Program is stored, which is transmitted by the monitoring device Evaluates doublet signals and error messages.

Alternatively, an external signal generator is used to ensure that a signal for counting up the counter stage is forwarded to the counter stage, even if the Control device has failed.

In an alternative to the preferred embodiment of the present invention, the Control device 110 instead of with the control lines between the control device and the image memory is connected to the receiving device 120 via the data line 160. In addition, the monitoring device 150 is via a second data line 170 connected to the output device 140 of the control device.

This monitoring circuit is used to define a defined one in the receiving device Test patterns are preferably imported onto the smallest bit value (LSB) of the image data. This bit pattern is read into the graphics controller 110 and into the image memory 100 written (test LSB IN). The image data are again from the graphics controller 110 read out and sent to the screen 190. At the output device of the control device 110 becomes the test pattern (test LSB OUT) by means of the data line 170 led back to the monitoring device 150. In the monitoring facility the bit patterns (Test LSB IN and Test LSB OUT) are compared. If the bit patterns do not match, this error becomes via the data line Microcontroller communicated to microcontroller 180.

The microcontroller can then react to the error via its software, either by having certain alarm messages corresponding to a stored one Share key to one or more addresses over a computer network sends to which the image memory monitoring system is preferably connected or corresponding further actions such as the shutdown initiated by certain systems.

The bit pattern is preferably a constantly the same pattern. With an alternative Version uses a continuously changing pattern. This pattern will either superimposed on the image data in the receiving device 120 or the Image data overwritten with this pattern. This overlay or is alternative Overwrite process in a coding device upstream of the receiving device 120 carried out.

In the event that the image data - and here preferably the smallest bit value (LSB) - overwritten with the bit pattern, it suffices that over the data line 170 read out the values (test LSB OUT) and with the fed-in bit pattern (test LSB IN) can be compared.

In the event that the image data is overlaid with the bit pattern, the bit pattern must be in the output device or in a decoding device connected downstream of it separated from the image data again and by means of the data line 170 to the monitoring device 150 forwarded. Alternatively, over the data line 160 the image data overlaid with the bit pattern to the monitoring device 150 returned and for comparison with the image data from the output device in a memory - preferably a shift register - buffered.

As mentioned above, the preferred embodiment of the present Invention control signals of the image memory evaluated. This is advantageous checks the ratio of read and write access to the image memory stand, and derived the perfect function of the graphics controller. at In the event of a possible malfunction of the graphics controller, write access occurs in relation read accesses much less. This is evaluated via an additional circuit, so that a corresponding error message can then be generated. A Malfunctions are therefore detected reliably and within a very short time. Warning signals or Error messages can be sent to appropriate control points via a network connection or directly to the control staff. This can ensure that failures in display systems for safety-relevant systems can be detected within a very short time. Manual or optical monitoring of the display system or the graphics controller is no longer necessary.

In another alternative of the preferred embodiment of the present invention is the monitoring device 150 with the control lines WE, RAS, CAS or Memory Clock Output (MCLK) connected as well as via the first data line 160 with the receiving device and the second data line 170 with the output device 140. This combination of monitoring read and write access on the screen memory with the feed of the test bit pattern to the image data there is a monitoring chain that has both write access and monitors the read access of the graphics controller on the screen memory. Through it can also monitor how long it takes for image data to be sent to the Screen. This is also through the monitoring facility 150 can be checked and combined with corresponding alarm messages.

Claims (12)

Image memory monitoring system, with
at least one image memory (100) for storing image data;
containing at least one control device (110)
a receiving device (120) for receiving image data,
an interface (130) for the cyclical transmission of the received image data to the image memory and for the cyclical retrieval of the stored image data from the image memory, and
an output device (140) for outputting the image data retrieved from the image memory to a display device (190);
at least one monitoring device (150) for monitoring the cyclical image data transmission between the interface and the image memory;
characterized in that the monitoring device has a detection device for measuring a time interval between successive image data transmissions of the interface to the image memory as a function of the image data output by the output device to the display device, the monitoring device generating a warning signal in the event that that measured by the detection device Time interval exceeds a specified value. Image memory monitoring system according to claim 1, characterized in that the detection device is set up to measure the time interval between successive image data transfers of the interface to the image memory as a function of the image data output by the output device to the display device. Image memory monitoring system according to claim 1 or 2, characterized in that the monitoring device feeds a bit pattern at the receiving device by means of a first data line (160), which overlays the received image data, and monitors the image data output at the output device by means of a second data line (170), wherein the monitoring device generates a warning signal in the event that the image data output at the output device have a different bit pattern than the bit pattern fed in at the receiving device. Image memory monitoring system according to claim 1 or 2, characterized in that the monitoring device feeds a bit pattern at the receiving device by means of a first data line (160), which overlays the received image data, and monitors the image data output at the output device by means of a second data line (170), wherein the monitoring device generates a doublet signal in the event that both the image data output at the output device have a different bit pattern than the bit pattern fed in at the receiving device and the time interval measured by the detection device exceeds a specified value. Image memory monitoring system according to one of claims 1 to 4, additionally with a microcontroller (180), the monitoring device displaying the error message forwarded to a microcontroller. Image memory monitoring system according to one of claims 1 to 5, characterized in that the control device is a TFT controller. Image memory monitoring system according to one of claims 1 to 6, characterized in that the monitoring device is a PLD (Programmable Logic Device) with a resettable counter level, the monitoring device resetting the counter level as soon as image data transfers from the interface to the image memory take place. Image memory monitoring system according to one of claims 1 to 6, characterized in that it is integrated in a plasma or TFT screen. Image memory monitoring system according to one of claims 1 to 8, characterized in that the monitoring device additionally with at least one of the control lines for a memory row address strobe (RAS) signal, a memory column address strobe (CAS) signal, a memory write enable (WE) or a Memory clock (MCLK) signal of the interface and at least one panal-horizontal synchronization signal (PHS) or a panel-vertical synchronization signal (PVS) of the control device and the counter stage by means of the panel-horizontal synchronization signal and / or panel-vertical Synchronization signal is counted up and the counter level is reset using the Memory Row Address Strobe (RAS) Singal, Momory Column Address Strobe (CAS) signal, Momory Write Enable (WE) or Memory Clock (MCLK signal). Image memory monitoring system with
at least one image memory (100) for storing image data;
containing at least one control device (110) a receiving device (120) for receiving image data, an interface (130) for the cyclical transmission of the received image data to the image memory and for the cyclical retrieval of the stored image data from the image memory, and an output device (140) for outputting the image data retrieved from the image memory to a display device (190); at least one monitoring device (150) for monitoring the cyclical image data transmission between the interface and the image memory;
characterized in that the monitoring device uses a first data line to feed a bit pattern to the receiving device which overlays the received image data, and monitors the image data output at the output device by means of a second data line, the monitoring device generating a doublet signal in the event that the Image data output to the output device have a different bit pattern than the bit pattern fed in at the receiving device. Procedure for image memory monitoring with the following steps: Receiving image data by means of a receiving device; cyclically transferring the received image data to an image memory and storing the received image data in the image memory; cyclical retrieval of the stored image data from the image memory, Outputting the image data retrieved from the image memory to a display device by means of an output device; Monitoring the cyclical image data transfer to the image memory; characterized in that the monitoring of the cyclical image data transfer includes measuring a time interval between successive image data transfers to the image memory, a warning signal being generated in the event that the measured time interval exceeds a predetermined value. A method according to claim 11, characterized in that the monitoring additionally includes: Feeding a bit pattern at the receiving device which overlays the received image data; Analysis of the image data output at the output device; and Generating a doublet signal, in the event that the image data output at the output device have a different bit pattern than the bit pattern fed in at the receiving device.

Images