EP1197874A4 - Signal processor and product-sum operating device for use therein with rounding function - Google Patents
Signal processor and product-sum operating device for use therein with rounding functionInfo
- Publication number
- EP1197874A4 EP1197874A4 EP00902067A EP00902067A EP1197874A4 EP 1197874 A4 EP1197874 A4 EP 1197874A4 EP 00902067 A EP00902067 A EP 00902067A EP 00902067 A EP00902067 A EP 00902067A EP 1197874 A4 EP1197874 A4 EP 1197874A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- product
- signal processor
- operating device
- rounding function
- sum operating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Data Mining & Analysis (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Databases & Information Systems (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Algebra (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP02567499A JP3336986B2 (en) | 1999-02-03 | 1999-02-03 | Signal processor and multiply-accumulate unit with rounding function used therefor |
JP2567499 | 1999-02-03 | ||
PCT/JP2000/000584 WO2000046692A1 (en) | 1999-02-03 | 2000-02-03 | Signal processor and product-sum operating device for use therein with rounding function |
Publications (3)
Publication Number | Publication Date |
---|---|
EP1197874A1 EP1197874A1 (en) | 2002-04-17 |
EP1197874A4 true EP1197874A4 (en) | 2005-02-09 |
EP1197874B1 EP1197874B1 (en) | 2007-08-15 |
Family
ID=12172340
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP00902067A Expired - Lifetime EP1197874B1 (en) | 1999-02-03 | 2000-02-03 | Signal processor and product-sum operating device for use therein with rounding function |
Country Status (6)
Country | Link |
---|---|
US (1) | US6792442B1 (en) |
EP (1) | EP1197874B1 (en) |
JP (1) | JP3336986B2 (en) |
CA (1) | CA2361451A1 (en) |
DE (1) | DE60035999T2 (en) |
WO (1) | WO2000046692A1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3984790B2 (en) * | 2001-01-15 | 2007-10-03 | 日本電気株式会社 | Viterbi decoding processor |
JP2006215611A (en) * | 2005-02-01 | 2006-08-17 | Sony Corp | Arithmetic unit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997008608A1 (en) * | 1995-08-31 | 1997-03-06 | Intel Corporation | A set of instructions for operating on packed data |
WO1998012624A1 (en) * | 1996-09-23 | 1998-03-26 | Arm Limited | Data processing apparatus registers |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59197936A (en) * | 1983-04-25 | 1984-11-09 | Fujitsu Ltd | Digital signal processing system |
US4876660A (en) * | 1987-03-20 | 1989-10-24 | Bipolar Integrated Technology, Inc. | Fixed-point multiplier-accumulator architecture |
US5363322A (en) * | 1991-04-02 | 1994-11-08 | Motorola, Inc. | Data processor with an integer multiplication function on a fractional multiplier |
JP3166781B2 (en) * | 1991-07-12 | 2001-05-14 | 新日本製鐵株式会社 | Adder circuit |
FR2693287B1 (en) | 1992-07-03 | 1994-09-09 | Sgs Thomson Microelectronics Sa | Method for carrying out numerical calculations, and arithmetic unit for implementing this method. |
JPH08137669A (en) | 1994-11-04 | 1996-05-31 | Fujitsu Ltd | Arithmetic circuit |
US5862067A (en) * | 1995-12-29 | 1999-01-19 | Intel Corporation | Method and apparatus for providing high numerical accuracy with packed multiply-add or multiply-subtract operations |
JPH09274612A (en) * | 1996-04-05 | 1997-10-21 | Hitachi Ltd | Vector processing equipment |
JP3767085B2 (en) | 1996-09-04 | 2006-04-19 | セイコーエプソン株式会社 | Information processing circuit and microcomputer |
-
1999
- 1999-02-03 JP JP02567499A patent/JP3336986B2/en not_active Expired - Fee Related
-
2000
- 2000-02-03 EP EP00902067A patent/EP1197874B1/en not_active Expired - Lifetime
- 2000-02-03 US US09/890,749 patent/US6792442B1/en not_active Expired - Fee Related
- 2000-02-03 CA CA002361451A patent/CA2361451A1/en not_active Abandoned
- 2000-02-03 WO PCT/JP2000/000584 patent/WO2000046692A1/en active IP Right Grant
- 2000-02-03 DE DE60035999T patent/DE60035999T2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997008608A1 (en) * | 1995-08-31 | 1997-03-06 | Intel Corporation | A set of instructions for operating on packed data |
WO1998012624A1 (en) * | 1996-09-23 | 1998-03-26 | Arm Limited | Data processing apparatus registers |
Non-Patent Citations (1)
Title |
---|
See also references of WO0046692A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2000046692A1 (en) | 2000-08-10 |
JP3336986B2 (en) | 2002-10-21 |
EP1197874A1 (en) | 2002-04-17 |
JP2000222174A (en) | 2000-08-11 |
US6792442B1 (en) | 2004-09-14 |
DE60035999T2 (en) | 2007-12-20 |
EP1197874B1 (en) | 2007-08-15 |
DE60035999D1 (en) | 2007-09-27 |
CA2361451A1 (en) | 2000-08-10 |
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