EP0981203A1 - Fast switching, controlled current source - Google Patents
Fast switching, controlled current source Download PDFInfo
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- EP0981203A1 EP0981203A1 EP99202607A EP99202607A EP0981203A1 EP 0981203 A1 EP0981203 A1 EP 0981203A1 EP 99202607 A EP99202607 A EP 99202607A EP 99202607 A EP99202607 A EP 99202607A EP 0981203 A1 EP0981203 A1 EP 0981203A1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/22—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
Definitions
- Such sources of current are frequently used to construct charge pumps for supplying current pulses to control a charge or a discharge of capacitive elements in phase locked loops operating a frequency control of a signal delivered by a voltage controlled oscillator.
- Such a loop with phase locking is described in particular in European patent application No. 0 670 629 A1.
- the charge pump included in this loop implements current sources of the type described in the introductory paragraph, in which the transistors of power are PNP type, their bases, transmitters and collectors respectively constituting polarization, reference, and transfer terminals. These power transistors are polarized by means of an emitter current permanently delivered by a positive terminal power supply, their conduction being operated by the control module by means of a adequate base voltage when the control signal instructs the module to control. The power transistors then conduct the bias current from their transmitters to their collectors, and to the output of the controlled current source.
- the power transistors must be turned on very quickly, especially when the frequency of the oscillator output signal is high, for example of the order of GigaHertz, the so-called switching frequency with which the power transistors pass from a blocked state to a saturated state, being able then are of the order of the MegaHertz.
- the value of the current delivered by the controlled current source when it is in conduction called nominal value, is often important. This leads to using, for realize each controlled current source, several transistors whose dimensions are large in front of those of the other transistors included in the phase-locked loop.
- One of the aims of the invention is to remedy to a large extent these disadvantages, by proposing a controlled current source within which the influence of parasitic capacitances of the power transistors is considerably minimized.
- a controlled current source conforming to the introductory paragraph is characterized according to the invention in that the reference terminals of the power transistors are connected together to the output of the control module intended to deliver a current whose value depends on the value of the control signal, the bias terminals of the transistors of power being subjected permanently, when the current source is in operation, at a voltage of predetermined value making it possible to render said transistors potentially conductive power.
- the bias voltage applied at the bias terminals of the power transistors somehow performs preloading parasitic capacitances of said transistors and makes these transistors potentially conductors. It will then suffice to present a current at their reference terminals so that they become effectively conductive, almost instantly.
- parasitic capacities being preloaded they are not subject to discontinuities of voltage, unlike what occurs in the known controlled current source. The changes in the shape of the output current of the controlled current source due to switching of the power transistors are therefore considerably attenuated in the controlled current source according to the invention.
- a controlled current source such as described above is characterized in that the control module comprises a first and a second transistor forming a first differential pair, and intended to receive on their polarization terminals the control signal, and a third transistor whose path main current is arranged, in series with a first resistance, between a positive terminal supply and output of the control module, the transfer terminal of the first transistor being connected to the positive supply terminal, the transfer terminal of the second transistor being connected to the positive supply terminal via a second resistor, on the one hand, and to the bias terminal of the third transistor, on the other hand.
- This embodiment is advantageous by its simplicity, using a number limited components. Furthermore, it will be demonstrated in the following presentation that the value nominal output current of such a controlled current source directly depends on the value of the first resistance, which allows easy calibration of said output current of source.
- control module further includes a fourth and a fifth transistor, forming a second pair differential, and intended to receive on their polarization terminals a so-called selection signal, the transfer terminal of the fourth transistor being connected to the positive supply terminal, the transfer terminal of the fifth transistor being connected to the positive supply terminal via a voltage regulating element, on the one hand, and to the bias terminal of the third transistor via a third resistor, on the other hand.
- the element voltage regulator consists of a diode.
- the invention therefore also relates to a charge pump, provided with two control inputs intended to receive control signals, and an output intended to deliver a current output whose direction and value depend on the values of the control signals, characterized in that it comprises a first and a second controlled current source as described above, whose command inputs constitute the inputs of charge pump control, the outputs of the first and second current sources being connected to the first and second branches of a current mirror, the output of one of the current sources being further connected to the output of the charge pump.
- such a charge pump comprises in in addition to a so-called drainage current source, intended to flow continuously, when the charge pump is operating, a current whose nominal value is negligible before the maximum value of the charge pump output current, the current source of drainage being arranged between that of the outputs of the first and second current sources which is not connected to the output of the charge pump, and a negative supply terminal.
- Drainage current source allows evacuation of electrical charges stored in transistors constituting the current mirror, which prevents a current of parasitic leak does not appear in one of the branches of said current mirror to evacuate these charges to the negative supply terminal, after the conduction of the first source of current will have been interrupted. Such a leakage current would cause the persistence of a current negative at the outlet of the charge pump, a phenomenon which is all the more unacceptable as the charge pump switching frequency is high.
- Such a charge pump can advantageously be implemented in a phase locked loop.
- Such loops are commonly used to operate frequency conversions in receivers of radio signals, such as, for example, televisions or radiotelephones.
- the invention therefore also relates to a device for receiving radio signals, comprising an antenna and filtering system allowing the reception of a signal whose frequency is selected within a given frequency range, and its transformation into a signal.
- apparatus in which a frequency conversion, from the selected frequency to a predetermined intermediate frequency, is carried out by means of a mixer intended to receive the radio signal, on the one hand, and an output signal of a local oscillator whose frequency is determined by the value of an adjustment voltage, on the other hand, apparatus further comprising a phase / frequency detector intended to compare the frequency of the output signal of the oscillator with that of a reference signal and to deliver control signals to a charge pump, the values of which depend on the result of said comparison, the s nettle of the charge pump being connected to a capacity intended to generate at its terminals the adjustment voltage, device characterized in that the charge pump is as described above.
- the power transistors are bipolar PNP type transistors. Their reference terminals, transfer terminals and polarization terminals are respectively constituted by their transmitters, collectors and bases.
- the emitters of the power transistors are connected together to the output of the control module CNTi, their bases being permanently subjected, when the current source CSi is in operation, to a predetermined voltage VCC-3.Vd.
- This voltage is generated by means of the assembly of three diodes D1i, D2i and D3i, arranged in series with a resistor Rdi, between a positive supply terminal VCC and a negative supply terminal GND, which may be materialized by the circuit mass.
- the voltage generated by the three diodes D1i, D2i and D3i is equal to 3.Vd, where Vd is the threshold voltage of a diode.
- the emitter-base voltage of the power transistors is equal to 3Vd-Vcnti, where Vcnti represents a voltage drop generated by the control module CNTi.
- the components constituting the controlled current source CSi can easily be dimensioned so that 3Vd-Vcnti> Veb th, where Veb th represents the minimum value which the emitter-base voltage of the transistors must take power so that they can drive.
- the bias voltage VCC-3.Vd applied to the bases of the power transistors then in a way pre-charges the stray capacitances of said transistors and makes these transistors potentially conductive. It will therefore suffice, in this configuration, to present a current I1 to their transmitters so that they become effectively conductive, and this in an almost instantaneous manner.
- FIG. 2 is a block diagram showing a CP charge pump incorporating two current sources of the type described above.
- This CP charge pump is provided with two control inputs intended to receive control signals V1 and V2, and an OUT output intended to deliver an output current whose direction and value depend of the values of the control signals V1 and V2.
- the CP charge pump has a first and second controlled current source CS1 and CS2 of the aforementioned type, the control inputs constitute the control inputs of the charge pump CP, the outputs OUT1 and OUT2 of the first and second current sources being connected to the first and second branches of a current mirror (M1, M2), the output of the second source of current CS2 being further connected to the output OUT of the charge pump CP.
- M1, M2 current mirror
- the mirror of current (M1, M2) consists of two transistors, M1 and M2, whose collectors form respectively the first and second branches of the current mirror, the bases of which are connected together to the collector of the first transistor M1, and whose emitters are connected to a GND negative supply terminal.
- the control signal V1 of the first controlled current source CS1 orders the conduction of said source CS1, it delivers a current IO1 on the first branch of the current mirror (M1, M2), which current mirror then reproduces said current IO1 on its second branch.
- the second CS2 current source not conducting, the current flowing in the second branch of the current mirror (M1, M2), which is the image of the current IO1, is taken from the output OUT of the charge pump CP, which therefore delivers a negative current.
- the charge pump CP also includes a current source, known as drainage, disposed between the output of the first current source CS1 and the negative terminal GND power supply.
- This current source is intended to flow continuously, when the charge pump CP is in operation, a current Id whose nominal value is negligible compared to the maximum value of the output current IO1 or IO2 of the charge pump CP.
- the drain current source allows the evacuation of electrical charges stored in parasitic capacitances that comprise the transistors M1 and M2 constituting the current mirror (M1, M2), which prevents a parasitic leakage current from appearing in one of the branches of said current mirror to evacuate these charges towards the negative supply terminal GND, after the conduction of the first current source CS1 has been interrupted. Such leakage current would cause a negative current to persist at the OUT output of the CP load, a phenomenon which is all the more unacceptable as the switching frequency of the CP charge pump is high.
- FIG. 3 schematically represents a controlled current source CS1 according to a preferred embodiment of the invention.
- the module CNT1 control includes first and second transistors T1 and T2 forming a first differential pair, and intended to receive on their bases the control voltage V1, and a third transistor T3 including the main current path, that is to say the collector-emitter path, is arranged in series with a first resistor R11, between a positive terminal power supply VCC and the output of the control module CNT1, the emitter of the first transistor T1 being connected to the positive supply terminal VCC, the collector of the second transistor T2 being connected to the positive supply terminal VCC via a second resistor R21, on the one hand, and to the base of the third transistor T3, on the other hand.
- the CNT1 control module also includes a fourth and a fifth transistor T4 and T5, forming a second differential pair, and intended to receive on their bases a so-called selection signal Vx1, constituted here by a voltage, the collector of the fourth transistor T4 being connected to the positive supply terminal VCC, the collector of the fifth transistor T5 being connected to the positive supply terminal VCC via a transistor Q5 diode mounted, on the one hand, and at the base of the third transistor T3 via a third resistance R31, on the other hand.
- the diodes D1i, D2i and D3i are here constituted by transistors Q1, Q2 and Q3, polarized by means of a transistor Q4 arranged in series with the aforementioned transistors, according to a technique well known to the specialist.
- the transistors used are bipolar transistors, it is obvious that MOS type transistors, whose grids, drains and sources would respectively constitute the terminals of polarization, of transfer and of reference, can be substituted for them.
- the current source CS1 operates as follows: When the control voltage V1 is negative, the second transistor T2 is conductive while the first transistor T1 is blocked.
- the third transistor T3 operates as a voltage follower and copies the potential of the base of said third transistor T3 on its emitter with an offset equal to a base-emitter voltage.
- the second resistor R21 is traversed by a significant current and generates at its terminals a sufficiently large voltage drop so that the value of the difference between the potential of the emitter of the third transistor T3 and that of the bases of the power transistors is less than a minimum value authorizing the conduction of said power transistors.
- the voltage drop across the second resistor R21 thus ensures that the power transistors remain blocked.
- the current I1 delivered by the control module CNT1 is therefore zero and the power module PA1 is inactive.
- the second transistor T2 When the value of the control voltage V1 becomes positive, the second transistor T2 is blocked while the first transistor T1 becomes conductive.
- the potential of the base of the third transistor T3 therefore becomes close to that of the positive supply terminal VCC, the potential of the emitter of said third transistor T3 becoming sufficiently high to make the transistors potentially conductive.
- the third transistor T3 then delivers, via the first resistor R11, a non-zero current I1 to the output of the control module CNT1.
- This current I1 makes the power transistors conductive as soon as it reaches their emitters, and the controlled current source CS1 delivers a non-zero output current IO1.
- Vbe (T3) + V11 + Veb Vbe (Q1) + Vbe (Q2) + Vbe (Q3) , where Vbe (Ti) and Vbe (Qi) are the base-emitter voltages of the NPN, Ti and Qi transistors respectively, Veb the emitter-base voltage of the power transistors PNP and V11 the voltage across the first resistor R11.
- the base-emitter and emitter-base voltages of the various transistors are, by construction, substantially equal to a value Vbe, which is of the order of 0.6 volts.
- the output current IO1 of the charge pump CS1 therefore has the nominal value Vbe / R11.
- the choice of the value of the first resistor R11 thus makes it possible to easily calibrate the output current IO1.
- FIG. 4 partially shows a signal receiving apparatus which incorporates a CP charge pump built on the basis of two sources of controlled current CS1 and CS2 of the type described above.
- This device has a system antenna and AF filtering allowing the reception of a signal whose frequency is selected within a given frequency range, and its transformation into a signal electronic Vfr, called radio signal, having an FR frequency called radio frequency.
- a frequency conversion, from the selected FR radio frequency to a frequency intermediate predetermined FI, is carried out in this apparatus by means of an MX mixer intended to receive the radio signal Vfr, on the one hand, and an output signal Vco from a local oscillator OSC whose oscillation frequency FLO is determined by the value of an adjustment voltage Vtun, on the other hand.
- This device also includes a PD phase / frequency detector intended to compare the frequency FLO of the output signal Vco of the oscillator OSC with the frequency FREF of a reference signal Vref, and to deliver to the charge pump CP signals of command V1, V2 and selection Vx1, Vx2, whose values depend on the result of said comparison.
- the output of the charge pump CP is connected to a capacitor Cs intended for generate at its terminals the adjustment voltage Vtun.
- the FLO oscillation frequency is controlled by means of a phase locked loop incorporating the charge pump CP.
- This loop operates as follows: when the oscillation frequency FLO is less than the reference frequency FREF, the phase / frequency detector PD delivers a positive control voltage V2 to the charge pump CP which then delivers a current of Ics output positive towards the Cs capacity. The adjustment voltage Vtun present at the terminals of said capacitor Cs then increases, causing the value of the oscillation frequency FLO to increase. This cycle is repeated until the oscillation frequency FLO becomes equal to the reference frequency FREF, the loop then reaching its locking state.
- phase detector / frequency PD delivering a positive control voltage V1 to the charge pump CP which then controls by means a negative output current Ics a decrease in the value of the adjustment voltage Vtun, and therefore in the oscillation frequency FLO.
- said phase detector / PD frequency can advantageously deliver to the charge pump CP a negative control voltage Vx2, in addition to the positive control voltage V2.
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Abstract
Description
La présente invention concerne une source de courant contrôlée, munie d'une entrée de commande destinée à recevoir un signal de commande, et d'une sortie destinée à délivrer un courant dont la valeur dépend de la valeur du signal de commande, comprenant :
- une pluralité de transistors, dits de puissance, disposés en parallèle, chaque transistor étant muni d'une borne de référence, d'une borne de transfert et d'une borne de polarisation, les bornes de transfert des transistors de puissance étant reliées ensemble à la sortie de la source de courant, et
- un module de contrôle, muni d'une entrée destinée à recevoir le signal de commande, et d'une sortie destinée à délivrer un signal permettant la mise en conduction des transistors de puissance.
- a plurality of so-called power transistors arranged in parallel, each transistor being provided with a reference terminal, a transfer terminal and a bias terminal, the transfer terminals of the power transistors being connected together to the output of the current source, and
- a control module, provided with an input intended to receive the command signal, and of an output intended to deliver a signal allowing the setting in conduction of the power transistors.
De telles sources de courant sont fréquemment employées pour construire des pompes de charge destinées à délivrer des impulsions de courant pour commander une charge ou une décharge d'éléments capacitifs dans des boucles à verrouillage de phase opérant un contrôle de fréquence d'un signal délivré par un oscillateur contrôlé en tension. Une telle boucle à verrouillage de phase est notamment décrite dans la demande de brevet européen No. 0 670 629 A1. La pompe de charge incluse dans cette boucle met en oeuvre des sources de courant contrôlées du type décrit dans le paragraphe introductif, dans lesquelles les transistors de puissance sont de type PNP, leurs bases, émetteurs et collecteurs constituant respectivement des bornes de polarisation, de référence, et de transfert. Ces transistors de puissance sont polarisés au moyen d'un courant d'émetteur délivré en permanence par une borne positive d'alimentation, leur mise en conduction étant opérée par le module de contrôle au moyen d'une tension de base adéquate lorsque le signal de commande en donne l'ordre au module de contrôle. Les transistors de puissance conduisent alors le courant de polarisation depuis leurs émetteurs vers leurs collecteurs, et vers la sortie de la source de courant contrôlée.Such sources of current are frequently used to construct charge pumps for supplying current pulses to control a charge or a discharge of capacitive elements in phase locked loops operating a frequency control of a signal delivered by a voltage controlled oscillator. Such a loop with phase locking is described in particular in European patent application No. 0 670 629 A1. The charge pump included in this loop implements current sources of the type described in the introductory paragraph, in which the transistors of power are PNP type, their bases, transmitters and collectors respectively constituting polarization, reference, and transfer terminals. These power transistors are polarized by means of an emitter current permanently delivered by a positive terminal power supply, their conduction being operated by the control module by means of a adequate base voltage when the control signal instructs the module to control. The power transistors then conduct the bias current from their transmitters to their collectors, and to the output of the controlled current source.
La mise en conduction des transistors de puissance doit s'effectuer très rapidement, particulièrement lorsque la fréquence du signal de sortie de l'oscillateur est élevée, par exemple de l'ordre du GigaHertz, la fréquence, dite de commutation, avec laquelle les transistors de puissance passent d'un état bloqué à un état saturé, pouvant alors are de l'ordre du MégaHertz. Or, la valeur du courant débité par la source de courant contrôlée lorsqu'elle est en conduction, appelée valeur nominale, est souvent importante. Ceci conduit à utiliser, pour réaliser chaque source de courant contrôlée, plusieurs transistors dont les dimensions sont grandes devant celles des autres transistors inclus dans la boucle à verrouillage de phase. De telles structures présentent des capacités parasites importantes, particulièrement au niveau des jonctions collecteur-base, qui retardent l'entrée en conduction effective des transistors de puissance et provoquent des altérations dans la forme des impulsions de courant délivrées par la source de courant contrôlée, altérations qui consistent essentiellement en des pointes positives et négatives de courant lors des commutations des transistors de puissance. The power transistors must be turned on very quickly, especially when the frequency of the oscillator output signal is high, for example of the order of GigaHertz, the so-called switching frequency with which the power transistors pass from a blocked state to a saturated state, being able then are of the order of the MegaHertz. However, the value of the current delivered by the controlled current source when it is in conduction, called nominal value, is often important. This leads to using, for realize each controlled current source, several transistors whose dimensions are large in front of those of the other transistors included in the phase-locked loop. Of such structures exhibit significant parasitic capacities, particularly at the level of collector-base junctions, which delay the entry into effective conduction of the transistors power and cause alterations in the shape of the current pulses delivered by the controlled current source, alterations which essentially consist of spikes positive and negative current when switching power transistors.
L'un des buts de l'invention est de remédier dans une large mesure à ces inconvénients, en proposant une source de courant contrôlée au sein de laquelle l'influence des capacités parasites des transistors de puissance est considérablement minimisée.One of the aims of the invention is to remedy to a large extent these disadvantages, by proposing a controlled current source within which the influence of parasitic capacitances of the power transistors is considerably minimized.
En effet, une source de courant contrôlée conforme au paragraphe introductif est caractérisée selon l'invention en ce que les bornes de référence des transistors de puissance sont reliées ensemble à la sortie du module de contrôle destinée à délivrer un courant dont la valeur dépend de la valeur du signal de commande, les bornes de polarisation des transistors de puissance étant soumises en permanence, lorsque la source de courant est en fonctionnement, à une tension de valeur prédéterminée permettant de rendre lesdits transistors de puissance potentiellement conducteurs.Indeed, a controlled current source conforming to the introductory paragraph is characterized according to the invention in that the reference terminals of the power transistors are connected together to the output of the control module intended to deliver a current whose value depends on the value of the control signal, the bias terminals of the transistors of power being subjected permanently, when the current source is in operation, at a voltage of predetermined value making it possible to render said transistors potentially conductive power.
Dans une telle source de courant contrôlée, la tension de polarisation appliquée aux bornes de polarisation des transistors de puissance effectue en quelque sorte un préchargement des capacités parasites desdits transistors et rend ces transistors potentiellement conducteurs. Il suffira alors de présenter un courant à leurs bornes de référence pour qu'ils deviennent effectivement conducteurs, et ce de manière quasi instantanée. Par ailleurs, les capacités parasites étant pré-chargées, elles ne sont pas soumises à des discontinuités de tension, contrairement à ce qui se produit dans la source de courant contrôlée connue. Les altérations dans la forme du courant de sortie de la source de courant contrôlée dues aux commutations des transistors de puissance sont donc considérablement atténuées dans la source de courant contrôlée conforme à l'invention.In such a controlled current source, the bias voltage applied at the bias terminals of the power transistors somehow performs preloading parasitic capacitances of said transistors and makes these transistors potentially conductors. It will then suffice to present a current at their reference terminals so that they become effectively conductive, almost instantly. In addition, parasitic capacities being preloaded, they are not subject to discontinuities of voltage, unlike what occurs in the known controlled current source. The changes in the shape of the output current of the controlled current source due to switching of the power transistors are therefore considerably attenuated in the controlled current source according to the invention.
Dans un de ses modes de réalisation, une source de courant contrôlée telle que décrite ci-dessus est caractérisé en ce que le module de contrôle comporte un premier et un deuxième transistor formant une première paire différentielle, et destinés à recevoir sur leurs bornes de polarisation le signal de commande, et un troisième transistor dont le trajet de courant principal est disposé, en série avec une première résistance, entre une borne positive d'alimentation et la sortie du module de contrôle, la borne de transfert du premier transistor étant reliée à la borne positive d'alimentation, la borne de transfert du deuxième transistor étant reliée à la borne positive d'alimentation via une deuxième résistance, d'une part, et à la borne de polarisation du troisième transistor, d'autre part.In one of its embodiments, a controlled current source such as described above is characterized in that the control module comprises a first and a second transistor forming a first differential pair, and intended to receive on their polarization terminals the control signal, and a third transistor whose path main current is arranged, in series with a first resistance, between a positive terminal supply and output of the control module, the transfer terminal of the first transistor being connected to the positive supply terminal, the transfer terminal of the second transistor being connected to the positive supply terminal via a second resistor, on the one hand, and to the bias terminal of the third transistor, on the other hand.
Ce mode de réalisation est avantageux par sa simplicité, faisant appel à un nombre limité de composants. Par ailleurs, il sera démontré dans la suite de l'exposé que la valeur nominale du courant de sortie d'une telle source de courant contrôlée dépend directement de la valeur de la première résistance, ce qui permet une calibration aisée dudit courant de sortie de la source.This embodiment is advantageous by its simplicity, using a number limited components. Furthermore, it will be demonstrated in the following presentation that the value nominal output current of such a controlled current source directly depends on the value of the first resistance, which allows easy calibration of said output current of source.
Dans une variante du mode de réalisation décrit ci-dessus, le module de contrôle comporte en outre un quatrième et un cinquième transistor, formant une deuxième paire différentielle, et destinés à recevoir sur leurs bornes de polarisation un signal dit de sélection, la borne de transfert du quatrième transistor étant reliée à la borne positive d'alimentation, la borne de transfert du cinquième transistor étant reliée à la borne positive d'alimentation via un élément régulateur de tension, d'une part, et à la borne de polarisation du troisième transistor via une troisième résistance, d'autre part.In a variant of the embodiment described above, the control module further includes a fourth and a fifth transistor, forming a second pair differential, and intended to receive on their polarization terminals a so-called selection signal, the transfer terminal of the fourth transistor being connected to the positive supply terminal, the transfer terminal of the fifth transistor being connected to the positive supply terminal via a voltage regulating element, on the one hand, and to the bias terminal of the third transistor via a third resistor, on the other hand.
Il sera démontré dans la suite de l'exposé qu'une telle variante permet de sélectionner une valeur nominale pour le courant de sortie parmi deux valeurs prédéterminées, permettant ainsi à la source de courant contrôlée de provoquer des charges ou décharges d'éléments capacitifs de plus ou moins grande ampleur.It will be demonstrated in the following description that such a variant makes it possible to select a nominal value for the output current from two predetermined values, thus allowing the controlled current source to cause charges or discharges capacitive elements of greater or lesser magnitude.
Dans un mode de réalisation particulier de cette variante de l'invention, l'élément régulateur de tension est constitué par une diode.In a particular embodiment of this variant of the invention, the element voltage regulator consists of a diode.
Ainsi qu'exposé plus haut, deux sources de courant conformes à l'invention peuvent être avantageusement utilisées pour réaliser une pompe de charge. L'invention concerne donc également une pompe de charge, munie de deux entrées de commande destinées à recevoir des signaux de commande, et d'une sortie destinée à délivrer un courant de sortie dont le sens et la valeur dépendent des valeurs des signaux de commande, caractérisée en ce qu'elle comporte une première et une deuxième source de courant contrôlée telles que décrites précédemment, dont les entrées de commande constituent les entrées de commande de la pompe de charge, les sorties des première et deuxième sources de courant étant reliées aux première et deuxième branches d'un miroir de courant, la sortie de l'une des sources de courant étant en outre reliée à la sortie de la pompe de charge.As explained above, two current sources according to the invention can advantageously be used to make a charge pump. The invention therefore also relates to a charge pump, provided with two control inputs intended to receive control signals, and an output intended to deliver a current output whose direction and value depend on the values of the control signals, characterized in that it comprises a first and a second controlled current source as described above, whose command inputs constitute the inputs of charge pump control, the outputs of the first and second current sources being connected to the first and second branches of a current mirror, the output of one of the current sources being further connected to the output of the charge pump.
Selon un mode de réalisation avantageux, une telle pompe de charge comporte en outre une source de courant dite de drainage, destinée à débiter en permanence, lorsque la pompe de charge est en fonctionnement, un courant dont la valeur nominale est négligeable devant la valeur maximale du courant de sortie de la pompe de charge, la source de courant de drainage étant disposée entre celle des sorties des première et deuxième sources de courant qui n'est pas reliée à la sortie de la pompe de charge, et une borne négative d'alimentation.According to an advantageous embodiment, such a charge pump comprises in in addition to a so-called drainage current source, intended to flow continuously, when the charge pump is operating, a current whose nominal value is negligible before the maximum value of the charge pump output current, the current source of drainage being arranged between that of the outputs of the first and second current sources which is not connected to the output of the charge pump, and a negative supply terminal.
La source de courant de drainage permet d'évacuer des charges électriques stockées dans des transistors constituant le miroir de courant, ce qui évite qu'un courant de fuite parasite n'apparaisse dans l'une des branches dudit miroir de courant pour évacuer ces charges vers la borne négative d'alimentation, après que la conduction de la première source de courant aura été interrompue. Un tel courant de fuite provoquerait la persistance d'un courant négatif en sortie de la pompe de charge, phénomène qui est d'autant plus rédhibitoire que la fréquence de commutation de la pompe de charge est élevée.Drainage current source allows evacuation of electrical charges stored in transistors constituting the current mirror, which prevents a current of parasitic leak does not appear in one of the branches of said current mirror to evacuate these charges to the negative supply terminal, after the conduction of the first source of current will have been interrupted. Such a leakage current would cause the persistence of a current negative at the outlet of the charge pump, a phenomenon which is all the more unacceptable as the charge pump switching frequency is high.
Une telle pompe de charge pourra avantageusement être mise en oeuvre dans une
boucle à verrouillage de phase. De telles boucles sont couramment employées pour opérer des
conversions de fréquence dans des récepteurs de signaux radioélectriques, comme par exemple
des téléviseurs ou des radiotéléphones. L'invention concerne donc également un appareil
récepteur de signaux radioélectriques, comportant un système d'antenne et de filtrage
permettant la réception d'un signal dont la fréquence est sélectionnée au sein d'une gamme de
fréquences donnée, et sa transformation en un signal électronique dit signal radio, appareil
dans lequel une conversion de fréquence, à partir de la fréquence sélectionnée vers une
fréquence intermédiaire prédéterminée, est réalisée au moyen d'un mélangeur destiné à
recevoir le signal radio, d'une part, et un signal de sortie d'un oscillateur local dont la fréquence
est déterminée par la valeur d'une tension de réglage, d'autre part, appareil comportant en
outre un détecteur de phase/fréquence destiné à comparer la fréquence du signal de sortie de
l'oscillateur avec celle d'un signal de référence et à délivrer à une pompe de charge des signaux
de commande dont les valeurs dépendent du résultat de ladite comparaison, la sortie de la
pompe de charge étant reliée à une capacité destinée à générer à ses bornes la tension de
réglage,
appareil caractérisé en ce que la pompe de charge est telle que décrite plus haut.Such a charge pump can advantageously be implemented in a phase locked loop. Such loops are commonly used to operate frequency conversions in receivers of radio signals, such as, for example, televisions or radiotelephones. The invention therefore also relates to a device for receiving radio signals, comprising an antenna and filtering system allowing the reception of a signal whose frequency is selected within a given frequency range, and its transformation into a signal. electronic said radio signal, apparatus in which a frequency conversion, from the selected frequency to a predetermined intermediate frequency, is carried out by means of a mixer intended to receive the radio signal, on the one hand, and an output signal of a local oscillator whose frequency is determined by the value of an adjustment voltage, on the other hand, apparatus further comprising a phase / frequency detector intended to compare the frequency of the output signal of the oscillator with that of a reference signal and to deliver control signals to a charge pump, the values of which depend on the result of said comparison, the s nettle of the charge pump being connected to a capacity intended to generate at its terminals the adjustment voltage,
device characterized in that the charge pump is as described above.
L'invention sera mieux comprise à l'aide de la description suivante, faite à titre d'exemple non-limitatif et en regard des dessins annexés, dans lesquels :
- la figure 1 est un schéma électrique décrivant une source de courant contrôlée conforme à l'invention,
- la figure 2 est un schéma fonctionnel décrivant une pompe de charge incorporant de telles sources de courant,
- la figure 3 est un schéma électrique décrivant une source de courant contrôlée conforme à un mode de réalisation préféré de l'invention, et
- la figure 4 est un schéma fonctionnel partiel décrivant un appareil récepteur de signaux radioélectriques incorporant l'invention.
- FIG. 1 is an electrical diagram describing a controlled current source according to the invention,
- FIG. 2 is a functional diagram describing a charge pump incorporating such current sources,
- FIG. 3 is an electrical diagram describing a controlled current source in accordance with a preferred embodiment of the invention, and
- FIG. 4 is a partial functional diagram describing an apparatus for receiving radio signals incorporating the invention.
La figure 1 représente schématiquement une source de courant contrôlée CSi, munie d'une entrée de commande destinée à recevoir un signal de commande Vi, et d'une sortie OUTi destinée à délivrer un courant IOi dont la valeur dépend de la valeur du signal de commande Vi. La valeur de ce courant IOi pourra, par exemple, être nulle tant que la valeur du signal de commande Vi sera négative ou nulle, et être égale à une valeur nominale prédéterminée non-nulle lorsque la valeur du signal de commande sera positive. Dans l'exemple décrit ici, le signal de commande Vi est constitué par une tension. La source de courant contrôlée CSi comprend :
- un module de puissance PAi comportant une pluralité de transistors, dits de puissance, disposés en parallèle, chaque transistor étant muni d'une borne de référence, d'une borne de transfert et d'une borne de polarisation, les bornes de transfert des transistors de puissance étant reliées ensemble à la sortie de la source de courant, et
- un module de contrôle CNTi, muni d'une entrée destinée à recevoir le signal de commande Vi, et d'une sortie destinée à délivrer un signal permettant la mise en conduction des transistors de puissance.
- a power module PAi comprising a plurality of so-called power transistors arranged in parallel, each transistor being provided with a reference terminal, a transfer terminal and a bias terminal, the transfer terminals of the transistors of power being connected together at the output of the current source, and
- a CNTi control module, provided with an input intended to receive the control signal Vi, and with an output intended to deliver a signal allowing the power transistors to be turned on.
Dans l'exemple décrit sur cette figure, les transistors de puissance sont des transistors bipolaires de type PNP. Leurs bornes de référence, bornes de transfert et bornes de polarisation sont respectivement constituées par leurs émetteurs, collecteurs et bases. Les émetteurs des transistors de puissance sont reliés ensemble à la sortie du module de contrôle CNTi, leurs bases étant soumises en permanence, lorsque la source de courant CSi est en fonctionnement, à une tension prédéterminée VCC-3.Vd. Cette tension est générée au moyen de l'assemblage de trois diodes D1i, D2i et D3i, disposé en série avec une résistance Rdi, entre une borne positive d'alimentation VCC et une borne négative d'alimentation GND, qui pourra être matérialisée par la masse du circuit. La tension générée par les trois diodes D1i, D2i et D3i est égale à 3.Vd, où Vd est la tension de seuil d'une diode. Ainsi, la tension émetteur-base des transistors de puissance est égale à 3Vd-Vcnti, où Vcnti représente une chute de tension générée par le module de contrôle CNTi. Comme on le verra par la suite, les composants constituant la source de courant contrôlée CSi peuvent aisément être dimensionnés de telle sorte que 3Vd-Vcnti>Vebth, où Vebth représente la valeur minimale que doit prendre la tension émetteur-base des transistors de puissance pour que ceux-ci puissent conduire. La tension de polarisation VCC-3.Vd appliquée aux bases des transistors de puissance effectue alors en quelque sorte un pré-chargement des capacités parasites desdits transistors et rend ces transistors potentiellement conducteurs. Il suffira donc, dans cette configuration, de présenter un courant I1 à leurs émetteurs pour qu'ils deviennent effectivement conducteurs, et ce de manière quasi instantanée.In the example described in this figure, the power transistors are bipolar PNP type transistors. Their reference terminals, transfer terminals and polarization terminals are respectively constituted by their transmitters, collectors and bases. The emitters of the power transistors are connected together to the output of the control module CNTi, their bases being permanently subjected, when the current source CSi is in operation, to a predetermined voltage VCC-3.Vd. This voltage is generated by means of the assembly of three diodes D1i, D2i and D3i, arranged in series with a resistor Rdi, between a positive supply terminal VCC and a negative supply terminal GND, which may be materialized by the circuit mass. The voltage generated by the three diodes D1i, D2i and D3i is equal to 3.Vd, where Vd is the threshold voltage of a diode. Thus, the emitter-base voltage of the power transistors is equal to 3Vd-Vcnti, where Vcnti represents a voltage drop generated by the control module CNTi. As will be seen below, the components constituting the controlled current source CSi can easily be dimensioned so that 3Vd-Vcnti> Veb th, where Veb th represents the minimum value which the emitter-base voltage of the transistors must take power so that they can drive. The bias voltage VCC-3.Vd applied to the bases of the power transistors then in a way pre-charges the stray capacitances of said transistors and makes these transistors potentially conductive. It will therefore suffice, in this configuration, to present a current I1 to their transmitters so that they become effectively conductive, and this in an almost instantaneous manner.
La figure 2 est un schéma fonctionnel qui représente une pompe de charge CP incorporant deux sources de courant du type décrit ci-dessus. Cette pompe de charge CP est munie de deux entrées de commande destinées à recevoir des signaux de commande V1 et V2, et d'une sortie OUT destinée à délivrer un courant de sortie dont le sens et la valeur dépendent des valeurs des signaux de commande V1 et V2. La pompe de charge CP comporte une première et une deuxième source de courant contrôlée CS1 et CS2 du type précité, dont les entrées de commande constituent les entrées de commande de la pompe de charge CP, les sorties OUT1 et OUT2 des première et deuxième sources de courant étant reliées aux première et deuxième branches d'un miroir de courant (M1, M2), la sortie de la deuxième source de courant CS2 étant en outre reliée à la sortie OUT de la pompe de charge CP. Le miroir de courant (M1, M2) est constitué de deux transistors, M1 et M2, dont les collecteurs forment respectivement les première et deuxième branches du miroir de courant, dont les bases sont reliées ensemble au collecteur du premier transistor M1, et dont les émetteurs sont reliés à une borne négative d'alimentation GND. Lorsque le signal de commande V2 de la deuxième source de courant contrôlée CS2 l'ordonne, ladite source CS2 conduit un courant IO2. La première source de courant CS1 ne conduisant pas, le courant de sortie IO2 de la deuxième source de courant CS2 est dirigé vers la sortie OUT de la pompe de charge CP qui délivre donc un courant positif. A l'inverse, si le signal de commande V1 de la première source de courant contrôlée CS1 ordonne la conduction de ladite source CS1, celle-ci délivre un courant IO1 sur la première branche du miroir de courant (M1, M2), lequel miroir de courant reproduit alors ledit courant IO1 sur sa deuxième branche. La deuxième source de courant CS2 ne conduisant pas, le courant circulant dans la deuxième branche du miroir de courant (M1, M2), qui est l'image du courant IO1, est prélevé sur la sortie OUT de la pompe de charge CP, qui délivre donc un courant négatif. La pompe de charge CP comporte en outre une source de courant, dite de drainage, disposée entre la sortie de la première source de courant CS1 et la borne négative d'alimentation GND. Cette source de courant est destinée à débiter en permanence, lorsque la pompe de charge CP est en fonctionnement, un courant Id dont la valeur nominale est négligeable devant la valeur maximale du courant de sortie IO1 ou IO2 de la pompe de charge CP. La source de courant de drainage permet d'évacuer des charges électriques stockées dans des capacités parasites que comportent les transistors M1 et M2 constituant le miroir de courant (M1, M2), ce qui évite qu'un courant de fuite parasite n'apparaisse dans l'une des branches dudit miroir de courant pour évacuer ces charges vers la borne négative d'alimentation GND, après que la conduction de la première source de courant CS1 aura été interrompue. Un tel courant de fuite provoquerait la persistance d'un courant négatif à la sortie OUT de la pompe de charge CP, phénomène qui est d'autant plus rédhibitoire que la fréquence de commutation de la pompe de charge CP est élevée.Figure 2 is a block diagram showing a CP charge pump incorporating two current sources of the type described above. This CP charge pump is provided with two control inputs intended to receive control signals V1 and V2, and an OUT output intended to deliver an output current whose direction and value depend of the values of the control signals V1 and V2. The CP charge pump has a first and second controlled current source CS1 and CS2 of the aforementioned type, the control inputs constitute the control inputs of the charge pump CP, the outputs OUT1 and OUT2 of the first and second current sources being connected to the first and second branches of a current mirror (M1, M2), the output of the second source of current CS2 being further connected to the output OUT of the charge pump CP. The mirror of current (M1, M2) consists of two transistors, M1 and M2, whose collectors form respectively the first and second branches of the current mirror, the bases of which are connected together to the collector of the first transistor M1, and whose emitters are connected to a GND negative supply terminal. When the control signal V2 from the second source of controlled current CS2 orders it, said source CS2 conducts a current IO2. The first one current source CS1 not conducting, the output current IO2 of the second source of current CS2 is directed to the output OUT of the charge pump CP which therefore delivers a current positive. Conversely, if the control signal V1 of the first controlled current source CS1 orders the conduction of said source CS1, it delivers a current IO1 on the first branch of the current mirror (M1, M2), which current mirror then reproduces said current IO1 on its second branch. The second CS2 current source not conducting, the current flowing in the second branch of the current mirror (M1, M2), which is the image of the current IO1, is taken from the output OUT of the charge pump CP, which therefore delivers a negative current. The charge pump CP also includes a current source, known as drainage, disposed between the output of the first current source CS1 and the negative terminal GND power supply. This current source is intended to flow continuously, when the charge pump CP is in operation, a current Id whose nominal value is negligible compared to the maximum value of the output current IO1 or IO2 of the charge pump CP. The drain current source allows the evacuation of electrical charges stored in parasitic capacitances that comprise the transistors M1 and M2 constituting the current mirror (M1, M2), which prevents a parasitic leakage current from appearing in one of the branches of said current mirror to evacuate these charges towards the negative supply terminal GND, after the conduction of the first current source CS1 has been interrupted. Such leakage current would cause a negative current to persist at the OUT output of the CP load, a phenomenon which is all the more unacceptable as the switching frequency of the CP charge pump is high.
La figure 3 représente schématiquement une source de courant contrôlée CS1 conforme à un mode de réalisation préféré de invention. Dans la mesure du possible, des références identiques ont été conservées pour adresser les éléments communs avec la source de courant décrite précédemment. Dans cette source de courant contrôlée CS1, le module de contrôle CNT1 comporte un premier et un deuxième transistors T1 et T2 formant une première paire différentielle, et destinés à recevoir sur leurs bases la tension de commande V1, et un troisième transistor T3 dont le trajet de courant principal, c'est-à-dire le trajet collecteur-émetteur, est disposé en série avec une première résistance R11, entre une borne positive d'alimentation VCC et la sortie du module de contrôle CNT1, l'émetteur du premier transistor T1 étant relié à la borne positive d'alimentation VCC, le collecteur du deuxième transistor T2 étant relié à la borne positive d'alimentation VCC via une deuxième résistance R21, d'une part, et à la base du troisième transistor T3, d'autre part. Le module de contrôle CNT1 comporte en outre un quatrième et un cinquième transistor T4 et T5, formant une deuxième paire différentielle, et destinés à recevoir sur leurs bases un signal dit de sélection Vx1, constitué ici par une tension, le collecteur du quatrième transistor T4 étant relié à la borne positive d'alimentation VCC, le collecteur du cinquième transistor T5 étant relié à la borne positive d'alimentation VCC via un transistor Q5 monté en diode, d'une part, et à la base du troisième transistor T3 via une troisième résistance R31, d'autre part. Les diodes D1i, D2i et D3i sont ici constituées par des transistors Q1, Q2 et Q3, polarisés au moyen d'un transistor Q4 disposé en série avec les transistors précités, selon une technique bien connue du spécialiste.FIG. 3 schematically represents a controlled current source CS1 according to a preferred embodiment of the invention. Wherever possible, identical references have been kept to address common elements with the source previously described. In this controlled current source CS1, the module CNT1 control includes first and second transistors T1 and T2 forming a first differential pair, and intended to receive on their bases the control voltage V1, and a third transistor T3 including the main current path, that is to say the collector-emitter path, is arranged in series with a first resistor R11, between a positive terminal power supply VCC and the output of the control module CNT1, the emitter of the first transistor T1 being connected to the positive supply terminal VCC, the collector of the second transistor T2 being connected to the positive supply terminal VCC via a second resistor R21, on the one hand, and to the base of the third transistor T3, on the other hand. The CNT1 control module also includes a fourth and a fifth transistor T4 and T5, forming a second differential pair, and intended to receive on their bases a so-called selection signal Vx1, constituted here by a voltage, the collector of the fourth transistor T4 being connected to the positive supply terminal VCC, the collector of the fifth transistor T5 being connected to the positive supply terminal VCC via a transistor Q5 diode mounted, on the one hand, and at the base of the third transistor T3 via a third resistance R31, on the other hand. The diodes D1i, D2i and D3i are here constituted by transistors Q1, Q2 and Q3, polarized by means of a transistor Q4 arranged in series with the aforementioned transistors, according to a technique well known to the specialist.
Si, dans les exemples de réalisation décrits dans cet exposé, les transistors utilisés sont des transistors bipolaires, il est bien évident que des transistors de type MOS, dont les grilles, drains et sources constitueraient respectivement les bornes de polarisation, de transfert et de référence, peuvent leur être substitués.If, in the embodiments described in this description, the transistors used are bipolar transistors, it is obvious that MOS type transistors, whose grids, drains and sources would respectively constitute the terminals of polarization, of transfer and of reference, can be substituted for them.
La source de courant CS1 fonctionne de la manière suivante :
Lorsque la tension de commande V1 est négative, le deuxième transistor T2 est conducteur
alors que le premier transistor T1 est bloqué. Le troisième transistor T3 fonctionne en suiveur
de tension et recopie le potentiel de la base dudit troisième transistor T3 sur son émetteur avec
un décalage égal à une tension base-émetteur. La deuxième résistance R21 est parcourue par
un courant significatif et génère à ses bornes une chute de tension suffisamment importante
pour que la valeur de la différence entre le potentiel de l'émetteur du troisième transistor T3 et
celui des bases des transistors de puissance soit inférieure à une valeur minimale autorisant la
mise en conduction desdits transistors de puissance. La chute de tension aux bornes de la
deuxième résistance R21 assure ainsi le maintien du blocage des transistors de puissance. Le
courant I1 délivré par le module de contrôle CNT1 est donc nul et le module de puissance PA1
est inactif.The current source CS1 operates as follows:
When the control voltage V1 is negative, the second transistor T2 is conductive while the first transistor T1 is blocked. The third transistor T3 operates as a voltage follower and copies the potential of the base of said third transistor T3 on its emitter with an offset equal to a base-emitter voltage. The second resistor R21 is traversed by a significant current and generates at its terminals a sufficiently large voltage drop so that the value of the difference between the potential of the emitter of the third transistor T3 and that of the bases of the power transistors is less than a minimum value authorizing the conduction of said power transistors. The voltage drop across the second resistor R21 thus ensures that the power transistors remain blocked. The current I1 delivered by the control module CNT1 is therefore zero and the power module PA1 is inactive.
Lorsque la valeur de la tension de commande V1 devient positive, le deuxième
transistor T2 se bloque tandis que le premier transistor T1 devient conducteur. Le potentiel de
la base du troisième transistor T3 devient donc voisin de celui de la borne positive
d'alimentation VCC, le potentiel de l'émetteur dudit troisième transistor T3 devenant
suffisamment élevé pour rendre les transistors potentiellement conducteurs. Le troisième
transistor T3 délivre alors, via la première résistance R11, un courant I1 non-nul vers la sortie
du module de contrôle CNT1. Ce courant I1 rend les transistors de puissance conducteurs dès
qu'il parvient à leurs émetteurs, et la source de courant contrôlée CS1 délivre un courant de
sortie IO1 non-nul. La valeur nominale de ce courant de sortie IO1 peut être déterminée
comme suit : une première loi de maille donne
Lorsque la tension de sélection Vx1 est négative, le raisonnement développé ci-dessus
reste applicable, à ceci près que la première loi de maille n'est plus valable. En effet,
une tension de sélection Vx1 négative rend le cinquième transistor T5 conducteur tandis que le
quatrième transistor T4 se bloque. La diode constituée par le transistor Q5 devient donc
passante, et impose une tension Vbe aux bornes de l'assemblage en série des deuxième et
troisième résistances R21 et R31, qui forment un pont diviseur de tension. Il apparaít ainsi une
tension x.Vbe aux bornes de la deuxième résistance R21, où
La figure 4 représente partiellement un appareil récepteur de signaux radioélectriques qui incorpore une pompe de charge CP construite sur la base de deux sources de courant contrôlées CS1 et CS2 du type décrit ci-dessus. Cet appareil comporte un système d'antenne et de filtrage AF permettant la réception d'un signal dont la fréquence est sélectionnée au sein d'une gamme de fréquences donnée, et sa transformation en un signal électronique Vfr, dit signal radio, ayant une fréquence FR appelée fréquence radio. Une conversion de fréquence, à partir de la fréquence radio FR sélectionnée vers une fréquence intermédiaire FI prédéterminée, est réalisée dans cet appareil au moyen d'un mélangeur MX destiné à recevoir le signal radio Vfr, d'une part, et un signal de sortie Vco d'un oscillateur local OSC dont la fréquence d'oscillation FLO est déterminée par la valeur d'une tension de réglage Vtun, d'autre part. Cet appareil comporte en outre un détecteur de phase/fréquence PD destiné à comparer la fréquence FLO du signal de sortie Vco de l'oscillateur OSC avec la fréquence FREF d'un signal de référence Vref, et à délivrer à la pompe de charge CP des signaux de commande V1, V2 et de sélection Vx1, Vx2, dont les valeurs dépendent du résultat de ladite comparaison. La sortie de la pompe de charge CP est reliée à une capacité Cs destinée à générer à ses bornes la tension de réglage Vtun.Figure 4 partially shows a signal receiving apparatus which incorporates a CP charge pump built on the basis of two sources of controlled current CS1 and CS2 of the type described above. This device has a system antenna and AF filtering allowing the reception of a signal whose frequency is selected within a given frequency range, and its transformation into a signal electronic Vfr, called radio signal, having an FR frequency called radio frequency. A frequency conversion, from the selected FR radio frequency to a frequency intermediate predetermined FI, is carried out in this apparatus by means of an MX mixer intended to receive the radio signal Vfr, on the one hand, and an output signal Vco from a local oscillator OSC whose oscillation frequency FLO is determined by the value of an adjustment voltage Vtun, on the other hand. This device also includes a PD phase / frequency detector intended to compare the frequency FLO of the output signal Vco of the oscillator OSC with the frequency FREF of a reference signal Vref, and to deliver to the charge pump CP signals of command V1, V2 and selection Vx1, Vx2, whose values depend on the result of said comparison. The output of the charge pump CP is connected to a capacitor Cs intended for generate at its terminals the adjustment voltage Vtun.
Le mélangeur MX est conçu de sorte que
Claims (7)
appareil caractérisé en ce que la pompe de charge est conforme à la revendication 5.Radio signal receiving apparatus, comprising an antenna and filtering system allowing the reception of a signal whose frequency is selected within a given frequency range, and its transformation into an electronic signal called radio signal, apparatus in which a frequency conversion, from the selected frequency to a predetermined intermediate frequency, is carried out by means of a mixer intended to receive the radio signal, on the one hand, and an output signal of a local oscillator whose frequency is determined by the value of an adjustment voltage, on the other hand, apparatus further comprising a phase / frequency detector intended to compare the frequency of the output signal of the oscillator with that of a reference signal and to deliver control signals to a charge pump, the values of which depend on the result of said comparison, the output of the charge pump being connected e has a capacity for generating thereacross the control voltage,
apparatus characterized in that the charge pump conforms to claim 5.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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FR9810509 | 1998-08-18 | ||
FR9810509 | 1998-08-18 |
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US (1) | US6150806A (en) |
EP (1) | EP0981203B1 (en) |
JP (1) | JP2000200111A (en) |
KR (1) | KR20000017372A (en) |
DE (1) | DE69914266T2 (en) |
Families Citing this family (7)
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US6445170B1 (en) * | 2000-10-24 | 2002-09-03 | Intel Corporation | Current source with internal variable resistance and control loop for reduced process sensitivity |
US6448811B1 (en) | 2001-04-02 | 2002-09-10 | Intel Corporation | Integrated circuit current reference |
US6507225B2 (en) | 2001-04-16 | 2003-01-14 | Intel Corporation | Current mode driver with variable equalization |
US6522174B2 (en) * | 2001-04-16 | 2003-02-18 | Intel Corporation | Differential cascode current mode driver |
US6791356B2 (en) * | 2001-06-28 | 2004-09-14 | Intel Corporation | Bidirectional port with clock channel used for synchronization |
TWI435654B (en) * | 2010-12-07 | 2014-04-21 | 安恩國際公司 | Two-terminal current controller and related led lighting device |
CN112953227B (en) * | 2021-05-14 | 2021-08-10 | 上海芯龙半导体技术股份有限公司 | Switching power supply circuit, chip and system |
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EP0438039A1 (en) * | 1990-01-15 | 1991-07-24 | Telefonaktiebolaget L M Ericsson | A method and arrangement for frequency synthesis |
EP0561456A1 (en) * | 1992-03-18 | 1993-09-22 | Philips Composants Et Semiconducteurs | Frequency synthesizer using a fast switching current mirror and device using such a synthesizer |
US5453680A (en) * | 1994-01-28 | 1995-09-26 | Texas Instruments Incorporated | Charge pump circuit and method |
US5485125A (en) * | 1994-03-02 | 1996-01-16 | U.S. Philips Corporation | Phase-locked oscillator arrangement |
US5508702A (en) * | 1994-06-17 | 1996-04-16 | National Semiconductor Corp. | BiCOMS digital-to-analog conversion |
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US4740766A (en) * | 1987-09-04 | 1988-04-26 | Tektronix, Inc. | Precision tracking current generator |
US5412309A (en) * | 1993-02-22 | 1995-05-02 | National Semiconductor Corporation | Current amplifiers |
BE1007853A3 (en) * | 1993-12-03 | 1995-11-07 | Philips Electronics Nv | BANDGAPE REFERENCE FLOW SOURCE WITH COMPENSATION FOR DISTRIBUTION IN SATURATION FLOW OF BIPOLAR TRANSISTORS. |
US5506543A (en) * | 1994-12-14 | 1996-04-09 | Texas Instruments Incorporated | Circuitry for bias current generation |
JP2953383B2 (en) * | 1996-07-03 | 1999-09-27 | 日本電気株式会社 | Voltage-current converter |
JP3334548B2 (en) * | 1997-03-21 | 2002-10-15 | ヤマハ株式会社 | Constant current drive circuit |
US5883507A (en) * | 1997-05-09 | 1999-03-16 | Stmicroelectronics, Inc. | Low power temperature compensated, current source and associated method |
-
1999
- 1999-08-10 DE DE1999614266 patent/DE69914266T2/en not_active Expired - Fee Related
- 1999-08-10 EP EP99202607A patent/EP0981203B1/en not_active Expired - Lifetime
- 1999-08-17 JP JP11230943A patent/JP2000200111A/en active Pending
- 1999-08-18 KR KR1019990034134A patent/KR20000017372A/en not_active Application Discontinuation
- 1999-08-18 US US09/376,862 patent/US6150806A/en not_active Expired - Lifetime
Patent Citations (5)
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EP0438039A1 (en) * | 1990-01-15 | 1991-07-24 | Telefonaktiebolaget L M Ericsson | A method and arrangement for frequency synthesis |
EP0561456A1 (en) * | 1992-03-18 | 1993-09-22 | Philips Composants Et Semiconducteurs | Frequency synthesizer using a fast switching current mirror and device using such a synthesizer |
US5453680A (en) * | 1994-01-28 | 1995-09-26 | Texas Instruments Incorporated | Charge pump circuit and method |
US5485125A (en) * | 1994-03-02 | 1996-01-16 | U.S. Philips Corporation | Phase-locked oscillator arrangement |
US5508702A (en) * | 1994-06-17 | 1996-04-16 | National Semiconductor Corp. | BiCOMS digital-to-analog conversion |
Non-Patent Citations (1)
Title |
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ANONYMOUS: "Current Sources for a Phase Locked Loop. November 1973.", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 16, no. 6, November 1973 (1973-11-01), New York, US, pages 2013, XP002100095 * |
Also Published As
Publication number | Publication date |
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JP2000200111A (en) | 2000-07-18 |
EP0981203B1 (en) | 2004-01-21 |
KR20000017372A (en) | 2000-03-25 |
US6150806A (en) | 2000-11-21 |
DE69914266T2 (en) | 2004-11-18 |
DE69914266D1 (en) | 2004-02-26 |
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