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EP0928528A1 - Circuit en boucle avec protection de boucle de transport et de carte - Google Patents

Circuit en boucle avec protection de boucle de transport et de carte

Info

Publication number
EP0928528A1
EP0928528A1 EP98931873A EP98931873A EP0928528A1 EP 0928528 A1 EP0928528 A1 EP 0928528A1 EP 98931873 A EP98931873 A EP 98931873A EP 98931873 A EP98931873 A EP 98931873A EP 0928528 A1 EP0928528 A1 EP 0928528A1
Authority
EP
European Patent Office
Prior art keywords
loop
card
tsw
work
tsp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98931873A
Other languages
German (de)
English (en)
Inventor
Markus Thalmann
Manfred Stadler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Schweiz AG
Original Assignee
Siemens Schweiz AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Schweiz AG filed Critical Siemens Schweiz AG
Publication of EP0928528A1 publication Critical patent/EP0928528A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/437—Ring fault isolation or reconfiguration
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/08—Intermediate station arrangements, e.g. for branching, for tapping-off
    • H04J3/085—Intermediate station arrangements, e.g. for branching, for tapping-off for ring networks, e.g. SDH/SONET rings, self-healing rings, meashed SDH/SONET networks

Definitions

  • the present invention relates to a ring circuit according to the preamble of claim 1
  • double ring circuits are often used, which have a working and a security ring, which connect the relevant network nodes to one another.
  • Such systems are explained, for example, in [5] or [6].
  • Chapter 5 of [3 ] the corresponding ITU recommendations for transmission networks of the synchronous digital hierarchy are defined (see also Chapter 2 7 2 of [4])
  • Transmission networks of the synchronous digital hierarchy are characterized by the fact that all network elements involved normally work with a single, centrally generated clock frequency that is extracted from the data stream of an optional input.
  • This enables an arbitrarily structured data network to be used Set up a tree-like frequency distribution network, which comprises several network nodes.
  • PDH Plesiochronous digital hierarchy
  • multiplexers terminal multiplexers, add / drop multiplexers or frequency multiplexers which, under certain circumstances, can only be supplied with the system clock via a single data connection
  • the Plesiochronous Digital Hierarchy does not allow a single channel to be taken directly from a data stream. All hierarchy levels of the multiplex system must always be run through, in which the channels are combined into systems with an ever increasing number of channels. The same applies on the receiver side Hierarchy levels run through in reverse order so that the individual channels can then be further distributed.
  • the Synchronous Digital Hierarchy SDH
  • SDH enables direct access to signals of a certain bandwidth within a high-channel system, in order to route them to a subscriber or to an exchange it is also possible to access the broadband signal stream in order to exchange certain signals with others without having to go through the entire multiplex hierarchy. This access takes place via a computer-controlled switching network
  • the structure of the data streams transmitted in the synchronous digital hierarchy (SDH) is described in detail in [2] and [4].
  • the synchronous digital hierarchy (SDH) is based on the synchronous transmission of transport modules (STM-n) in which useful information is inserted
  • STM-n transport modules
  • a basic transport module STM-1 which consists of a frame with 9 rows and 270 columns or 2430 fields with 8 bit data capacity, has a maximum data content of 19440 bits.
  • the STM-1 modules are transmitted with a clock frequency of 8000 Hz, thereby creating a transmission channel with a capacity of 155.52 Mbit / s As shown in FIG.
  • rows 1-3 (regeneration section overhead) and 5-9 (multiplex section overhead) of the first 9 columns of a synchronous transport module STM-1 form the section header (section overhead SOH) row 4 of the first 9 columns contains a management unit AU-4, in which a management unit pointer (pointer) AU-4 PTR is provided, which designates the field in which a signal received by the management unit AU-4 or the first field (J1) of a virtual container (e.g. VC-4) begins.
  • a virtual container VC-4 which has a path frame head (Path Overhead POH) can, for example, contain three 34 Mbit / s channels or 63 2 Mbit / s channels or also a continuous sequence of ATM cells.
  • the specified M Ultraplex structure is shown in Fig. 6-1 and Fig. 6-2 of [2].
  • a virtual container VC-4 can, in addition to the frame header POH, a C-4 container, three virtual containers VC-3 or 63 virtual containers VC-12 each contain a container C-3 or C-12 and a frame header POH.
  • the virtual containers VC-3 and VC-12 can be moved in transport frames known as tributary units TU-3 or TU-12, which multiply in time in the first byte Have administration unit pointer (pointer) that points to the first field of the virtual containers VC-3 and VC-12.
  • the transport frames TU-3 and TU-12 are combined in transport groups TUG-3 or TUG-2 and TUG-3.
  • 3 contains three transport frames TU-3 or seven transport groups TUG-2, each of which contains three transport frames TU-12.
  • the header fields POH make it possible to identify the useful information down to the container level. Individual user channels can therefore use a transport module STM -1 can be removed or added without disassembling the entire synchronous module STM-1.
  • the structure of a device for converting data streams from the plesiochronous digital hierarchy into data streams from the synchronous digital hierarchy is described in [1] and then shown in modules in FIG. 2-1.
  • the functions of the individual modules are described in detail in [1] - [4]
  • Network architecture to which the device corresponds is described in detail in [3] and [4].
  • the network basically consists of three types of modules: adaptation modules (each shown in a trapezoidal shape), termination modules (each shown as a triangle) and connecting units (see e.g. Fig 4-1 of [3] or Fig. 2 7 of [4])
  • adaptation modules each shown in a trapezoidal shape
  • termination modules each shown as a triangle
  • connecting units see e.g. Fig 4-1 of [3] or Fig. 2 7 of [4]
  • Fig. 9 which already shows a device according to the invention, the functions of the modules are briefly explained.
  • a synchronous one is used to convert and synchronize the optical signals received via an optical fiber Interface SPI provided only the termination module OST (the conversion and synchronization must always be provided in an adaptation module) If an error is detected in the synchronous interface SPI, an error message LOS (loss of signal) is sent to the regenerator section RS
  • the frame synchronization of the transport modules STM-n as well as the scrambling (scrambling) and descrambling of the data takes place.
  • the frame synchronization takes place on the basis of the six data bytes A1, A2 contained in the first line of the section overhead (SOH or RSOH) (see FIG. 10) If the frame synchronization cannot be established for a certain time, an LOF (loss of frame) error message is generated
  • the adaptation to auxiliary layers takes place, through which a communication channel between the regenerators (using the RSOH bytes D1, D2 and D3), a voice channel for service purposes (using the RSOH byte E1) and a user channel (based on RSOH byte F1)
  • the three bytes B2 contained in the fifth line of the section overhead are used to check the signal quality, according to which the error message "Signal poor "(Signal degrade SD) or, in the case of poor quality, the error message" signal failed "(signal fail SF) is sent to the multiplex section protection module MSP, which is basically an extension of the termination module MST.
  • the fifth line of the section overhead SOH or the first line of the MSOH containing three bytes K1 and K2 are transmitted to the multiplex section protection module MSP.
  • bit pattern 111 occurs at bits 6, 7 and 8 of byte K2
  • an alarm signal AIS is detected.
  • bit pattern 110 occurs at bit 6, 7, and 8 of byte K2
  • a remote receiver error FERF far end receiver fail
  • the position of the virtual container VC-4 within the payload is determined by pointer processing.
  • a switching matrix for higher order virtual containers (higher order path connection) is not shown.
  • HPT higher order path termmation
  • the path frame head (POH) of the virtual container VC-4 is evaluated, after which the position of the virtual containers VC-12 or VC-3 within the payload is determined in the adaptation module HPA (higher order path adaptation)
  • Switching matrix LPC (Iower order path connection) switches the lower-level virtual containers (Iower order) VC-12 or VC-3 according to the intended traffic routes.
  • a monitoring module LPOM (Iower order path monitoring), which is part of the path frame head (Path Overhead POH) of the virtual container VC-12 or VC-3, is used to determine alarm and quality information that is provided for security measures (sub network protection) evaluates.
  • a corresponding monitoring unit HPOM is provided in particular when using an interconnection matrix HPC for higher order virtual containers.
  • the evaluation of the path frame head (Path Overhead POH) of the virtual containers VC-12 or VC-3 takes place, after which the localized containers C12 or C3 (see FIG. 1) connect to the subsequent adaptation module LPA ( Iower order path adaptation) and synchronized into a data stream of the plesiochronous digital hierarchy and transferred to the plesiochronous interface PPI (interface to the plesiochronous digital hierarchy).
  • ring structures are preferably used, as described in Chapter 5 of [3].
  • a plurality of network nodes A, B, C, D which are provided as transition modules between the plesiochrones and the synchronous digital hierarchy, are connected to one another by two opposing transport loops tsw (working loop) and tsp (securing loop).
  • the tsw (working) loop is secured by the tsp (protection) loop.
  • the data transmission from network node A to network node C takes place through the working loop tsw via network node D and through the security loop tsp via network node B. If one of the transport loops tsw or tsp (e.g. due to a defect occurring at network nodes B or D) fails, this occurs Transmission through the remaining transport loop tsw or tsp. If one of the two network nodes A or C fails, however, no data transmission is possible.
  • FIG. 4 shows a network card which is known from [6] and is connected to two transport loops (2-fiber ring) and which could be used in the ring circuit of FIG. 3.
  • 5 shows two network cards integrated into the two transport loops tsw and tsp according to FIG. 4.
  • both transport loops tsw and tsp run completely through both network cards, which is why in each of these network cards the full processing capacity for each transport loop tsw and tsp a total of four add-drop multiplexers must be available. This results in a considerable effort.
  • both transport loops tsw and tsp are interrupted in the event of a complete failure of one of the two network cards shown in FIG. 5, which results in a severe restriction of the security options.
  • the network card that is still working can only be supplied with the data of a transport loop tsw (working) or tsp (protection).
  • the present invention is therefore based on the object of specifying a ring circuit with transport loop and card security which can be implemented with little effort.
  • the ring circuit according to the invention can be implemented with network cards that are easier to manufacture, since the two transport loops tsw and tsp do not pass through the two adjacent network cards (e.g. AW and AP). Only the data of a transport loop tsw or tsp are processed on each network card. Since the two transport loops tsw and tsp do not pass through the two adjacent network cards, if one network card (e.g. AW or AP) fails, only one transport loop tsw or tsp is interrupted, which is why the data of both transport loops tsw and tsp are still present on the neighboring card.
  • AW e.g. AW or AP
  • the ring circuit according to the invention is preferably used in networks of the synchronous digital hierarchy.
  • An advantageous application of the solution according to the invention is, however, also in other networks, e.g. of the plesiochronous digital hierarchy possible.
  • FIG. 2 shows a known ring circuit with four network nodes A, B, C and D, which are connected to one another by two transport loops tsw, tsp, 3 shows a known ring circuit with four network nodes, on each of which two network cards AW, AP;
  • FIG. 4 a known network card with add / drop functionality for two transport loops tsw, tsp
  • FIG. 5 two network cards connected in series according to FIG. 4,
  • FIG. 6 with a ring circuit according to the invention two network cards E1, W1; E2, W2; E3, W3; E4, W4, which are traversed by two transport loops tsw, tsp, in normal operating state
  • FIG. 7 the ring circuit according to FIG. 6 after a failure of the network card W3 and an interruption of the transport loop tsw,
  • FIG. 8 shows a possible structure of a network card E1 E4 according to the invention; W1, ..., W4, Fig. 9 the ring circuit according to Fig. 6 with additional switching options, Fig. 10 columns 1 to 9 of a synchronous transport module STM-n in detail, Fig. 11 the network card E3 and W3 in the same, however circuitry shown differently (north / south), FIG. 12 the ring circuit according to FIG. 9 in the event of an error,
  • FIG. 13 shows a further structure of a network card W3 * according to the invention with a unit #s which is suitable for the selective switching through of work and security channels, and
  • FIG. 14 shows a network card W3 * according to FIG. 13 and a network card E3 * with one outside the card
  • FIGS. 1 to 5 and 10 The subject matter of FIGS. 1 to 5 and 10 was explained at the beginning.
  • Fig. 6 shows the structure of a ring circuit according to the invention with four each of a work and a security card E1, W1; E2, W2; E3, W3; E4, W4 existing network nodes NK1, NK2, NK3 and NK4, which are connected by a working and a security loop tsw (working) and tsp (protection), on which data of the same origin are transmitted in opposite directions (the number of connected network nodes NK can vary from of the ring circuit described for example, of course, differ greatly).
  • the network cards E1, W1, E2, W2, E3, W3, E4, W4 are constructed identically and have two inputs IM and Ii2 (see Fig.
  • each network card E3 and W3 is connected to the working loop tsw (working) and the second input ⁇ 2 of each network card E3 and W3 is connected to the security loop tsp (protection).
  • FIG. 11 This situation is illustrated in FIG. 11.
  • the work loop tsw is connected from the north and the security loop tsp (protection ) from the south to both network cards E3 and W3.
  • the circuit of FIG. 11 is identical to the circuit of FIG. 6. It should be noted that, in contrast to the known arrangement of FIG. 5, the output lo of the work card W3 does not have an input IM or Ii2 of the associated security card E3 and the output lo the security card E3 is not connected to an input IM or Ii2 of the associated work card W3.
  • each network card E3 and W3 On each network card E3 and W3 the data from the input IM or Ii2 are fed via a switch s to a switching matrix # (e.g. an add / drop multiplexer), which in normal operation returns the data to the same transport loop tsp or tsw via the output lo to a non-ring network via an interface.
  • a switching matrix # e.g. an add / drop multiplexer
  • the solution according to the invention results in a significantly reduced outlay (only two instead of the four add / drop multiplexers used in the arrangement of FIG. 5).
  • the network card W3 in which the data of the first transport loop tsw (working) is read in via the switch s in normal operation is the work card.
  • the network card E3 in which the data of the second transport loop tsp (protection) is read in via the switch s in normal operation is the security card.
  • both transport loops tsw and tsp are present on both network cards E3 and W3, so that if one network card E3 or W3 fails on the second network card W3 or E3, the data of both transport loops tsw and tsp is still via the switch s can be read.
  • the network can therefore protect against the failure of a network card (e.g. work card W3) and at the same time against a line interruption in the security loop tsp im
  • a network card e.g. work card W3
  • the security functionality compared to known systems is significantly improved by the measures according to the invention.
  • the data transmission takes place in normal operation from the network node NK1 with the network cards E1 and W1 to the network node NK3 with the network cards E3 and W3.
  • Data e.g. of the plesiochronous digital hierarchy are routed through the work loop tsw via the work cards W1 and W4 to the work card W3 and then returned to the network of the plesiochronous digital hierarchy.
  • the data of the plesiochronous digital hierarchy is led through the security loop tsp via the two security cards E1, E2 to the work card W3.
  • Identical data is therefore available at the inputs IM and Ii2 of the work card W3, provided that the data is also transmitted redundantly in normal operation, so that if the work loop tsw fails, it is possible to switch to input Ii2 (receiving the data from the security loop tsp).
  • non-redundant data are preferably transmitted via the security loop tsp. This data can therefore be transferred to security card E3 and terminated there.
  • a control unit activates the security card E3, to which the data transmitted via the security loop tsp are fed via the switch s.
  • the security card E3 was activated, which takes over the data exchange with the network of the plesiochronous digital hierarchy (add / drop functionality) and outputs the correspondingly changed data at the output lo. Since no data is present at the output lo of the defective work card W3 of the network node NK3, the work loop tsw remains interrupted (cf. FIG. 7) if no further measures are taken. By switching the switch s3W, the input of the continued work loop tsw can be switched to the output lo of the security card, thereby turning on The interfaces of the NK3 network node can be guaranteed to function properly.
  • FIG. 12 also shows a control unit CTRL which receives the error messages from the work and security cards and makes the necessary switchovers. In sd systems that receive the error messages from the work and security cards and make the necessary changes.
  • SEMF Synchronous Equipment Management Function
  • the ring circuit according to the invention can advantageously be used in networks of the synchronous digital hierarchy.
  • a possible structure of a network card according to the invention for SDH operation is shown in FIG. 8. It can be seen from this that separate test and processing or input sections are provided for the working and security loops tsw and tsp, which are implemented with the adaptation and termination modules described at the beginning.
  • the input routes are preferably carried out in parallel until the data of both transport loops tsw and tsp have been completely checked separately, as a result of which the criteria for switching between the transport loops tsw and tsp are obtained.
  • the two input sections are then brought together via the switch s, after which the known adaptation and termination modules perform the add / drop functionality for the selected transport loop tsw and tsp.
  • the switch s is provided in front of the adaptation module HPA (higher order path adaptation), by means of which pointer processing determines the position of the virtual containers VC-12 or VC-3 within the payload.
  • the adaptation module HPA provided for the input sections is also connected in parallel with switching matrices LPC (Iower order path connection) and termination and adaptation modules LPT, LPA with plesiochronous interfaces PPI. Data exchange with the network of the Plesiochronous Digital Hierarchy can take place in parallel within the lower hierarchical levels.
  • an output path leading to the output lo is provided, which is provided with the adaptation and termination modules of the higher SDH hierarchy levels.
  • a LPOM (Iower order path monitoring) monitoring module is inserted between the relevant switching matrix LPC and the subsequent adaptation module HPA of the output section, which provides the switching criteria for sub-network protection (Iower order path protection) or the protection of the paths of lower hierarchy levels.
  • the circuit arrangement of FIG. 8 has the advantage that a comparison of the signal quality which is made via the working and the safety loop tsw; Data supplied tsp can be performed. In simpler systems, the signal test can also be carried out after the s switch. In the event of a signal failure, the system switches over to receiving the data from the second input IM or Ii2 without the quality of which is known.
  • the network card described allows protection within the ring circuit according to the invention against errors which occur within higher or lower hierarchical levels (multiplex section protection or sub network protection). As already described, protection against card failures is also provided.
  • the solution according to the invention is in any network Applicable It is essential that the error detection mechanisms necessary for the initiation of the security measures are provided for the network cards and the transport loops
  • FIG. 13 The further construction of a network card W3 * according to the invention with a unit #s, which is suitable for the selective switching of work and security channels.
  • Monitoring functions determine when an error occurs, in Which channel an error has occurred If, for example, one of n working channels is detected as defective, it can be replaced by a safety channel using the switching matrix ⁇ x #s.
  • the switching matrix ⁇ x #s is therefore intended to switch through the faultlessly functioning working and possibly safety channels
  • the hierarchical level at which a switchover takes place is preferably selectable
  • FIG. 14 shows the network card W3 * according to FIG. 13 as well as a network card E3 * with a changeover switch s arranged outside the card E3 * for the working and security channel. Instead of switching through on the level of the higher or lower order path connection function HPC or LPC the working and security channels are switched outside the E3 * network card

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Multi Processors (AREA)

Abstract

L'invention concerne un circuit en boucle présentant une boucle de travail et une boucle de protection (tsw, twp) au moyen desquelles plusieurs noeuds de réseau (NK1, NK2, NK3, NK4) d'un premier réseau (SDH) sont raccordés entre eux. Chaque noeud de réseau (NK1, NK2, NK3, NK4) présente une carte de travail et une carte de protection (W1, E1; W2, E2, W3, E3; W4, E4), qui sont appropriées, par l'intermédiaire d'une interface (tio) pour échanger des données entre les boucles (tsw, tsp) et un deuxième réseau, par exemple selon la hiérarchie numérique plésiochrone. Les cartes de travail et de protection (W1, E1; W2, E2, W3, E3; W4, E4), présentent, côté boucle, une première et une seconde entrée (li1; li2) qui peuvent être connectées à une sortie (lo) par l'intermédiaire d'un premier commutateur (s) et d'une matrice de commutation (#). La boucle de travail (tsw) est raccordée par la première entrée (li1) et la boucle de protection, par la deuxième entrée (li2), à la carte de travail et à la carte de protection (W1, E1; W2, E2, W3, E3; W4, E4) d'un noeud de réseau (NK1, NK2, NK3, NK4). La boucle de travail (tsw) et la boucle de protection (tsp) partent respectivement de la sortie (lo) de la carte de travail (W1; W2; W3; W4) et de la sortie (lo) de la carte de protection (E1; E2, E3; E4), directement ou par l'intermédiaire d'un deuxième ou troisième commutateur (s1W, s2W, s3W, s4W ou s1E, s2E, s3E, s4E). Les cartes de travail et de protection (W1, E1; W2, E2, W3, E3; W4, E4) peuvent être réalisées facilement. Lors d'une défaillance d'une carte de travail ou de protection (W1, E1; W2, E2, W3, E3; W4, E4), il ne se produit aucune interruption de la boucle, c'est pourquoi les données des deux boucles de transport (tsw, tsp) restent présentes au niveau de la carte voisine.
EP98931873A 1997-07-25 1998-07-15 Circuit en boucle avec protection de boucle de transport et de carte Withdrawn EP0928528A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CH179397 1997-07-25
CH179397 1997-07-25
PCT/CH1998/000309 WO1999005825A1 (fr) 1997-07-25 1998-07-15 Circuit en boucle avec protection de boucle de transport et de carte

Publications (1)

Publication Number Publication Date
EP0928528A1 true EP0928528A1 (fr) 1999-07-14

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EP98931873A Withdrawn EP0928528A1 (fr) 1997-07-25 1998-07-15 Circuit en boucle avec protection de boucle de transport et de carte

Country Status (5)

Country Link
EP (1) EP0928528A1 (fr)
JP (1) JP2001501423A (fr)
AU (1) AU742629B2 (fr)
BR (1) BR9806233A (fr)
WO (1) WO1999005825A1 (fr)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4648088A (en) * 1985-08-19 1987-03-03 Rockwell International Corporation Distributed control time division multiplex ring communication apparatus
JP3439533B2 (ja) * 1994-06-24 2003-08-25 富士通株式会社 選択的保護機能を有するｓｄｈ２−ファイバリング光多重装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9905825A1 *

Also Published As

Publication number Publication date
WO1999005825A1 (fr) 1999-02-04
AU8203898A (en) 1999-02-16
AU742629B2 (en) 2002-01-10
JP2001501423A (ja) 2001-01-30
BR9806233A (pt) 2000-03-21

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