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EP0855035B1 - Operating process for an input circuit and corresponding input circuit - Google Patents

Operating process for an input circuit and corresponding input circuit Download PDF

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Publication number
EP0855035B1
EP0855035B1 EP96934479A EP96934479A EP0855035B1 EP 0855035 B1 EP0855035 B1 EP 0855035B1 EP 96934479 A EP96934479 A EP 96934479A EP 96934479 A EP96934479 A EP 96934479A EP 0855035 B1 EP0855035 B1 EP 0855035B1
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EP
European Patent Office
Prior art keywords
signal
input
input circuit
connecting line
switching element
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EP96934479A
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German (de)
French (fr)
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EP0855035A1 (en
EP0855035B2 (en
Inventor
Roland Scheuerer
Günter KÖCK
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Siemens AG
Siemens Corp
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Siemens AG
Siemens Corp
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Priority to EP96934479A priority Critical patent/EP0855035B2/en
Publication of EP0855035A1 publication Critical patent/EP0855035A1/en
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/20—Cathode-ray oscilloscopes
    • G01R13/22—Circuits therefor
    • G01R13/34—Circuits for representing a single waveform by sampling, e.g. for very high frequencies

Definitions

  • the present invention relates to an operating method for an input circuit supplied with an input signal is, and the input circuit according to the preamble of the claim 6.
  • the object of the present invention is an operating method for an input circuit and this to provide the corresponding input circuit, which eliminate the above problems.
  • the task is identified for the operating procedure by the indicator of claim 1 and for the input circuit by the Characteristic of claim 6 solved.
  • the input circuit has a signal connection 1 and a reference signal connection 2, which via the connecting line 3 are connected.
  • Via the signal connection 1 is the input circuit an input signal a reference potential can be supplied via the reference signal connection 2.
  • a series connection in the connecting line 3 which consists of a Zener diode 4, a resistor 5, a transistor 6 and a diode 7.
  • the basis of the Transistor 6 is through the series resistor 8 with the reference potential and via the control line 9 with the control and evaluation circuit 10 connected.
  • the control and evaluation circuit 10 is also with the signal detection circuit 11 connected via the decoupling diode 12 is connected to the connecting line 3.
  • the Signal line 13 is via the pull resistor 14 with the supply potential connected.
  • the signal acquisition works as follows:
  • control and evaluation circuit 10 controls time currently, e.g. every ms, the transistor 6 on for a short time, so that the transistor 6 closes the connecting line 3.
  • the activation time is considerably shorter than the time between two controls.
  • the activation time is e.g. only 1/1000 the period, would be a ⁇ s in the present case.
  • the one during the control on the signal detection circuit 11 applied signal level is from the signal detection circuit 11 recorded and at this time to the tax and Evaluation circuit 10 forwarded. This takes preprocessing of the signal before - this will be connected later 5 and 6 in more detail - and reports that Evaluation result on the bus 15 to a higher-level Unit.
  • the parent unit can, for example the central unit of a programmable logic controller be.
  • Input signal is logic zero, i.e. below the Zener voltage the Zener diode 4 is, current flows through the pull resistor 14, the diode 12, the resistor 5, the transistor 6 and the diode 7.
  • the on the signal detection circuit 11th pending signal is therefore due to the voltage drop via the resistor 14 also logic zero.
  • the circuit shown in FIG 1 is a floating input circuit.
  • the signal detection circuit 11 and the transistor 6 as a switching element are direct coupled to the connecting line 3. 2 shows in contrast, a potential-separated input circuit.
  • the switching transistor 6 is through the optocoupler 6 'replaced.
  • the signal detection circuit 11 is also connected to the connecting line 3 via the optocoupler 12 '.
  • the optocouplers 6 ', 12' are self-evident resistors 8 ', 14' assigned to the current limitation. Otherwise is the structure of the isolated input circuit according to 2 similar to the floating structure according to FIG 1. The same elements are therefore in FIG 2 with the same reference numerals provided as in FIG. 1.
  • such an input circuit has one only signal detection circuit 11, which in turn via an optocoupler 12 'is connected to the connecting line 3 is.
  • the connecting line 3 splits between the nodes 16, 16 'into two branches 3', 3 ". In each Branch 3 ', 3 "are then each a resistor 5', 5", each a Zener diode 4 ', 4 "and an optocoupler 6', 6" each.
  • the Zener voltage of the Zener diode 4 ' is 10, for example Volts, while that of the zener diode is 4 "100 volts.
  • FIG. 4 shows a modification of FIG. 3.
  • the input circuits according to the invention result completely new possibilities for signal acquisition. So far the input signal is continuously acquired and from time to time Time transmitted to a higher-level control. A preprocessing the detected signal was not. In the the present invention, however, it is possible with a sampling frequency from e.g. 1 kHz measured values for the input signal to determine and a predetermined number of to evaluate temporally successive measured values together.
  • a sampling frequency from e.g. 1 kHz measured values for the input signal to determine and a predetermined number of to evaluate temporally successive measured values together.
  • the input signal to be detected e.g. a DC signal you can e.g. always three in a row Detect signals and in the control and evaluation circuit 10 evaluate together.
  • the signal is used, which at least two of three measurements was taken. This makes it possible short-term interference peaks that occur in the detected signal can filter out and still respond quickly to To ensure signal changes.
  • One with spikes provided signal is shown in FIG 5.
  • the horizontal The line in FIG. 5 is intended to be the predetermined barrier mean which through the Zener diode 4 in the connecting line 3 is set.
  • the signal to be detected is an AC voltage signal with an alternating voltage frequency
  • this must be considerable be less than the sampling frequency.
  • the Number of successive measured values, which are evaluated together at least roughly the ratio of the sampling frequency to correspond to AC frequency.
  • the signal to be recorded is the usual mains voltage frequency of 50 or 60 Hz, the predetermined Number at least 20 or 16 or 17.
  • the predetermined must Number of parts above which the detected signal is rated as one will be less than half the number. Typical the number of parts should be approximately equal to a quarter of the total Number.
  • the mains frequency is 50 Hz and the Sampling frequency is 1 kHz and the predetermined number is therefore 20, the number of parts should be between 4 and 7. For example, it could be recognized as one, if 5 or more than 5 of 20 consecutive measurements provide a logical one. In the other cases it is on Recognizing zero.
  • the resulting signal can be sampled Power loss can be significantly reduced. Step into practice therefore hardly any heat problems anymore. Consequently, the Circuit can be miniaturized. In particular, it is possible to arrange the circuit in an integrated circuit. This represents a significant advantage. It also enables it while sampling the input signals too to allow an increased current to flow due to the short sampling times. As a result, the interference can be done without complex Interference suppression circuits can be significantly reduced.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

sn an input circuit there is a switching component (6, 6', 6") between the signal line connection (1) and a reference protential which is periodically triggered by a control and evaluation circuit (10). The periodic triggering considerably reduces the maximum power loss occurring in the input circuit.

Description

Die vorliegende Erfindung betrifft ein Betriebsverfahren für eine Eingangsschaltung, der ein Eingangssignal zugeführt wird, und die Eingangsschaltung gemäß dem Oberbegriff des Anspruchs 6.The present invention relates to an operating method for an input circuit supplied with an input signal is, and the input circuit according to the preamble of the claim 6.

Bei Eingangsschaltungen des Standes der Technik wird dieser kontinuierlich ein Eingangssignal zugeführt, welches ebenfalls kontinuierlich an einer Signalerfassungsschaltung ansteht. In Abständen wird das Eingangssignal dann von der Signalerfassungsschaltung tatsächlich übernommen, ausgewertet und gegebenenfalls an eine übergeordnete Steuerung weitergeleitet.In the case of input circuits of the prior art, this is continuously fed an input signal, which also is continuously applied to a signal detection circuit. At intervals, the input signal is then from the signal detection circuit actually taken over, evaluated and possibly forwarded to a higher-level controller.

Diese Vorgehensweise hat mehrere Nachteile. Zum einen fließt kontinuierlich ein Eingangsstrom vom ca. 2 bis 10 mA, solange das Eingangssignal von 0 Volt verschieden ist. Folglich entsteht in der Eingangsschaltung durch das kontinuierliche Anliegen des Eingangssignals Verlustwärme, wenn das Eingangssignal von 0 Volt verschieden ist. Diese Verlustwärme muß abgeführt werden und verhindert eine Miniaturisierung der Eingangsschaltung. Ferner ist bei niedrigen Eingangsströmen unter 2 mA die Einkopplung von elektrischen Störsignalen sehr kritisch. Diese Einkopplung kann meist nur durch aufwendige Entstörmaßnahmen beseitigt werden.This approach has several disadvantages. For one, flows continuously an input current of approx. 2 to 10 mA as long the input signal is different from 0 volts. Hence arises in the input circuit due to the continuous concern heat loss of the input signal when the input signal is different from 0 volts. This heat loss must be dissipated and prevents miniaturization of the input circuit. It is also below at low input currents 2 mA the coupling of electrical interference signals very much critical. This coupling can usually only be done by complex Interference suppression measures are eliminated.

Aus der Zusammenfassung zu JP-A-580 87 467 aus "Patent abstracts of Japan" ist eine Schaltung bekannt, mit der thermische Abhängigkeiten bei der Erfassung von Eingangsimpulsen durch ein spezielles Glättungsverfahren verbessert werden.From the abstract on JP-A-580 87 467 from "Patent abstracts of Japan "a circuit is known with the thermal Dependencies in the acquisition of input pulses can be improved by a special smoothing process.

Die Aufgabe der vorliegenden Erfindung besteht darin, ein Betriebsverfahren für eine Eingangsschaltung und die hierzu korrespondierende Eingangsschaltung zur Verfügung zu stellen, welche die obengenannten Probleme beseitigen. The object of the present invention is an operating method for an input circuit and this to provide the corresponding input circuit, which eliminate the above problems.

Die Aufgabe wird für das Betriebsverfahren durch das Kennzeichen des Anspruchs 1 und für die Eingangsschaltung durch das Kennzeichen des Anspruchs 6 gelöst.The task is identified for the operating procedure by the indicator of claim 1 and for the input circuit by the Characteristic of claim 6 solved.

Vorteilhafte Ausgestaltungen des Betriebsverfahrens ergeben sich aus den Ansprüchen 2 bis 5, vorteilhafte Ausgestaltungen der Eingangsschaltung aus den Ansprüchen 7 bis 9. Weitere Vorteile und Einzelheiten ergeben sich aus der nachfolgenden Beschreibung eines Ausführungsbeispiels. Dabei zeigen:

FIG 1 bis 4
verschiedene Eingangsschaltunaen und
FIG 5 und 6
die Signalverläufe für Gleich- und Wechselspannungssignale.
Advantageous refinements of the operating method result from claims 2 to 5, advantageous refinements of the input circuit from claims 7 to 9. Further advantages and details emerge from the following description of an exemplary embodiment. Show:
1 to 4
various input circuits and
5 and 6
the waveforms for DC and AC signals.

Gemäß FIG 1 weist die Eingangsschaltung einen Signalanschluß 1 und einen Bezugssignalanschluß 2 auf, welche über die Verbindungsleitung 3 miteinander verbunden sind. Über den Signalanschluß 1 ist der Eingangsschaltung ein Eingangssignal zuführbar, über den Bezugssignalanschluß 2 ein Bezugspotential. In der Verbindungsleitung 3 befindet sich eine Reihenschaltung, welche aus einer Z-Diode 4, einem Widerstand 5, einem Transistor 6 und einer Diode 7 besteht. Die Basis des Transistors 6 ist über den Vorwiderstand 8 mit dem Bezugspotential und über die Steuerleitung 9 mit der Steuer- und Auswerteschaltung 10 verbunden.According to FIG 1, the input circuit has a signal connection 1 and a reference signal connection 2, which via the connecting line 3 are connected. Via the signal connection 1 is the input circuit an input signal a reference potential can be supplied via the reference signal connection 2. There is a series connection in the connecting line 3, which consists of a Zener diode 4, a resistor 5, a transistor 6 and a diode 7. The basis of the Transistor 6 is through the series resistor 8 with the reference potential and via the control line 9 with the control and evaluation circuit 10 connected.

Die Steuer- und Auswerteschaltung 10 ist ferner mit der Signalerfassungsschaltung 11 verbunden, die über die Entkoppeldiode 12 an die Verbindungsleitung 3 angeschlossen ist. Die Signalleitung 13 ist über den Pullwiderstand 14 mit dem Versorgungspotential verbunden.The control and evaluation circuit 10 is also with the signal detection circuit 11 connected via the decoupling diode 12 is connected to the connecting line 3. The Signal line 13 is via the pull resistor 14 with the supply potential connected.

Die Signalerfassung funktioniert wie folgt:The signal acquisition works as follows:

Wenn an der Steuerleitung 9 kein Steuersignal ansteht, sperrt der Transistor 6. Er trennt also die Verbindungsleitung 3 auf. Dadurch kann über den Widerstand 5 kein Strom fließen. Die Steuer- und Auswerteschaltung 10 steuert daher von Zeit zur Zeit, z.B. jede ms, den Transistor 6 für kurze Zeit an, so daß der Transistor 6 die Verbindungsleitung 3 schließt. Die Ansteuerzeit ist erheblich kleiner als die Zeit zwischen zwei Ansteuerungen. Die Ansteuerzeit beträgt z.B. nur 1/1000 der Periode, wäre im vorliegenden Fall also eine µs.If there is no control signal on control line 9, locks the transistor 6. It therefore disconnects the connecting line 3 on. As a result, no current can flow through the resistor 5. The control and evaluation circuit 10 therefore controls time currently, e.g. every ms, the transistor 6 on for a short time, so that the transistor 6 closes the connecting line 3. The activation time is considerably shorter than the time between two controls. The activation time is e.g. only 1/1000 the period, would be a µs in the present case.

Der während der Ansteuerung an der Signalerfassungsschaltung 11 anliegende Signalpegel wird von der Signalerfassungsschaltung 11 erfaßt und zu diesem Zeitpunkt an die Steuer- und Auswerteschaltung 10 weitergeleitet. Diese nimmt eine Vorverarbeitung des Signals vor - darauf wird später noch in Verbindung mit FIG 5 und 6 näher eingegangen - und meldet das Auswertungsergebnis über den Bus 15 weiter an eine übergeordnete Einheit. Die übergeordnete Einheit kann beispielsweise die Zentraleinheit einer speicherprogrammierbaren Steuerung sein.The one during the control on the signal detection circuit 11 applied signal level is from the signal detection circuit 11 recorded and at this time to the tax and Evaluation circuit 10 forwarded. This takes preprocessing of the signal before - this will be connected later 5 and 6 in more detail - and reports that Evaluation result on the bus 15 to a higher-level Unit. The parent unit can, for example the central unit of a programmable logic controller be.

Wenn das der Eingangsschaltung über den Signalanschluß 1 zugeführte Eingangssignal logisch-Null ist, also unter der Zenerspannung der Z-Diode 4 liegt, fließt Strom über den Pullwiderstand 14, die Diode 12, den Widerstand 5, den Transistor 6 und die Diode 7. Das an der Signalerfassungsschaltung 11 anstehende Signal ist daher aufgrund des Spannungsabfalls über den Widerstand 14 ebenfalls logisch-Null.If that is fed to the input circuit via the signal connection 1 Input signal is logic zero, i.e. below the Zener voltage the Zener diode 4 is, current flows through the pull resistor 14, the diode 12, the resistor 5, the transistor 6 and the diode 7. The on the signal detection circuit 11th pending signal is therefore due to the voltage drop via the resistor 14 also logic zero.

Wenn das am Signalanschluß 1 anstehende Eingangssignal hingegen oberhalb der Zenerspannung der Zener-Diode 4 liegt, schaltet die Zener-Diode 4 durch. In der Folge sperrt die Entkoppeldiode 12. Die Signalleitung 13 wird folglich durch den Pullwiderstand 14 auf logisch-Eins gelegt. Dieses Signal wird dann von der Signalerfassungsschaltung 11 erfaßt und an die Steuer- und Auswerteschaltung 10 weitergemeldet. If, however, the input signal present at signal connection 1 is above the Zener voltage of the Zener diode 4, turns on the zener diode 4. As a result, the Decoupling diode 12. The signal line 13 is consequently through the pull resistor 14 is set to logic one. This signal is then detected by the signal detection circuit 11 and on the control and evaluation circuit 10 reported.

Bei der Dimensionierung der Schaltung ist folgendes zu beachten:

  • die Zenerdiode 4 legt die Schaltschwelle des Eingangssignals fest, bei welcher das von der Signalerfassungsschaltung 11 detektierte Signal von Null auf Eins wechselt. Die so bestimmte Schranke sollte zwischen 30 und 60% des maximal zulässigen Nennwerts des Eingangssignals liegen. Wenn das dem Signalanschluß 1 zugeführte Signal z.B. ein Gleichspannungssignal von 24 Volt ist, sollte die Zenerspannung der Z-Diode 4 z.B. bei 10 Volt liegen.
  • Der Widerstand 5 muß so dimensioniert sein, daß die durch Normen vorgeschriebenen Mindest- und Höchstwerte zum Ansprechen der Schaltung beachtet werden.
  • Die Diode 7 ist nur dann erforderlich, wenn bei einem versehentlichen Vertauschen von Signal- und Bezugsspannung die Sperrspannung des Transistors 6 allein nicht ausreicht.
When dimensioning the circuit, note the following:
  • the Zener diode 4 defines the switching threshold of the input signal at which the signal detected by the signal detection circuit 11 changes from zero to one. The barrier thus determined should be between 30 and 60% of the maximum permissible nominal value of the input signal. If the signal supplied to the signal connection 1 is, for example, a DC voltage signal of 24 volts, the Zener voltage of the Zener diode 4 should be, for example, 10 volts.
  • The resistor 5 must be dimensioned so that the minimum and maximum values prescribed by standards for addressing the circuit are observed.
  • The diode 7 is only required if the reverse voltage of the transistor 6 alone is not sufficient in the event of an inadvertent swapping of the signal and reference voltage.

Die Schaltung gemäß FIG 1 ist eine potentialgebundene Eingangsschaltung. Mit anderen Worten: Die Signalerfassungsschaltung 11 und der Transistor 6 als Schaltelement sind direkt an die Verbindungsleitung 3 angekoppelt. FIG 2 zeigt demgegenüber eine potentialgetrennte Eingangsschaltung. In diesem Fall ist der Schalttransistor 6 durch den Optokoppler 6' ersetzt. Ferner ist auch die Signalerfassungsschaltung 11 über den Optokoppler 12' an die Verbindungsleitung 3 angeschlossen. Den Optokopplern 6',12' sind selbstverständlich zur Strombegrenzung Widerstände 8',14' beigeordnet. Ansonsten ist der Aufbau der potentialgetrennten Eingangsschaltung gemäß FIG 2 analog zu dem potentialgebundenen Aufbau gemäß FIG 1. Gleiche Elemente sind daher in FIG 2 mit dem gleichen Bezugszeichen versehen wie in FIG 1.The circuit shown in FIG 1 is a floating input circuit. In other words: the signal detection circuit 11 and the transistor 6 as a switching element are direct coupled to the connecting line 3. 2 shows in contrast, a potential-separated input circuit. In In this case, the switching transistor 6 is through the optocoupler 6 'replaced. Furthermore, the signal detection circuit 11 is also connected to the connecting line 3 via the optocoupler 12 '. The optocouplers 6 ', 12' are self-evident resistors 8 ', 14' assigned to the current limitation. Otherwise is the structure of the isolated input circuit according to 2 similar to the floating structure according to FIG 1. The same elements are therefore in FIG 2 with the same reference numerals provided as in FIG. 1.

Bei entsprechender Ausgestaltung der Eingangsschaltung ist diese auch für mehrere verschiedene Spannungen verwendbar. Beispiele hierfür sind in den FIG 3 und 4 dargestellt. With a corresponding design of the input circuit these can also be used for several different voltages. Examples of this are shown in FIGS. 3 and 4.

Gemäß FIG 3 weist eine derartige Eingangsschaltung zwar eine einzige Signalerfassungschaltung 11 auf, welche wiederum über einen Optokoppler 12' an die Verbindungsleitung 3 angeschlossen ist. Die Verbindungsleitung 3 spaltet sich aber zwischen den Knotenpunkten 16,16' in zwei Zweige 3',3" auf. In jedem Zweig 3',3" sind dann je ein Widerstand 5',5", je eine Z-Diode 4',4" und je ein Optokoppler 6', 6" angeordnet.According to FIG. 3, such an input circuit has one only signal detection circuit 11, which in turn via an optocoupler 12 'is connected to the connecting line 3 is. The connecting line 3 splits between the nodes 16, 16 'into two branches 3', 3 ". In each Branch 3 ', 3 "are then each a resistor 5', 5", each a Zener diode 4 ', 4 "and an optocoupler 6', 6" each.

Die Zenerspannung der Zenerdiode 4' beträgt beispielsweise 10 Volt, während die der Zenerdiode 4" 100 Volt beträgt. Die Widerstände 5',5" sind dementsprechend auf Eingangssignale von 24 Volt Gleichspannung bzw. 230 Volt Wechselspannung dimensioniert. Durch Ansteuern nur des Zweiges 3' über die Steuerleitung 9' bzw. nur des Zweiges 3" über die Steuerleitung 9" kann dann alternativ eine der beiden Signalarten (24V= oder 230V~) über die Signalleitung 13 erfaßt werden.The Zener voltage of the Zener diode 4 'is 10, for example Volts, while that of the zener diode is 4 "100 volts. The resistors 5 ', 5 "are accordingly based on input signals from Dimensioned 24 volts DC or 230 volts AC. By controlling only branch 3 'via the control line 9 'or only branch 3 "via the control line 9" can then alternatively one of the two signal types (24V = or 230V ~) can be detected via the signal line 13.

Demgegenüber zeigt FIG 4 eine Abwandlung von FIG 3. Hier sind die Zenerdioden 4',4" nicht parallel zueinander, sondern hintereinander geschaltet. Ihre Zenerspannungen betragen daher nicht 10 und 100 Volt, sondern 10 und 90 Volt. Ebenso sind auch die Widerstände 5',5" hintereinander geschaltet. Wenn mit dieser Schaltung ein 230 Volt-Wechselspannungsignal erfaßt werden soll, wird nur der Optokoppler 6' über die Steuerleitung 9' angesteuert. Wenn dagegen ein 24 Volt-Gleichspannungssignal erfaßt werden soll, werden beide Optokoppler 6, 6' über die Steuerleitungen 9',9" angesteuert.4 shows a modification of FIG. 3. Here are the Zener diodes 4 ', 4 "not parallel to each other, but one behind the other switched. Your Zener tensions are therefore not 10 and 100 volts, but 10 and 90 volts. Likewise are also the resistors 5 ', 5 "connected in series. If this circuit detects a 230 volt AC signal is to be, only the optocoupler 6 'via the control line 9 'driven. If, on the other hand, a 24 volt DC signal Both optocouplers are to be detected 6, 6 'via the control lines 9', 9 ".

Mit den erfindungsgemäßen Eingangsschaltungen ergeben sich völlig neue Möglichkeiten zur Signalerfassung. Bisher wurde das Eingangssignal kontinuierlich erfaßt und von Zeit zur Zeit an eine übergeordnete Steuerung übermittelt. Eine Vorverarbeitung des erfaßten Signals erfolgte nicht. Bei der vorliegenden Erfindung hingegen ist es möglich, mit einer Abtastfrequenz von z.B. 1 kHz Meßwerte für das zugeführte Eingangssignal zu bestimmen und eine vorbestimmte Anzahl von zeitlich aufeinanderfolgenden Meßwerten zusammen auszuwerten.The input circuits according to the invention result completely new possibilities for signal acquisition. So far the input signal is continuously acquired and from time to time Time transmitted to a higher-level control. A preprocessing the detected signal was not. In the the present invention, however, it is possible with a sampling frequency from e.g. 1 kHz measured values for the input signal to determine and a predetermined number of to evaluate temporally successive measured values together.

Wenn das zuerfassende Eingangssignal z.B. ein Gleichspannungssignal ist, kann man z.B. stets drei aufeinanderfolgende Signale erfassen und in der Steuer- und Auswerteschaltung 10 gemeinsam auswerten. Als tatsächlich weiterverarbeitetes Signal wird das Signal verwendet, welches bei mindestens zwei der drei Messungen erfaßt wurde. Hierdurch ist es möglich, kurzfristige Störspitzen, die im erfaßten Signal auftreten können, auszufiltern und dennoch eine schnelle Reaktion auf Signaländerungen zu gewährleisten. Ein derartiges mit Störspitzen versehenes Signal ist in FIG 5 dargestellt. Die waagrechte Linie in FIG 5 soll dabei die vorbestimmte Schranke bedeuten, welche durch die Zenerdiode 4 in der Verbindungsleitung 3 festgelegt ist.If the input signal to be detected e.g. a DC signal you can e.g. always three in a row Detect signals and in the control and evaluation circuit 10 evaluate together. As an actual processed signal the signal is used, which at least two of three measurements was taken. This makes it possible short-term interference peaks that occur in the detected signal can filter out and still respond quickly to To ensure signal changes. One with spikes provided signal is shown in FIG 5. The horizontal The line in FIG. 5 is intended to be the predetermined barrier mean which through the Zener diode 4 in the connecting line 3 is set.

Wenn das zu erfassende Signal hingegen ein Wechselspannungssignal mit einer Wechselspannungsfrequenz ist, muß diese erheblich kleiner sein als die Abtastfrequenz. Ferner muß die Anzahl aufeinanderfolgender Meßwerte, welche zusammen ausgewertet werden, mindestens in etwa dem Verhältnis von Abtastfrequenz zu Wechselspannungsfrequenz entsprechen. Ein Beispiel soll dies näher erläutern:If, on the other hand, the signal to be detected is an AC voltage signal with an alternating voltage frequency, this must be considerable be less than the sampling frequency. Furthermore, the Number of successive measured values, which are evaluated together at least roughly the ratio of the sampling frequency to correspond to AC frequency. An example should explain this in more detail:

Wenn die Meßwerte mit einer Abtastfrequenz von 1 kHz abgetastet werden und das zu erfassende Signal die übliche Netzspannungsfrequenz von 50 bzw. 60 Hz aufweist, sollte die vorbestimmte Anzahl mindestens 20 bzw. 16 oder 17 sein.When the measured values are sampled with a sampling frequency of 1 kHz and the signal to be recorded is the usual mains voltage frequency of 50 or 60 Hz, the predetermined Number at least 20 or 16 or 17.

Da ferner - vergleiche FIG 6 - während der halben Wechselspannungsperiode das erfaßte Signal negativ und damit sicher unterhalb der durch die Z-Diode festgelegten Schaltschwelle (= gestrichelte Linie in FIG 6) liegt, muß die vorbestimmte Teilanzahl, oberhalb derer das erfaßte Signal als Eins gewertet wird, kleiner als die Hälfte der Anzahl sein. Typisch sollte die Teilanzahl in etwa gleich einem Viertel der gesamten Anzahl sein.Since, furthermore - compare FIG. 6 - during half the AC voltage period the detected signal is negative and therefore safe below the switching threshold defined by the Z diode (= dashed line in FIG. 6), the predetermined must Number of parts above which the detected signal is rated as one will be less than half the number. Typical the number of parts should be approximately equal to a quarter of the total Number.

Wenn gemäß dem obigen Beispiel die Netzfrequenz 50 Hz und die Abtastfrequenz 1 kHz beträgt sowie die vorbestimmte Anzahl folglich 20 ist, sollte die Teilanzahl zwischen 4 und 7 liegen. Es könnte also beispielsweise auf Eins erkannte werden, wenn 5 oder mehr als 5 von 20 aufeinanderfolgenden Meßwerten eine logische Eins liefern. In den anderen Fällen ist auf Null zu erkennen.If, according to the example above, the mains frequency is 50 Hz and the Sampling frequency is 1 kHz and the predetermined number is therefore 20, the number of parts should be between 4 and 7. For example, it could be recognized as one, if 5 or more than 5 of 20 consecutive measurements provide a logical one. In the other cases it is on Recognizing zero.

Durch das Abtasten des Eingangssignals kann die entstehende Verlustleistung deutlich reduziert werden. In der Praxis treten daher kaum noch Wärmeprobleme mehr auf. Folglich kann die Schaltung miniaturisiert werden. Insbesondere ist es möglich, die Schaltung in einem integrierten Schaltkreis anzuordnen. Dies stellt einen erheblichen Vorteil dar. Darüber hinaus ermöglicht es das Abtasten der Eingangssignale auch, während der kurzen Abtastzeiten einen erhöhten Strom fließen zu lassen. Hierdurch können die Störbeeinflussungen ohne aufwendige Entstörschaltungen deutlich verringert werden.The resulting signal can be sampled Power loss can be significantly reduced. Step into practice therefore hardly any heat problems anymore. Consequently, the Circuit can be miniaturized. In particular, it is possible to arrange the circuit in an integrated circuit. This represents a significant advantage. It also enables it while sampling the input signals too to allow an increased current to flow due to the short sampling times. As a result, the interference can be done without complex Interference suppression circuits can be significantly reduced.

Claims (9)

  1. Operating method for an input circuit to which an input signal is supplied from the outside, characterized
    in that the input signal is connected to a reference-earth potential via a connecting line (3) and a switching element (6, 6', 6") which is arranged in the connecting line (3),
    in that the switching element (6, 6', 6") is alternately opened and closed, and
    in that measurements for the input signal which is supplied to the input circuit are taken and evaluated only when the switching element (6, 6', 6") is closed.
  2. Operating method according to Claim 1, characterized
    in that the supplied input signal is a binary signal,
    in that a predetermined number of successive measurements are evaluated together,
    in that the evaluation result is a one signal when at least a predetermined portion of the number of the measurements is above a specific limit, and
    in that the evaluation result is a zero signal when less than the predetermined portion of the number of the measurements is above the determined limit.
  3. Operating method according to Claim 2, characterized in that the input signal is a DC voltage signal, in that the number of measurements is odd, and in that the portion of the number is the smallest integer number which is greater than half the number.
  4. Operating method according to Claim 2, characterized
    in that the input signal is an AC voltage signal at an AC voltage frequency,
    in that the AC voltage frequency is considerably lower than the sampling frequency of the switching element (6, 6', 6"),
    in that the predetermined number corresponds at least approximately to the ratio of the sampling frequency to the AC voltage frequency, and
    in that the predetermined portion of the number is less than half the number, in particular is approximately equal to one quarter of the number.
  5. Operating method according to Claim 2, 3 or 4, characterized in that the input signal has a maximum permissible nominal value, and in that the predetermined limit is between 30 and 60 % of the maximum permissible nominal value.
  6. Input circuit, comprising
    a signal connection (1) via which an input signal can be supplied to the input circuit,
    a connecting line (3) via which the signal connection (1) can be connected to a reference-earth potential, and
    a signal detection circuit (11), which is coupled to the connecting line (3), for detecting the signal which is supplied to the input circuit via the signal connection (1),
    characterized in that it
    is a switching element (6, 6', 6") which is arranged in the connecting line (3) and by means of which the connecting line (3) can be closed and opened, and
    has a control and evaluation circuit (10) which is connected to the switching element (6, 6' 6") and to the signal detection circuit (11).
  7. Input circuit according to Claim 6, characterized in that a zener diode (4, 4'), which is connected in the reverse direction, is arranged in the connecting line (3).
  8. Input circuit according to Claim 6 or 7, characterized in that the connecting line (3) is split between two nodes (16, 16') into at least two paths (3', 3"), and in that a path zener diode (4"), which is connected in the reverse direction, is arranged in at least one path (3"), and a path switching element (6") is arranged in the other path (3').
  9. Input circuit according to Claim 8, characterized in that the path switching element (6") is designed as an optocoupler.
EP96934479A 1995-10-09 1996-09-27 Operating process for an input circuit and corresponding input circuit Expired - Lifetime EP0855035B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP96934479A EP0855035B2 (en) 1995-10-09 1996-09-27 Operating process for an input circuit and corresponding input circuit

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP95115874 1995-10-09
EP95115874 1995-10-09
PCT/EP1996/004233 WO1997014043A1 (en) 1995-10-09 1996-09-27 Operating process for an input circuit and corresponding input circuit
EP96934479A EP0855035B2 (en) 1995-10-09 1996-09-27 Operating process for an input circuit and corresponding input circuit

Publications (3)

Publication Number Publication Date
EP0855035A1 EP0855035A1 (en) 1998-07-29
EP0855035B1 true EP0855035B1 (en) 1999-07-14
EP0855035B2 EP0855035B2 (en) 2005-12-14

Family

ID=8219699

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96934479A Expired - Lifetime EP0855035B2 (en) 1995-10-09 1996-09-27 Operating process for an input circuit and corresponding input circuit

Country Status (7)

Country Link
EP (1) EP0855035B2 (en)
AT (1) ATE182217T1 (en)
DE (1) DE59602456D1 (en)
ES (1) ES2136432T5 (en)
MY (1) MY132305A (en)
TW (1) TW336300B (en)
WO (1) WO1997014043A1 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3755690A (en) † 1972-06-06 1973-08-28 Standard Microsyst Smc M.o.s. input circuit with t. t. l. compatability

Also Published As

Publication number Publication date
EP0855035A1 (en) 1998-07-29
DE59602456D1 (en) 1999-08-19
TW336300B (en) 1998-07-11
MY132305A (en) 2007-10-31
ES2136432T3 (en) 1999-11-16
ES2136432T5 (en) 2006-06-16
ATE182217T1 (en) 1999-07-15
WO1997014043A1 (en) 1997-04-17
EP0855035B2 (en) 2005-12-14

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