EP0798889B1 - Error control method and error control device for digital communication - Google Patents
Error control method and error control device for digital communication Download PDFInfo
- Publication number
- EP0798889B1 EP0798889B1 EP96116817A EP96116817A EP0798889B1 EP 0798889 B1 EP0798889 B1 EP 0798889B1 EP 96116817 A EP96116817 A EP 96116817A EP 96116817 A EP96116817 A EP 96116817A EP 0798889 B1 EP0798889 B1 EP 0798889B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- decoding
- signals
- received
- selecting
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
- H03M13/451—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD]
- H03M13/453—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD] wherein the candidate code words are obtained by an algebraic decoder, e.g. Chase decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6513—Support of multiple code types, e.g. unified decoder for LDPC and turbo codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1812—Hybrid protocols; Hybrid automatic repeat request [HARQ]
- H04L1/1819—Hybrid protocols; Hybrid automatic repeat request [HARQ] with retransmission of additional or different redundancy
Definitions
- the present invention relates to an error control method and an error control device for digital communication which employ retransmission control such as ARQ (Automatic Repeat Request), and in particular relates to an error control method and an error control device for digital communication which use hybrid ARQ which carries out code combining.
- ARQ Automatic Repeat Request
- a third packet is combined by using a R/3 rate decoder, and so on. Each packet is weighed by an estimate of its reliability.
- Retransmission control methods using code combining techniques are classified into methods which add only an error detecting code to the first signal transmitted without providing a redundancy for error correction, and methods which provide a redundancy for error correction to the first signal transmitted.
- Chase decoding is used on retransmission control using a code combining technique, it is possible to correct errors using only an error detecting code. However, many combinations must be calculated in order to carry out Chase decoding, so that the number of calculations becomes enormous.
- CPC complementary punctured convolutional
- an error control method and an error control device for digital communication it is possible to decode with high efficiency even if the received signals contain a signal which has extremely many errors because the decoding procedure is carried out using only a portion of the received signals. Furthermore, because the signal to be transmitted has the redundancy of only an error detection code, it is possible to obtain the maximum throughput when the transmission channel is of high quality. Furthermore, due to Chase decoding, it is possible to correct errors and maintain high transmission effects even if the quality of the transmission channel deteriorates. In addition, it is possible to reduce the amount of signal operations on the receiving side by controlling the decoding order in Chase decoding.
- Fig. 1 is a block diagram showing a structural example of a receiving apparatus according to an embodiment of the present invention.
- Fig. 2 is a chart diagram explaining the operation of a transmission apparatus and a receiving apparatus.
- Transmission apparatus 20 receives transmission information from transmission terminal 10, and then adds an error detecting code (CRC code) to the transmission information.
- CRC code error detecting code
- a signal series added CRC code is expressed as I.
- transmission apparatus 20 carries out a convolutional encoding to the signal series including CRC bits at a rate of 1/2.
- the generator polynomials are expressed as (G1, G2).
- a signal encoded with G1 is expressed as P1
- a signal encoded with G2 is expressed as P2.
- Transmission apparatus 20 transmits the transmission signal P1 first.
- Receiving apparatus 30 receives signal P1 in which errors are overlapped thereto on the transmission channel.
- the overlapping error pattern is expressed as E1
- Receiver 31 of receiving apparatus 30 receives receiving signal R1, and then converts receiving signal R1 to a base band signal, and outputs the base band signal to receiving signal buffer 32.
- Control portion 35 detects receiving signal R1, and then instructs an execution of a CRC decoding procedure to error correction decoding portion 33.
- Error correction decoding portion 33 receives the base band signal from receiving buffer 32, and carries out CRC decoding in CRC decoding portion 331 (Fig.
- receiving apparatus 30 If CRC decoding portion 331 can decode the base band signal, receiving apparatus 30 outputs a decoded signal to receiving terminal 40 through interface portion 36, and transmits a receipt acknowledgment signal ACK to transmission apparatus 20 through transmission portion 37, completing the receiving procedure. On the other hand, if CRC decoding portion 331 cannot decode the base band signal because of errors, receiving apparatus 30 carries out Chase decoding by Chase decoding portion 332.
- Fig. 3 is a flowchart showing the Chase decoding method of the present invention.
- Chase decoding portion 332 checks whether errors exist in the receiving signal or not (S20). When errors exist in the receiving signal, Chase decoding portion 332 searches the reliability of each bit of the receiving signal, and selects t bits which have a low degree of reliability. It is assumed that errors were generated in all or a portion of these t bits, and that errors where not generated in the remainder of the bits. There are 2 ⁇ t-1 ( ⁇ expresses the power of the number) error patterns in t bits.
- Chase decoding portion 332 calculates the sum of the reliabilities of the bits in which error has occurred in the error patterns, and carries out CRC decoding in the order of the patterns in which the sum of the reliabilities is a small value (S22).
- transmission apparatus 20 When transmission apparatus 20 receives retransmission request signal NAK, it transmits transmission signal P2. Afterward, transmission apparatus 20 alternately transmits transmission signals P1 and P2 whenever it receives retransmission request signal NAK.
- CRC decoding portion 331 begins by carrying out CRC decoding (S3). At this time, if CRC decoding portion 331 cannot decode, then receiving apparatus 30 carries out Chase decoding by using Chase decoding portion 332 (S4). Furthermore, if Chase decoding by Chase decoding portion 332 also fails, receiving apparatus 30 carries out Viterbi decoding using R1 and R2 in Viterbi decoding portion 333 (S5). If Viterbi decoding by Viterbi decoding portion 333 fails, then receiving apparatus 30 transmits retransmission request signal NAK.
- CRC decoding fails
- receiving apparatus 30 carries out Chase decoding (S7). If Chase decoding also fails, receiving apparatus 30 carries out Viterbi decoding using R1, R2 and R3 (S8). If Viterbi decoding fails, then receiving apparatus 30 carries out Viterbi decoding using R2 and R3 (S9). If this decoding also fails, receiving
- Chase decoding is also used during diversity decoding. For example, when R 1 and R3 are received, diversity decoding portion 334 obtains a signal RD which is decoded by diversity decoding on the basis of a selection diversity or maximum rate synthetic diversity for each bit of R1 and R3. Next, diversity decoding portion 334 carries out Chase decoding on signal RD.
- receiving apparatus 30 transmits retransmission request signal NAK. Then, receiving apparatus 30 carries out CRC decoding and Chase decoding whenever it receives a signal, and then carries out Viterbi decoding and diversity decoding when CRC and Chase decoding fails by combining the received signals in a predetermined order. Signal selecting portion 34 decides the combination of the received signals to be decoded.
- Viterbi decoding is carried out using all received signals.
- Viterbi decoding is carried out using (N-1) received signals by excluding one received signal from the N received signals. There are N combinations for (N-1) number of signals.
- signal selecting portion 34 decides the selection order by using reliability rn.
- Signal selecting portion 34 selects (N-1) signals by sequentially excluding received signals Rn starting with the signal which has the smallest reliability rn.
- Viterbi decoding is carried out using (N-2) signals.
- (N-2) signals are selected by excluding the two signals which have the smallest reliability rn.
- the reliability may also be calculated for all the signal combinations.
- the reliability of received signal Ra x Rb x Rc x....x Rx is ra+rb+rc+....+rx.
- the reliabilities for all signal combinations are calculated, and then Viterbi decoding is carried out by sequentially selecting in the order of the combinations having the highest degree of
- the number of received signals which correspond to P1 is n1
- the number of received signals which correspond to P2 is n2. If n1 is larger than n2 (n1>n2), diversity decoding is carried out for (n1-n2+1) signals having low reliability from among the received signals which correspond to P1. When this signal and the received signals which corresponds to the remaining P1 are combined, signals which corresponds to n2 number of P1 are obtained. As a result, Viterbi encoding can be carried out using a total 2 x n2 number of signals.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Error Detection And Correction (AREA)
- Radio Transmission System (AREA)
Description
Claims (12)
- An error control method for digital communication which corrects errors which occur in the transmission of signals (R1-R4), comprising
a receiving step for receiving said signals (R1-R4);
a selecting step for selecting a portion of said signals (R1-R4) which are received in said receiving step,
a first decoding step for decoding said received signals (R1-R4);
characterised by
a second decoding step for carrying out Chase decoding on the signals (R1-R4) whose decoding by said first decoding step failed;
a retransmission request step for transmitting a retransmission request of said signals (R1-R4) in the case that decoding by said second decoding step fails;
a repeating step for repeating procedures of said receiving step, and said first and second decoding steps in the case that decoding by said second decoding step fails;
said selecting step including a first selecting step for selecting all signals (R1-R4) which are received in said receiving step, a calculating step for calculating the reliabilities of each signal, and a second selecting step for successively selecting a signal combination which has higher reliability from said signals which are received in said receiving step by sequentially excluding the received signals with the lowest reliability, and
said method further comprising a third decoding step for, when said repeating step fails, decoding using said portion of said signals selected by said selecting step. - An error control method according to claim 1, wherein said third decoding step carries out Viterbi decoding.
- An error control method according to claim 1, wherein said third decoding step carries out diversity decoding.
- An error control method according to claim 2, comprising a diversity decoding step, which is performed when said third decoding step fails.
- An error control method according to any one of claims 1 to 4, comprising
a bit position selecting step for selecting a bit position from the received signal which has a low degree of reliability, by means of a predetermined bit number from the received signal; and
a generating step for generating error patterns by assuming that said errors exist at said bit position;
wherein said second decoding step carries out Chase decoding for said signal on the basis of each error pattern. - An error control method according to claim 5, wherein said second decoding step calculates the reliability of each error pattern by using the reliability of each bit of the received signal, and successively carries out Chase decoding on the received signal in the order of the error patterns which have the highest reliability.
- An error control device for correcting errors which occur in the transmission of signals (R1-R4), comprising
a receiving means (30) for receiving said signals (R1-R4);
a selecting means (34) for selecting a portion of said signals (R1-R4) which are received by said receiving means,
a first decoding means (331) for decoding said received signals (R1-R4);
characterised by
a second decoding means (332) for carrying out Chase decoding on the signals (R1-R4) whose decoding by said first decoding means (331) failed;
a retransmission request means (33) for transmitting a retransmission request of said signals (R1-R4) in the case that decoding by said second decoding means (332) fails;
a repeating means for repeating procedures of said receiving means, and said first and second decoding means in the case that decoding by said second decoding means (332) fails;
wherein said selecting means is adapted to select all signals (R1-R4) which are received by said receiving means, to calculate the reliabilities of each signal, and to successively select a signal combination which has higher reliability from said signals which are received by said receiving means by sequentially excluding the received signals with the lowest reliability, and
wherein said device comprises a third decoding means for, when said repeating procedures carried out by said repeating means fail decoding using said portion of signals selected by said selecting means. - An error control device according to claim 7, wherein said third decoding means (333) is adapted to carry out Viterbi decoding. .
- An error control device according to claim 7, wherein said third decoding means (333) is adapted to carry out diversitiy decoding.
- An error control device according to claim 8, comprising a diversity decoding means (334), which is adapted to perform diversity decoding when said decoding by said third decoding means (333) fails.
- An error control device according to any one of claims 7 to 10, comprising
a bit position selecting means for selecting a bit position from the received signal which has a low degree of reliability, by means of a predetermined bit number from the received signal; and
a generating means for generating error patterns by assuming that said errors exist at said bit position;
wherein said second decoding means (332) is adapted to carry out Chase decoding for said signal on the basis of each error pattern. - An error control device according to claim 11, wherein said second decoding means (332) is adapted to calculate the reliability of each error pattern by using the reliability of each bit of the received signal, and to successively carry out Chase decoding on the received signal in the order of the error patterns which have the highest reliability.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8043117A JPH09238125A (en) | 1996-02-29 | 1996-02-29 | Error control method and its device |
JP43117/96 | 1996-02-29 | ||
JP4311796 | 1996-02-29 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0798889A2 EP0798889A2 (en) | 1997-10-01 |
EP0798889A3 EP0798889A3 (en) | 1999-04-14 |
EP0798889B1 true EP0798889B1 (en) | 2005-05-25 |
Family
ID=12654905
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP96116817A Expired - Lifetime EP0798889B1 (en) | 1996-02-29 | 1996-10-18 | Error control method and error control device for digital communication |
Country Status (7)
Country | Link |
---|---|
US (1) | US6134694A (en) |
EP (1) | EP0798889B1 (en) |
JP (1) | JPH09238125A (en) |
KR (1) | KR100227351B1 (en) |
CN (1) | CN1083184C (en) |
CA (1) | CA2187564C (en) |
DE (1) | DE69634770T2 (en) |
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JP3239870B2 (en) * | 1998-12-28 | 2001-12-17 | 日本電気株式会社 | Data error correction system |
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US6460160B1 (en) * | 2000-02-14 | 2002-10-01 | Motorola, Inc. | Chase iteration processing for decoding input data |
US7224702B2 (en) * | 2000-08-30 | 2007-05-29 | The Chinese University Of Hong Kong | System and method for error-control for multicast video distribution |
KR100525384B1 (en) * | 2000-10-31 | 2005-11-02 | 엘지전자 주식회사 | Method for controlling packet retransmission in mobile communication system |
FI115178B (en) * | 2000-10-31 | 2005-03-15 | Nokia Corp | Method and arrangement to optimally protect bits against transmission errors |
JP3506330B2 (en) * | 2000-12-27 | 2004-03-15 | 松下電器産業株式会社 | Data transmission device |
US7693179B2 (en) * | 2002-11-29 | 2010-04-06 | Panasonic Corporation | Data transmission apparatus using a constellation rearrangement |
CN100393021C (en) * | 2001-02-21 | 2008-06-04 | 松下电器产业株式会社 | Method and apparatus for hybrid automatic repeat request using signal constellation rearrangement |
US20030039226A1 (en) | 2001-08-24 | 2003-02-27 | Kwak Joseph A. | Physical layer automatic repeat request (ARQ) |
US20030066004A1 (en) * | 2001-09-28 | 2003-04-03 | Rudrapatna Ashok N. | Harq techniques for multiple antenna systems |
ATE309652T1 (en) | 2001-11-16 | 2005-11-15 | Matsushita Electric Ind Co Ltd | ARQ RETRANSMISSION METHOD WITH INCREMENTAL REDUNDANCY USING BIT REORDERING TYPES |
EP1313248B1 (en) | 2001-11-16 | 2005-08-31 | Matsushita Electric Industrial Co., Ltd. | Hybrid ARQ method for packet data transmission |
US6693910B2 (en) * | 2002-06-28 | 2004-02-17 | Interdigital Technology Corporation | System and method for avoiding stall of an H-ARQ reordering buffer in a receiver |
KR100584170B1 (en) * | 2002-07-11 | 2006-06-02 | 재단법인서울대학교산학협력재단 | Turbo Coded Complex Retransmission System and Error Detection Method |
KR100989314B1 (en) * | 2004-04-09 | 2010-10-25 | 삼성전자주식회사 | Display device |
EP1617432A1 (en) | 2004-07-12 | 2006-01-18 | Teac Corporation | Optical disk device |
SG166825A1 (en) * | 2005-11-07 | 2010-12-29 | Agency Science Tech & Res | Methods and devices for decoding and encoding data |
CN100486120C (en) * | 2005-12-15 | 2009-05-06 | 大唐移动通信设备有限公司 | Turbo decoder and decoding method |
US7577899B2 (en) * | 2006-02-13 | 2009-08-18 | Harris Corporation | Cyclic redundancy check (CRC) based error correction method and device |
US7793195B1 (en) * | 2006-05-11 | 2010-09-07 | Link—A—Media Devices Corporation | Incremental generation of polynomials for decoding reed-solomon codes |
JP2008042338A (en) * | 2006-08-02 | 2008-02-21 | Oki Electric Ind Co Ltd | Error correction method for vehicle-to-vehicle communication, and vehicle-to-vehicle communication system |
US8171368B1 (en) | 2007-02-16 | 2012-05-01 | Link—A—Media Devices Corporation | Probabilistic transition rule for two-level decoding of reed-solomon codes |
CN101409599B (en) * | 2007-10-11 | 2011-07-13 | 电信科学技术研究院 | Method and apparatus for decoding Turbo code |
US8423854B2 (en) * | 2009-03-02 | 2013-04-16 | Clearwire Ip Holdings Llc | Communication retransmission based on transmission performance relative to expected quality of service |
CN102035557B (en) * | 2009-09-27 | 2013-02-27 | 中兴通讯股份有限公司 | Turbo code parallel interleaving method and device |
CN102098061B (en) * | 2009-12-15 | 2014-09-17 | 上海贝尔股份有限公司 | Parallel Turbo coder |
CN102130695B (en) * | 2010-01-15 | 2013-06-12 | 中兴通讯股份有限公司 | Decoding method and device of concatenated codes |
CN102907031B (en) * | 2010-05-21 | 2016-08-03 | 日本电气株式会社 | Decoding device and decoding sequence control method |
CN101969309B (en) * | 2010-09-28 | 2014-07-16 | 电子科技大学 | MAP modulating and coding method of FFH communication system coded by Turbo and modulated by BFSK |
CN102281075B (en) * | 2011-03-21 | 2013-03-06 | 中国人民解放军信息工程大学 | Hierarchical encoding, operation and indexing method of hexagonal grid with aperture of 4 |
CN102281076B (en) * | 2011-03-25 | 2014-01-15 | 武汉中元通信股份有限公司 | RS (Reed-Solomon) cascade code design method based on increase of frequency hopping radio station anti-interference capabilities |
CN102270994B (en) * | 2011-03-30 | 2013-03-06 | 清华大学 | Overflow control method for state metric of Turbo code decoder |
CN102751996B (en) * | 2011-04-19 | 2015-03-25 | 深圳清华大学研究院 | High-performance low-complexity decoding method of block product codes TPC (Turbo Product Code) |
CN102571108B (en) * | 2012-02-24 | 2014-02-26 | 清华大学深圳研究生院 | Self-adaptive iterative decoding method for Turbo product codes |
US8996962B2 (en) * | 2012-08-23 | 2015-03-31 | Broadcom Corporation | Chase coding for error correction of encrypted packets with parity |
US9231623B1 (en) * | 2013-09-11 | 2016-01-05 | SK Hynix Inc. | Chase decoding for turbo-product codes (TPC) using error intersections |
KR101496052B1 (en) * | 2013-11-28 | 2015-02-25 | 한국과학기술원 | Decoding circuit and method for improved performance and lower error floors of block-wise concatenated BCH codes with cyclic shift of constituent BCH codes |
CN105515591B (en) * | 2014-09-23 | 2019-10-25 | 中国科学院计算技术研究所 | A kind of Turbo code decoding system and method |
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CN110495120B (en) | 2017-04-03 | 2022-04-29 | 瑞典爱立信有限公司 | HARQ process for nodes with variable processing time |
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JPH0685513B2 (en) * | 1986-07-21 | 1994-10-26 | 日本電信電話株式会社 | Data retransmission transmission method |
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JP2759043B2 (en) * | 1992-09-14 | 1998-05-28 | エヌ・ティ・ティ移動通信網株式会社 | Information bit sequence transmission system |
-
1996
- 1996-02-29 JP JP8043117A patent/JPH09238125A/en active Pending
- 1996-10-10 US US08/728,216 patent/US6134694A/en not_active Expired - Fee Related
- 1996-10-10 CA CA002187564A patent/CA2187564C/en not_active Expired - Fee Related
- 1996-10-18 DE DE69634770T patent/DE69634770T2/en not_active Expired - Fee Related
- 1996-10-18 EP EP96116817A patent/EP0798889B1/en not_active Expired - Lifetime
- 1996-10-23 KR KR1019960047699A patent/KR100227351B1/en not_active IP Right Cessation
- 1996-11-09 CN CN96121077A patent/CN1083184C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CA2187564C (en) | 2002-08-06 |
US6134694A (en) | 2000-10-17 |
CN1159109A (en) | 1997-09-10 |
EP0798889A3 (en) | 1999-04-14 |
EP0798889A2 (en) | 1997-10-01 |
CA2187564A1 (en) | 1997-08-30 |
KR970063971A (en) | 1997-09-12 |
JPH09238125A (en) | 1997-09-09 |
DE69634770D1 (en) | 2005-06-30 |
DE69634770T2 (en) | 2006-02-02 |
CN1083184C (en) | 2002-04-17 |
KR100227351B1 (en) | 1999-11-01 |
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